d/freebsd-skq
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Allocate a cacheline when reading or writing to write through memory. The

Browse Source 
hardware will still write to memory, however following reads will be from
the cache.

MFC after:	1 week
Sponsored by:	DARPA, AFRL
This commit is contained in:
andrew 2017-05-13 13:03:20 +00:00
parent bf70d7ed98
commit e1e13d1ad1
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
sys/arm64/include/armreg.h
View File

@ -360,7 +360,7 @@
#define MAIR_ATTR(attr, idx) ((attr) << ((idx) * 8))
#define MAIR_DEVICE_nGnRnE 0x00
#define MAIR_NORMAL_NC 0x44
#define MAIR_NORMAL_WT 0x88
#define MAIR_NORMAL_WT 0xbb
#define MAIR_NORMAL_WB 0xff
/* PAR_EL1 - Physical Address Register */