- Add the RX refresh changes from igb to ixgbe
- Also a couple minor tweaks to the TX code from the same source. - Add the INET ioctl code which has been missing from this driver, and which caused IP aliases to reset the interface. - Last, some minor logic changes that just reflect upcoming hardware support, but have no other functional effect now. MFC after a week
This commit is contained in:
Jack F Vogel
parent
8954032f0d
commit
e2314c6ccb
@ -1,6 +1,6 @@
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/******************************************************************************
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Copyright (c) 2001-2010, Intel Corporation
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Copyright (c) 2001-2011, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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@ -33,7 +33,7 @@
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/*$FreeBSD$*/
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#ifdef HAVE_KERNEL_OPTION_HEADERS
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#include "opt_device_polling.h"
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#include "opt_inet.h"
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#endif
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#include "ixgbe.h"
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@ -46,7 +46,7 @@ int ixgbe_display_debug_stats = 0;
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/*********************************************************************
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* Driver version
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*********************************************************************/
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char ixgbe_driver_version[] = "2.3.8";
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char ixgbe_driver_version[] = "2.3.10";
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/*********************************************************************
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* PCI Device ID Table
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@ -270,8 +270,8 @@ TUNABLE_INT("hw.ixgbe.hdr_split", &ixgbe_header_split);
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/*
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* Number of Queues, can be set to 0,
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* it then autoconfigures based on the
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* number of cpus. Each queue is a pair
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* of RX and TX rings with a msix vector
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* number of cpus with a max of 8. This
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* can be overriden manually here.
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*/
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static int ixgbe_num_queues = 0;
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TUNABLE_INT("hw.ixgbe.num_queues", &ixgbe_num_queues);
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@ -787,10 +787,6 @@ ixgbe_mq_start_locked(struct ifnet *ifp, struct tx_ring *txr, struct mbuf *m)
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return (err);
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}
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/* Call cleanup if number of TX descriptors low */
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if (txr->tx_avail <= IXGBE_TX_CLEANUP_THRESHOLD)
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ixgbe_txeof(txr);
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enqueued = 0;
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if (m == NULL) {
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next = drbr_dequeue(ifp, txr->br);
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@ -814,7 +810,9 @@ ixgbe_mq_start_locked(struct ifnet *ifp, struct tx_ring *txr, struct mbuf *m)
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ETHER_BPF_MTAP(ifp, next);
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if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
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break;
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if (txr->tx_avail <= IXGBE_TX_OP_THRESHOLD) {
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if (txr->tx_avail < IXGBE_TX_OP_THRESHOLD)
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ixgbe_txeof(txr);
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if (txr->tx_avail < IXGBE_TX_OP_THRESHOLD) {
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ifp->if_drv_flags |= IFF_DRV_OACTIVE;
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break;
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}
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@ -864,10 +862,35 @@ ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data)
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{
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struct adapter *adapter = ifp->if_softc;
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struct ifreq *ifr = (struct ifreq *) data;
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#ifdef INET
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struct ifaddr *ifa = (struct ifaddr *)data;
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#endif
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int error = 0;
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switch (command) {
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case SIOCSIFADDR:
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#ifdef INET
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if (ifa->ifa_addr->sa_family == AF_INET) {
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/*
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* Since resetting hardware takes a very long time
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* and results in link renegotiation we only
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* initialize the hardware only when it is absolutely
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* required.
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*/
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ifp->if_flags |= IFF_UP;
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if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
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IXGBE_CORE_LOCK(adapter);
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ixgbe_init_locked(adapter);
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IXGBE_CORE_UNLOCK(adapter);
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}
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if (!(ifp->if_flags & IFF_NOARP))
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arp_ifinit(ifp, ifa);
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} else
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#endif
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error = ether_ioctl(ifp, command, data);
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break;
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case SIOCSIFMTU:
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IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)");
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if (ifr->ifr_mtu > IXGBE_MAX_FRAME_SIZE - ETHER_HDR_LEN) {
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@ -989,7 +1012,7 @@ ixgbe_init_locked(struct adapter *adapter)
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if (ifp->if_capenable & IFCAP_TXCSUM) {
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ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP);
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#if __FreeBSD_version >= 800000
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if (hw->mac.type == ixgbe_mac_82599EB)
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if (hw->mac.type != ixgbe_mac_82598EB)
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ifp->if_hwassist |= CSUM_SCTP;
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#endif
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}
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@ -1032,14 +1055,12 @@ ixgbe_init_locked(struct adapter *adapter)
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gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
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if (hw->mac.type == ixgbe_mac_82599EB) {
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gpie |= IXGBE_SDP1_GPIEN;
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gpie |= IXGBE_SDP2_GPIEN;
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}
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/* Enable Fan Failure Interrupt */
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if (hw->device_id == IXGBE_DEV_ID_82598AT)
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gpie |= IXGBE_SDP1_GPIEN;
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gpie |= IXGBE_SDP1_GPIEN;
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/* Add for Thermal detection */
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if (hw->mac.type == ixgbe_mac_82599EB)
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gpie |= IXGBE_SDP2_GPIEN;
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if (adapter->msix > 1) {
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/* Enable Enhanced MSIX mode */
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@ -1121,7 +1142,7 @@ ixgbe_init_locked(struct adapter *adapter)
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#ifdef IXGBE_FDIR
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/* Init Flow director */
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if (hw->mac.type == ixgbe_mac_82599EB)
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if (hw->mac.type != ixgbe_mac_82598EB)
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ixgbe_init_fdir_signature_82599(&adapter->hw, fdir_pballoc);
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#endif
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@ -1338,8 +1359,6 @@ ixgbe_msix_que(void *arg)
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more_tx = ixgbe_txeof(txr);
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IXGBE_TX_UNLOCK(txr);
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more_rx = ixgbe_rxeof(que, adapter->rx_process_limit);
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/* Do AIM now? */
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if (ixgbe_enable_aim == FALSE)
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@ -1417,7 +1436,7 @@ ixgbe_msix_link(void *arg)
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if (reg_eicr & IXGBE_EICR_LSC)
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taskqueue_enqueue(adapter->tq, &adapter->link_task);
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if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
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if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
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#ifdef IXGBE_FDIR
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if (reg_eicr & IXGBE_EICR_FLOW_DIR) {
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/* This is probably overkill :) */
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@ -2792,7 +2811,7 @@ ixgbe_setup_transmit_ring(struct tx_ring *txr)
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#ifdef IXGBE_FDIR
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/* Set the rate at which we sample packets */
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if (adapter->hw.mac.type == ixgbe_mac_82599EB)
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if (adapter->hw.mac.type != ixgbe_mac_82598EB)
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txr->atr_sample = atr_sample_rate;
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#endif
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@ -2874,7 +2893,7 @@ ixgbe_initialize_transmit_units(struct adapter *adapter)
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}
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if (hw->mac.type == ixgbe_mac_82599EB) {
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if (hw->mac.type != ixgbe_mac_82598EB) {
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u32 dmatxctl, rttdcs;
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dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
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dmatxctl |= IXGBE_DMATXCTL_TE;
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@ -3386,11 +3405,15 @@ ixgbe_refresh_mbufs(struct rx_ring *rxr, int limit)
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bus_dma_segment_t pseg[1];
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struct ixgbe_rx_buf *rxbuf;
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struct mbuf *mh, *mp;
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int i, nsegs, error, cleaned;
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int i, j, nsegs, error;
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bool refreshed = FALSE;
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i = rxr->next_to_refresh;
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cleaned = -1; /* Signify no completions */
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while (i != limit) {
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i = j = rxr->next_to_refresh;
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/* Control the loop with one beyond */
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if (++j == adapter->num_rx_desc)
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j = 0;
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while (j != limit) {
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rxbuf = &rxr->rx_buffers[i];
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if (rxr->hdr_split == FALSE)
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goto no_split;
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@ -3418,7 +3441,8 @@ ixgbe_refresh_mbufs(struct rx_ring *rxr, int limit)
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rxbuf->m_head = mh;
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bus_dmamap_sync(rxr->htag, rxbuf->hmap,
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BUS_DMASYNC_PREREAD);
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rxr->rx_base[i].read.hdr_addr = htole64(hseg[0].ds_addr);
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rxr->rx_base[i].read.hdr_addr =
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htole64(hseg[0].ds_addr);
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no_split:
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if (rxbuf->m_pack == NULL) {
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@ -3446,17 +3470,17 @@ no_split:
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rxr->rx_base[i].read.pkt_addr =
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htole64(pseg[0].ds_addr);
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cleaned = i;
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/* Calculate next index */
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if (++i == adapter->num_rx_desc)
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i = 0;
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/* This is the work marker for refresh */
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refreshed = TRUE;
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/* Next is precalculated */
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i = j;
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rxr->next_to_refresh = i;
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if (++j == adapter->num_rx_desc)
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j = 0;
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}
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update:
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if (cleaned != -1) /* If we refreshed some, bump tail */
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if (refreshed) /* Update hardware tail index */
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IXGBE_WRITE_REG(&adapter->hw,
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IXGBE_RDT(rxr->me), cleaned);
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IXGBE_RDT(rxr->me), rxr->next_to_refresh);
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return;
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}
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@ -3727,6 +3751,7 @@ skip_head:
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rxr->lro_enabled = FALSE;
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rxr->rx_split_packets = 0;
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rxr->rx_bytes = 0;
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rxr->discard = FALSE;
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bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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@ -3736,7 +3761,7 @@ skip_head:
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** 82598 uses software LRO, the
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** 82599 uses a hardware assist.
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*/
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if ((adapter->hw.mac.type == ixgbe_mac_82599EB) &&
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if ((adapter->hw.mac.type != ixgbe_mac_82598EB) &&
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(ifp->if_capenable & IFCAP_RXCSUM) &&
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(ifp->if_capenable & IFCAP_LRO))
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ixgbe_setup_hw_rsc(rxr);
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@ -3862,8 +3887,7 @@ ixgbe_initialize_receive_units(struct adapter *adapter)
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IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
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}
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if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
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/* PSRTYPE must be initialized in 82599 */
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if (adapter->hw.mac.type != ixgbe_mac_82598EB) {
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u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
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IXGBE_PSRTYPE_UDPHDR |
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IXGBE_PSRTYPE_IPV4HDR |
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@ -4307,10 +4331,8 @@ next_desc:
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}
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/* Refresh any remaining buf structs */
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if (processed != 0) {
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if (ixgbe_rx_unrefreshed(rxr))
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ixgbe_refresh_mbufs(rxr, i);
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processed = 0;
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}
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rxr->next_to_check = i;
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@ -4472,7 +4494,7 @@ ixgbe_setup_vlan_hw_support(struct adapter *adapter)
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IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
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/* On 82599 the VLAN enable is per/queue in RXDCTL */
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if (hw->mac.type == ixgbe_mac_82599EB)
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if (hw->mac.type != ixgbe_mac_82598EB)
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for (int i = 0; i < adapter->num_queues; i++) {
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ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
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ctrl |= IXGBE_RXDCTL_VME;
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@ -4491,9 +4513,7 @@ ixgbe_enable_intr(struct adapter *adapter)
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/* Enable Fan Failure detection */
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if (hw->device_id == IXGBE_DEV_ID_82598AT)
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mask |= IXGBE_EIMS_GPI_SDP1;
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/* 82599 specific interrupts */
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if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
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else {
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mask |= IXGBE_EIMS_ECC;
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mask |= IXGBE_EIMS_GPI_SDP1;
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mask |= IXGBE_EIMS_GPI_SDP2;
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@ -4810,7 +4830,7 @@ ixgbe_update_stats_counters(struct adapter *adapter)
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adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
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adapter->stats.gprc -= missed_rx;
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if (hw->mac.type == ixgbe_mac_82599EB) {
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if (hw->mac.type != ixgbe_mac_82598EB) {
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adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) +
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((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32);
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adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) +
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@ -4878,7 +4898,7 @@ ixgbe_update_stats_counters(struct adapter *adapter)
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adapter->stats.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
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adapter->stats.fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST);
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/* Only read FCOE on 82599 */
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if (hw->mac.type == ixgbe_mac_82599EB) {
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if (hw->mac.type != ixgbe_mac_82598EB) {
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adapter->stats.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
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adapter->stats.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
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adapter->stats.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
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@ -1,6 +1,6 @@
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/******************************************************************************
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Copyright (c) 2001-2010, Intel Corporation
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Copyright (c) 2001-2011, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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@ -497,4 +497,19 @@ drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
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}
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#endif
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/*
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** Find the number of unrefreshed RX descriptors
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*/
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static inline u16
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ixgbe_rx_unrefreshed(struct rx_ring *rxr)
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{
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struct adapter *adapter = rxr->adapter;
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if (rxr->next_to_check > rxr->next_to_refresh)
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return (rxr->next_to_check - rxr->next_to_refresh - 1);
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else
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return ((adapter->num_rx_desc + rxr->next_to_check) -
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rxr->next_to_refresh - 1);
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}
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#endif /* _IXGBE_H_ */
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