MFp4: Don't write-back the PTEs if they are mapped write-through, this was
apparently only needed because skyeye has bugs in its cache emulation.
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@ -336,13 +336,8 @@ extern int pmap_needs_pte_sync;
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#define PMAP_NEEDS_PTE_SYNC 1
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#define PMAP_INCLUDE_PTE_SYNC
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#elif (ARM_MMU_SA1 == 0)
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#if defined(CPU_ARM9) && !defined(ARM9_CACHE_WRITE_THROUGH)
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#define PMAP_NEEDS_PTE_SYNC 1
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#define PMAP_INCLUDE_PTE_SYNC
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#else
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#define PMAP_NEEDS_PTE_SYNC 0
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#endif
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#endif
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/*
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* These macros return various bits based on kernel/user and protection.
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