Move SWTCH_OPTIM_STATS related code out of cpufunc.h. (This sort of stat

gathering is not an x86 cpu feature)
This commit is contained in:
Peter Wemm 2002-07-21 05:22:16 +00:00
parent 05e5542d97
commit e344afe7c9
7 changed files with 21 additions and 29 deletions

View File

@ -55,7 +55,7 @@
.globl panic
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
.globl swtch_optim_stats, tlb_flush_count
swtch_optim_stats: .long 0 /* number of _swtch_optims */
tlb_flush_count: .long 0
@ -173,7 +173,7 @@ sw1b:
movl %eax,%ecx
movl TD_PCB(%ecx),%edx
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
incl swtch_optim_stats
#endif
@ -181,7 +181,7 @@ sw1b:
movl %cr3,%ebx /* The same address space? */
cmpl PCB_CR3(%edx),%ebx
je 4f /* Yes, skip all that cruft */
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
decl swtch_optim_stats
incl tlb_flush_count
#endif

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@ -672,6 +672,9 @@ pmap_invalidate_all(pmap_t pmap)
u_int cpumask;
u_int other_cpus;
#ifdef SWTCH_OPTIM_STATS
tlb_flush_count++;
#endif
critical_enter();
/*
* We need to disable interrupt preemption but MUST NOT have
@ -3384,9 +3387,6 @@ pmap_activate(struct thread *td)
pmap->pm_active |= PCPU_GET(cpumask);
#else
pmap->pm_active |= 1;
#endif
#if defined(SWTCH_OPTIM_STATS)
tlb_flush_count++;
#endif
cr3 = vtophys(pmap->pm_pdir);
/* XXXKSE this is wrong.
@ -3402,6 +3402,9 @@ pmap_activate(struct thread *td)
td->td_pcb->pcb_cr3 = cr3;
}
load_cr3(cr3);
#ifdef SWTCH_OPTIM_STATS
tlb_flush_count++;
#endif
}
vm_offset_t

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@ -55,7 +55,7 @@
.globl panic
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
.globl swtch_optim_stats, tlb_flush_count
swtch_optim_stats: .long 0 /* number of _swtch_optims */
tlb_flush_count: .long 0
@ -173,7 +173,7 @@ sw1b:
movl %eax,%ecx
movl TD_PCB(%ecx),%edx
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
incl swtch_optim_stats
#endif
@ -181,7 +181,7 @@ sw1b:
movl %cr3,%ebx /* The same address space? */
cmpl PCB_CR3(%edx),%ebx
je 4f /* Yes, skip all that cruft */
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
decl swtch_optim_stats
incl tlb_flush_count
#endif

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@ -58,10 +58,6 @@ __BEGIN_DECLS
#ifdef __GNUC__
#ifdef SWTCH_OPTIM_STATS
extern int tlb_flush_count; /* XXX */
#endif
static __inline void
breakpoint(void)
{
@ -391,9 +387,6 @@ load_cr3(u_int data)
{
__asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory");
#if defined(SWTCH_OPTIM_STATS)
++tlb_flush_count;
#endif
}
static __inline u_int

View File

@ -672,6 +672,9 @@ pmap_invalidate_all(pmap_t pmap)
u_int cpumask;
u_int other_cpus;
#ifdef SWTCH_OPTIM_STATS
tlb_flush_count++;
#endif
critical_enter();
/*
* We need to disable interrupt preemption but MUST NOT have
@ -3384,9 +3387,6 @@ pmap_activate(struct thread *td)
pmap->pm_active |= PCPU_GET(cpumask);
#else
pmap->pm_active |= 1;
#endif
#if defined(SWTCH_OPTIM_STATS)
tlb_flush_count++;
#endif
cr3 = vtophys(pmap->pm_pdir);
/* XXXKSE this is wrong.
@ -3402,6 +3402,9 @@ pmap_activate(struct thread *td)
td->td_pcb->pcb_cr3 = cr3;
}
load_cr3(cr3);
#ifdef SWTCH_OPTIM_STATS
tlb_flush_count++;
#endif
}
vm_offset_t

View File

@ -55,7 +55,7 @@
.globl panic
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
.globl swtch_optim_stats, tlb_flush_count
swtch_optim_stats: .long 0 /* number of _swtch_optims */
tlb_flush_count: .long 0
@ -173,7 +173,7 @@ sw1b:
movl %eax,%ecx
movl TD_PCB(%ecx),%edx
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
incl swtch_optim_stats
#endif
@ -181,7 +181,7 @@ sw1b:
movl %cr3,%ebx /* The same address space? */
cmpl PCB_CR3(%edx),%ebx
je 4f /* Yes, skip all that cruft */
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
decl swtch_optim_stats
incl tlb_flush_count
#endif

View File

@ -58,10 +58,6 @@ __BEGIN_DECLS
#ifdef __GNUC__
#ifdef SWTCH_OPTIM_STATS
extern int tlb_flush_count; /* XXX */
#endif
static __inline void
breakpoint(void)
{
@ -391,9 +387,6 @@ load_cr3(u_int data)
{
__asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory");
#if defined(SWTCH_OPTIM_STATS)
++tlb_flush_count;
#endif
}
static __inline u_int