Move SWTCH_OPTIM_STATS related code out of cpufunc.h. (This sort of stat
gathering is not an x86 cpu feature)
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05e5542d97
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@ -55,7 +55,7 @@
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.globl panic
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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.globl swtch_optim_stats, tlb_flush_count
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swtch_optim_stats: .long 0 /* number of _swtch_optims */
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tlb_flush_count: .long 0
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@ -173,7 +173,7 @@ sw1b:
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movl %eax,%ecx
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movl TD_PCB(%ecx),%edx
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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incl swtch_optim_stats
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#endif
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@ -181,7 +181,7 @@ sw1b:
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movl %cr3,%ebx /* The same address space? */
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cmpl PCB_CR3(%edx),%ebx
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je 4f /* Yes, skip all that cruft */
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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decl swtch_optim_stats
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incl tlb_flush_count
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#endif
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@ -672,6 +672,9 @@ pmap_invalidate_all(pmap_t pmap)
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u_int cpumask;
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u_int other_cpus;
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#ifdef SWTCH_OPTIM_STATS
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tlb_flush_count++;
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#endif
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critical_enter();
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/*
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* We need to disable interrupt preemption but MUST NOT have
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@ -3384,9 +3387,6 @@ pmap_activate(struct thread *td)
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pmap->pm_active |= PCPU_GET(cpumask);
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#else
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pmap->pm_active |= 1;
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#endif
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#if defined(SWTCH_OPTIM_STATS)
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tlb_flush_count++;
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#endif
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cr3 = vtophys(pmap->pm_pdir);
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/* XXXKSE this is wrong.
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@ -3402,6 +3402,9 @@ pmap_activate(struct thread *td)
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td->td_pcb->pcb_cr3 = cr3;
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}
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load_cr3(cr3);
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#ifdef SWTCH_OPTIM_STATS
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tlb_flush_count++;
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#endif
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}
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vm_offset_t
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@ -55,7 +55,7 @@
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.globl panic
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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.globl swtch_optim_stats, tlb_flush_count
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swtch_optim_stats: .long 0 /* number of _swtch_optims */
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tlb_flush_count: .long 0
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@ -173,7 +173,7 @@ sw1b:
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movl %eax,%ecx
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movl TD_PCB(%ecx),%edx
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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incl swtch_optim_stats
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#endif
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@ -181,7 +181,7 @@ sw1b:
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movl %cr3,%ebx /* The same address space? */
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cmpl PCB_CR3(%edx),%ebx
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je 4f /* Yes, skip all that cruft */
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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decl swtch_optim_stats
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incl tlb_flush_count
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#endif
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@ -58,10 +58,6 @@ __BEGIN_DECLS
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#ifdef __GNUC__
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#ifdef SWTCH_OPTIM_STATS
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extern int tlb_flush_count; /* XXX */
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#endif
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static __inline void
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breakpoint(void)
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{
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@ -391,9 +387,6 @@ load_cr3(u_int data)
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{
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__asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory");
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#if defined(SWTCH_OPTIM_STATS)
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++tlb_flush_count;
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#endif
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}
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static __inline u_int
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@ -672,6 +672,9 @@ pmap_invalidate_all(pmap_t pmap)
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u_int cpumask;
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u_int other_cpus;
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#ifdef SWTCH_OPTIM_STATS
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tlb_flush_count++;
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#endif
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critical_enter();
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/*
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* We need to disable interrupt preemption but MUST NOT have
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@ -3384,9 +3387,6 @@ pmap_activate(struct thread *td)
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pmap->pm_active |= PCPU_GET(cpumask);
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#else
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pmap->pm_active |= 1;
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#endif
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#if defined(SWTCH_OPTIM_STATS)
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tlb_flush_count++;
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#endif
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cr3 = vtophys(pmap->pm_pdir);
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/* XXXKSE this is wrong.
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@ -3402,6 +3402,9 @@ pmap_activate(struct thread *td)
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td->td_pcb->pcb_cr3 = cr3;
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}
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load_cr3(cr3);
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#ifdef SWTCH_OPTIM_STATS
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tlb_flush_count++;
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#endif
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}
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vm_offset_t
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@ -55,7 +55,7 @@
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.globl panic
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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.globl swtch_optim_stats, tlb_flush_count
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swtch_optim_stats: .long 0 /* number of _swtch_optims */
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tlb_flush_count: .long 0
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@ -173,7 +173,7 @@ sw1b:
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movl %eax,%ecx
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movl TD_PCB(%ecx),%edx
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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incl swtch_optim_stats
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#endif
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@ -181,7 +181,7 @@ sw1b:
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movl %cr3,%ebx /* The same address space? */
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cmpl PCB_CR3(%edx),%ebx
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je 4f /* Yes, skip all that cruft */
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#if defined(SWTCH_OPTIM_STATS)
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#ifdef SWTCH_OPTIM_STATS
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decl swtch_optim_stats
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incl tlb_flush_count
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#endif
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@ -58,10 +58,6 @@ __BEGIN_DECLS
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#ifdef __GNUC__
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#ifdef SWTCH_OPTIM_STATS
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extern int tlb_flush_count; /* XXX */
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#endif
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static __inline void
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breakpoint(void)
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{
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@ -391,9 +387,6 @@ load_cr3(u_int data)
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{
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__asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory");
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#if defined(SWTCH_OPTIM_STATS)
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++tlb_flush_count;
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#endif
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}
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static __inline u_int
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