Merge from head up to r262611.
This commit is contained in:
commit
e40a3fc365
@ -672,10 +672,8 @@ evalvar(char *p, int flag)
|
||||
again: /* jump here after setting a variable with ${var=text} */
|
||||
if (varflags & VSLINENO) {
|
||||
set = 1;
|
||||
special = 0;
|
||||
val = var;
|
||||
p[-1] = '\0'; /* temporarily overwrite '=' to have \0
|
||||
terminated string */
|
||||
special = 1;
|
||||
val = NULL;
|
||||
} else if (special) {
|
||||
set = varisset(var, varflags & VSNUL);
|
||||
val = NULL;
|
||||
@ -704,7 +702,10 @@ again: /* jump here after setting a variable with ${var=text} */
|
||||
if (set && subtype != VSPLUS) {
|
||||
/* insert the value of the variable */
|
||||
if (special) {
|
||||
varvalue(var, varflags & VSQUOTE, subtype, flag);
|
||||
if (varflags & VSLINENO)
|
||||
STPUTBIN(var, p - var - 1, expdest);
|
||||
else
|
||||
varvalue(var, varflags & VSQUOTE, subtype, flag);
|
||||
if (subtype == VSLENGTH) {
|
||||
varlenb = expdest - stackblock() - startloc;
|
||||
varlen = varlenb;
|
||||
@ -816,7 +817,6 @@ record:
|
||||
default:
|
||||
abort();
|
||||
}
|
||||
p[-1] = '='; /* recover overwritten '=' */
|
||||
|
||||
if (subtype != VSNORMAL) { /* skip to end of alternative */
|
||||
int nesting = 1;
|
||||
|
@ -87,6 +87,7 @@ FILES+= hash4.0
|
||||
FILES+= jobid1.0
|
||||
FILES+= jobid2.0
|
||||
FILES+= lineno.0 lineno.0.stdout
|
||||
FILES+= lineno2.0
|
||||
FILES+= local1.0
|
||||
FILES+= local2.0
|
||||
FILES+= local3.0
|
||||
|
10
bin/sh/tests/builtins/lineno2.0
Normal file
10
bin/sh/tests/builtins/lineno2.0
Normal file
@ -0,0 +1,10 @@
|
||||
# $FreeBSD$
|
||||
|
||||
f() {
|
||||
: ${LINENO+${x?}}
|
||||
}
|
||||
|
||||
unset -v x
|
||||
command eval f 2>/dev/null && exit 3
|
||||
x=1
|
||||
f
|
@ -0,0 +1,97 @@
|
||||
#
|
||||
# CDDL HEADER START
|
||||
#
|
||||
# The contents of this file are subject to the terms of the
|
||||
# Common Development and Distribution License (the "License").
|
||||
# You may not use this file except in compliance with the License.
|
||||
#
|
||||
# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
|
||||
# or http://www.opensolaris.org/os/licensing.
|
||||
# See the License for the specific language governing permissions
|
||||
# and limitations under the License.
|
||||
#
|
||||
# When distributing Covered Code, include this CDDL HEADER in each
|
||||
# file and include the License file at usr/src/OPENSOLARIS.LICENSE.
|
||||
# If applicable, add the following below this CDDL HEADER, with the
|
||||
# fields enclosed by brackets "[]" replaced with your own identifying
|
||||
# information: Portions Copyright [yyyy] [name of copyright owner]
|
||||
#
|
||||
# CDDL HEADER END
|
||||
#
|
||||
|
||||
#
|
||||
# Copyright (c) 2012, Joyent, Inc. All rights reserved.
|
||||
#
|
||||
|
||||
let j=8
|
||||
|
||||
enable()
|
||||
{
|
||||
prog=/var/tmp/dtest.$$.d
|
||||
err=/var/tmp/dtest.$$.err
|
||||
|
||||
nawk -v nprobes=$1 'BEGIN { \
|
||||
for (i = 0; i < nprobes - 1; i++) { \
|
||||
printf("dtrace:::BEGIN,\n"); \
|
||||
} \
|
||||
\
|
||||
printf("dtrace:::BEGIN { exit(0); }\n"); \
|
||||
}' /dev/null > $prog
|
||||
|
||||
dtrace -qs $prog > /dev/null 2> $err
|
||||
|
||||
if [[ "$?" -eq 0 ]]; then
|
||||
return 0
|
||||
else
|
||||
if ! grep "DIF program exceeds maximum program size" $err \
|
||||
1> /dev/null 2>&1 ; then
|
||||
echo "failed to enable $prog: `cat $err`"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
return 1
|
||||
fi
|
||||
}
|
||||
|
||||
#
|
||||
# First, establish an upper bound
|
||||
#
|
||||
let upper=1
|
||||
|
||||
while enable $upper ; do
|
||||
let lower=upper
|
||||
let upper=upper+upper
|
||||
echo success at $lower, raised to $upper
|
||||
done
|
||||
|
||||
#
|
||||
# Now search for the highest value that can be enabled
|
||||
#
|
||||
while [[ "$lower" -lt "$upper" ]]; do
|
||||
let guess=$(((lower + upper) / 2))
|
||||
echo "lower is $lower; upper is $upper; guess is $guess\c"
|
||||
|
||||
if enable $guess ; then
|
||||
if [[ $((upper - lower)) -le 2 ]]; then
|
||||
let upper=guess
|
||||
fi
|
||||
|
||||
echo " (success)"
|
||||
let lower=guess
|
||||
else
|
||||
echo " (failure)"
|
||||
let upper=guess
|
||||
fi
|
||||
done
|
||||
|
||||
let expected=10000
|
||||
|
||||
if [[ "$lower" -lt "$expected" ]]; then
|
||||
echo "expected support for enablings of at least $expected probes; \c"
|
||||
echo "found $lower"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
echo "maximum supported enabled probes found to be $lower"
|
||||
exit 0
|
||||
|
@ -20,8 +20,8 @@
|
||||
*/
|
||||
/*
|
||||
* Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
|
||||
* Copyright 2011 Nexenta Systems, Inc. All rights reserved.
|
||||
* Copyright (c) 2012 by Delphix. All rights reserved.
|
||||
* Copyright 2014 Nexenta Systems, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -1613,9 +1613,16 @@ zpool_in_use(libzfs_handle_t *hdl, int fd, pool_state_t *state, char **namestr,
|
||||
* its state to active.
|
||||
*/
|
||||
if (pool_active(hdl, name, guid, &isactive) == 0 && isactive &&
|
||||
(zhp = zpool_open_canfail(hdl, name)) != NULL &&
|
||||
zpool_get_prop_int(zhp, ZPOOL_PROP_READONLY, NULL))
|
||||
stateval = POOL_STATE_ACTIVE;
|
||||
(zhp = zpool_open_canfail(hdl, name)) != NULL) {
|
||||
if (zpool_get_prop_int(zhp, ZPOOL_PROP_READONLY, NULL))
|
||||
stateval = POOL_STATE_ACTIVE;
|
||||
|
||||
/*
|
||||
* All we needed the zpool handle for is the
|
||||
* readonly prop check.
|
||||
*/
|
||||
zpool_close(zhp);
|
||||
}
|
||||
|
||||
ret = B_TRUE;
|
||||
break;
|
||||
|
@ -69,9 +69,11 @@ CFLAGS+= -I${.OBJDIR} -I${.CURDIR} \
|
||||
#CFLAGS+= -DYYDEBUG
|
||||
|
||||
.if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64"
|
||||
CFLAGS+= -I${.CURDIR}/../../../sys/cddl/dev/dtrace/x86
|
||||
CFLAGS+= -I${OPENSOLARIS_SYS_DISTDIR}/uts/intel -DDIS_MEM
|
||||
.PATH: ${.CURDIR}/../../../cddl/contrib/opensolaris/lib/libdtrace/i386
|
||||
.PATH: ${.CURDIR}/../../../sys/cddl/dev/dtrace/${MACHINE_ARCH}
|
||||
.PATH: ${.CURDIR}/../../../sys/cddl/dev/dtrace/x86
|
||||
.elif ${MACHINE_CPUARCH} == "sparc64"
|
||||
CFLAGS+= -I${OPENSOLARIS_SYS_DISTDIR}/uts/sparc
|
||||
.PATH: ${.CURDIR}/../../../cddl/contrib/opensolaris/lib/libdtrace/sparc
|
||||
|
@ -278,6 +278,7 @@ namespace llvm {
|
||||
/// This can be overridden by clients which want to control the reported
|
||||
/// compilation directory and have it be something other than the current
|
||||
/// working directory.
|
||||
/// Returns an empty string if the current directory cannot be determined.
|
||||
StringRef getCompilationDir() const { return CompilationDir; }
|
||||
|
||||
/// \brief Set the compilation directory for DW_AT_comp_dir
|
||||
|
@ -47,8 +47,8 @@ MCContext::MCContext(const MCAsmInfo *mai, const MCRegisterInfo *mri,
|
||||
AllowTemporaryLabels(true), DwarfCompileUnitID(0), AutoReset(DoAutoReset) {
|
||||
|
||||
error_code EC = llvm::sys::fs::current_path(CompilationDir);
|
||||
assert(!EC && "Could not determine the current directory");
|
||||
(void)EC;
|
||||
if (EC)
|
||||
CompilationDir.clear();
|
||||
|
||||
MachOUniquingMap = 0;
|
||||
ELFUniquingMap = 0;
|
||||
|
@ -467,7 +467,8 @@ static void EmitGenDwarfAbbrev(MCStreamer *MCOS) {
|
||||
EmitAbbrev(MCOS, dwarf::DW_AT_low_pc, dwarf::DW_FORM_addr);
|
||||
EmitAbbrev(MCOS, dwarf::DW_AT_high_pc, dwarf::DW_FORM_addr);
|
||||
EmitAbbrev(MCOS, dwarf::DW_AT_name, dwarf::DW_FORM_string);
|
||||
EmitAbbrev(MCOS, dwarf::DW_AT_comp_dir, dwarf::DW_FORM_string);
|
||||
if (!context.getCompilationDir().empty())
|
||||
EmitAbbrev(MCOS, dwarf::DW_AT_comp_dir, dwarf::DW_FORM_string);
|
||||
StringRef DwarfDebugFlags = context.getDwarfDebugFlags();
|
||||
if (!DwarfDebugFlags.empty())
|
||||
EmitAbbrev(MCOS, dwarf::DW_AT_APPLE_flags, dwarf::DW_FORM_string);
|
||||
@ -643,8 +644,10 @@ static void EmitGenDwarfInfo(MCStreamer *MCOS,
|
||||
MCOS->EmitIntValue(0, 1); // NULL byte to terminate the string.
|
||||
|
||||
// AT_comp_dir, the working directory the assembly was done in.
|
||||
MCOS->EmitBytes(context.getCompilationDir());
|
||||
MCOS->EmitIntValue(0, 1); // NULL byte to terminate the string.
|
||||
if (!context.getCompilationDir().empty()) {
|
||||
MCOS->EmitBytes(context.getCompilationDir());
|
||||
MCOS->EmitIntValue(0, 1); // NULL byte to terminate the string.
|
||||
}
|
||||
|
||||
// AT_APPLE_flags, the command line arguments of the assembler tool.
|
||||
StringRef DwarfDebugFlags = context.getDwarfDebugFlags();
|
||||
|
@ -52,7 +52,7 @@ As information in the cache is lost after a system crash, a
|
||||
.Fn sync
|
||||
system call is issued
|
||||
frequently
|
||||
by the user process
|
||||
by the kernel process
|
||||
.Xr syncer 4
|
||||
(about every 30 seconds).
|
||||
.Pp
|
||||
|
@ -758,6 +758,8 @@
|
||||
|
||||
&hwlist.twe;
|
||||
|
||||
&hwlist.tws;
|
||||
|
||||
&hwlist.vpo;
|
||||
|
||||
<para>[&arch.i386;] The wds(4) driver supports the WD7000 SCSI
|
||||
|
@ -152,6 +152,7 @@ tl i386,pc98,amd64
|
||||
trm i386,amd64
|
||||
twa i386,amd64
|
||||
twe i386,amd64
|
||||
tws i386,amd64
|
||||
ubsa i386,pc98,amd64
|
||||
ubsec i386,pc98,amd64
|
||||
ubser i386,pc98,amd64
|
||||
|
@ -65,7 +65,7 @@ I/O commands.
|
||||
.Sh SEE ALSO
|
||||
.Xr nvme 4 ,
|
||||
.Xr nvmecontrol 8 ,
|
||||
.Xr disk 9 .
|
||||
.Xr disk 9
|
||||
.Sh HISTORY
|
||||
The
|
||||
.Nm
|
||||
|
@ -73,9 +73,13 @@ API for registering NVMe namespace consumers such as
|
||||
API for submitting NVM commands to namespaces
|
||||
.It
|
||||
Ioctls for controller and namespace configuration and management
|
||||
.Pp
|
||||
.Nm
|
||||
creates controller devices in the format /dev/nvmeX and namespace devices in
|
||||
the format /dev/nvmeXnsY.
|
||||
creates controller devices in the format
|
||||
.Pa /dev/nvmeX
|
||||
and namespace devices in
|
||||
the format
|
||||
.Pa /dev/nvmeXnsY .
|
||||
Note that the NVM Express specification starts numbering namespaces at 1,
|
||||
not 0, and this driver follows that convention.
|
||||
.El
|
||||
@ -104,7 +108,8 @@ Note that use of INTx implies disabling of per-CPU I/O queue pairs.
|
||||
The following controller-level sysctls are currently implemented:
|
||||
.Bl -tag -width indent
|
||||
.It Va dev.nvme.0.int_coal_time
|
||||
(R/W) Interrupt coalescing timer period in microseconds. Set to 0 to disable.
|
||||
(R/W) Interrupt coalescing timer period in microseconds.
|
||||
Set to 0 to disable.
|
||||
.It Va dev.nvme.0.int_coal_threshold
|
||||
(R/W) Interrupt coalescing threshold in number of command completions.
|
||||
Set to 0 to disable.
|
||||
@ -146,7 +151,7 @@ and completion queues to the console.
|
||||
.Xr nvd 4 ,
|
||||
.Xr pci 4 ,
|
||||
.Xr nvmecontrol 8 ,
|
||||
.Xr disk 9 .
|
||||
.Xr disk 9
|
||||
.Sh HISTORY
|
||||
The
|
||||
.Nm
|
||||
|
@ -1107,7 +1107,7 @@ struct cpu_functions cortexa_cpufuncs = {
|
||||
cpufunc_nullop, /* flush_brnchtgt_C */
|
||||
(void *)cpufunc_nullop, /* flush_brnchtgt_E */
|
||||
|
||||
arm11_sleep, /* sleep */
|
||||
armv7_sleep, /* sleep */
|
||||
|
||||
/* Soft functions */
|
||||
|
||||
|
@ -343,3 +343,9 @@ ENTRY(armv7_idcache_inv_all)
|
||||
bx lr @ return
|
||||
END(armv7_l1cache_inv_all)
|
||||
|
||||
ENTRY_NP(armv7_sleep)
|
||||
dsb
|
||||
wfi
|
||||
bx lr
|
||||
END(armv7_sleep)
|
||||
|
||||
|
@ -372,7 +372,7 @@ struct cpu_group *
|
||||
cpu_topo(void)
|
||||
{
|
||||
|
||||
return (smp_topo_1level(CG_SHARE_L2, 1, 0));
|
||||
return (smp_topo_1level(CG_SHARE_L2, mp_ncpus, 0));
|
||||
}
|
||||
|
||||
void
|
||||
|
@ -129,12 +129,12 @@ uint32_t platform_arm_tmr_freq = 0;
|
||||
static timecounter_get_t arm_tmr_get_timecount;
|
||||
|
||||
static struct timecounter arm_tmr_timecount = {
|
||||
.tc_name = "ARM MPCore Timecounter",
|
||||
.tc_name = "MPCore",
|
||||
.tc_get_timecount = arm_tmr_get_timecount,
|
||||
.tc_poll_pps = NULL,
|
||||
.tc_counter_mask = ~0u,
|
||||
.tc_frequency = 0,
|
||||
.tc_quality = 1000,
|
||||
.tc_quality = 800,
|
||||
};
|
||||
|
||||
/**
|
||||
@ -254,7 +254,7 @@ arm_tmr_probe(device_t dev)
|
||||
if (!ofw_bus_is_compatible(dev, "arm,mpcore-timers"))
|
||||
return (ENXIO);
|
||||
|
||||
device_set_desc(dev, "ARM Generic MPCore Timers");
|
||||
device_set_desc(dev, "ARM MPCore Timers");
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
|
||||
@ -327,7 +327,7 @@ arm_tmr_attach(device_t dev)
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
sc->et.et_name = "ARM MPCore Eventtimer";
|
||||
sc->et.et_name = "MPCore";
|
||||
sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | ET_FLAGS_PERCPU;
|
||||
sc->et.et_quality = 1000;
|
||||
|
||||
@ -369,8 +369,8 @@ DRIVER_MODULE(mp_tmr, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0);
|
||||
* RETURNS:
|
||||
* nothing
|
||||
*/
|
||||
void
|
||||
DELAY(int usec)
|
||||
static void
|
||||
arm_tmr_DELAY(int usec)
|
||||
{
|
||||
int32_t counts_per_usec;
|
||||
int32_t counts;
|
||||
@ -408,3 +408,11 @@ DELAY(int usec)
|
||||
first = last;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Supply a DELAY() implementation via weak linkage. A platform may want to use
|
||||
* the mpcore per-cpu eventtimers but provide its own DELAY() routine,
|
||||
* especially when the core frequency can change on the fly.
|
||||
*/
|
||||
__weak_reference(arm_tmr_DELAY, DELAY);
|
||||
|
||||
|
105
sys/arm/at91/at91_sdramc.c
Normal file
105
sys/arm/at91/at91_sdramc.c
Normal file
@ -0,0 +1,105 @@
|
||||
/*-
|
||||
* Copyright (c) 2014 Warner Losh. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "opt_platform.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/resource.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
|
||||
#include <arm/at91/at91var.h>
|
||||
#include <arm/at91/at91_aicreg.h>
|
||||
|
||||
#ifdef FDT
|
||||
#include <dev/fdt/fdt_common.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
#endif
|
||||
|
||||
struct sdramc_softc {
|
||||
struct resource *mem_res; /* Memory resource */
|
||||
device_t sc_dev;
|
||||
};
|
||||
|
||||
static int
|
||||
at91_sdramc_probe(device_t dev)
|
||||
{
|
||||
#ifdef FDT
|
||||
if (!ofw_bus_is_compatible(dev, "atmel,at91sam9260-sdramc"))
|
||||
return (ENXIO);
|
||||
#endif
|
||||
device_set_desc(dev, "SDRAMC");
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
at91_sdramc_attach(device_t dev)
|
||||
{
|
||||
int rid, err = 0;
|
||||
struct sdramc_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
sc->sc_dev = dev;
|
||||
|
||||
rid = 0;
|
||||
sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
|
||||
if (sc->mem_res == NULL)
|
||||
panic("couldn't allocate register resources");
|
||||
|
||||
return (err);
|
||||
}
|
||||
|
||||
static device_method_t at91_sdramc_methods[] = {
|
||||
DEVMETHOD(device_probe, at91_sdramc_probe),
|
||||
DEVMETHOD(device_attach, at91_sdramc_attach),
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t at91_sdramc_driver = {
|
||||
"at91_sdramc",
|
||||
at91_sdramc_methods,
|
||||
sizeof(struct sdramc_softc),
|
||||
};
|
||||
|
||||
static devclass_t at91_sdramc_devclass;
|
||||
|
||||
#ifdef FDT
|
||||
DRIVER_MODULE(at91_sdramc, simplebus, at91_sdramc_driver, at91_sdramc_devclass, NULL,
|
||||
NULL);
|
||||
#else
|
||||
DRIVER_MODULE(at91_sdramc, atmelarm, at91_sdramc_driver, at91_sdramc_devclass, NULL,
|
||||
NULL);
|
||||
#endif
|
105
sys/arm/at91/at91_shdwc.c
Normal file
105
sys/arm/at91/at91_shdwc.c
Normal file
@ -0,0 +1,105 @@
|
||||
/*-
|
||||
* Copyright (c) 2014 Warner Losh. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "opt_platform.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/resource.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
|
||||
#include <arm/at91/at91var.h>
|
||||
#include <arm/at91/at91_aicreg.h>
|
||||
|
||||
#ifdef FDT
|
||||
#include <dev/fdt/fdt_common.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
#endif
|
||||
|
||||
struct shdwc_softc {
|
||||
struct resource *mem_res; /* Memory resource */
|
||||
device_t sc_dev;
|
||||
};
|
||||
|
||||
static int
|
||||
at91_shdwc_probe(device_t dev)
|
||||
{
|
||||
#ifdef FDT
|
||||
if (!ofw_bus_is_compatible(dev, "atmel,at91sam9260-shdwc"))
|
||||
return (ENXIO);
|
||||
#endif
|
||||
device_set_desc(dev, "SHDWC");
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
at91_shdwc_attach(device_t dev)
|
||||
{
|
||||
int rid, err = 0;
|
||||
struct shdwc_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
sc->sc_dev = dev;
|
||||
|
||||
rid = 0;
|
||||
sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
|
||||
if (sc->mem_res == NULL)
|
||||
panic("couldn't allocate register resources");
|
||||
|
||||
return (err);
|
||||
}
|
||||
|
||||
static device_method_t at91_shdwc_methods[] = {
|
||||
DEVMETHOD(device_probe, at91_shdwc_probe),
|
||||
DEVMETHOD(device_attach, at91_shdwc_attach),
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t at91_shdwc_driver = {
|
||||
"at91_shdwc",
|
||||
at91_shdwc_methods,
|
||||
sizeof(struct shdwc_softc),
|
||||
};
|
||||
|
||||
static devclass_t at91_shdwc_devclass;
|
||||
|
||||
#ifdef FDT
|
||||
DRIVER_MODULE(at91_shdwc, simplebus, at91_shdwc_driver, at91_shdwc_devclass, NULL,
|
||||
NULL);
|
||||
#else
|
||||
DRIVER_MODULE(at91_shdwc, atmelarm, at91_shdwc_driver, at91_shdwc_devclass, NULL,
|
||||
NULL);
|
||||
#endif
|
105
sys/arm/at91/at91_tcb.c
Normal file
105
sys/arm/at91/at91_tcb.c
Normal file
@ -0,0 +1,105 @@
|
||||
/*-
|
||||
* Copyright (c) 2014 Warner Losh. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "opt_platform.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/resource.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
|
||||
#include <arm/at91/at91var.h>
|
||||
#include <arm/at91/at91_aicreg.h>
|
||||
|
||||
#ifdef FDT
|
||||
#include <dev/fdt/fdt_common.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
#endif
|
||||
|
||||
struct tcb_softc {
|
||||
struct resource *mem_res; /* Memory resource */
|
||||
device_t sc_dev;
|
||||
};
|
||||
|
||||
static int
|
||||
at91_tcb_probe(device_t dev)
|
||||
{
|
||||
#ifdef FDT
|
||||
if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-tcb"))
|
||||
return (ENXIO);
|
||||
#endif
|
||||
device_set_desc(dev, "TCB");
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
at91_tcb_attach(device_t dev)
|
||||
{
|
||||
int rid, err = 0;
|
||||
struct tcb_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
sc->sc_dev = dev;
|
||||
|
||||
rid = 0;
|
||||
sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
|
||||
if (sc->mem_res == NULL)
|
||||
panic("couldn't allocate register resources");
|
||||
|
||||
return (err);
|
||||
}
|
||||
|
||||
static device_method_t at91_tcb_methods[] = {
|
||||
DEVMETHOD(device_probe, at91_tcb_probe),
|
||||
DEVMETHOD(device_attach, at91_tcb_attach),
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t at91_tcb_driver = {
|
||||
"at91_tcb",
|
||||
at91_tcb_methods,
|
||||
sizeof(struct tcb_softc),
|
||||
};
|
||||
|
||||
static devclass_t at91_tcb_devclass;
|
||||
|
||||
#ifdef FDT
|
||||
DRIVER_MODULE(at91_tcb, simplebus, at91_tcb_driver, at91_tcb_devclass, NULL,
|
||||
NULL);
|
||||
#else
|
||||
DRIVER_MODULE(at91_tcb, atmelarm, at91_tcb_driver, at91_tcb_devclass, NULL,
|
||||
NULL);
|
||||
#endif
|
@ -279,7 +279,7 @@ at91_usart_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
|
||||
* we don't want to hang here forever if the hardware is in a bad state.
|
||||
*/
|
||||
if (!(RD4(bas, USART_CSR) & USART_CSR_TXRDY))
|
||||
DELAY(1000);
|
||||
DELAY(10000);
|
||||
|
||||
at91_usart_param(bas, baudrate, databits, stopbits, parity);
|
||||
|
||||
|
@ -124,8 +124,8 @@ device nand
|
||||
device uart
|
||||
|
||||
# I2C (TWSI)
|
||||
#device iic
|
||||
#device iicbus
|
||||
device iic
|
||||
device iicbus
|
||||
|
||||
# Ethernet
|
||||
device ether
|
||||
|
@ -66,6 +66,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/fdt.h>
|
||||
|
||||
#include <arm/freescale/fsl_ocotpreg.h>
|
||||
#include <arm/freescale/fsl_ocotpvar.h>
|
||||
@ -85,8 +86,11 @@ struct imx6_anatop_softc {
|
||||
struct resource *res[2];
|
||||
uint32_t cpu_curhz;
|
||||
uint32_t cpu_curmhz;
|
||||
uint32_t cpu_curmv;
|
||||
uint32_t cpu_minhz;
|
||||
uint32_t cpu_minmv;
|
||||
uint32_t cpu_maxhz;
|
||||
uint32_t cpu_maxmv;
|
||||
uint32_t refosc_hz;
|
||||
void *temp_intrhand;
|
||||
uint32_t temp_high_val;
|
||||
@ -103,12 +107,15 @@ struct imx6_anatop_softc {
|
||||
static struct imx6_anatop_softc *imx6_anatop_sc;
|
||||
|
||||
/*
|
||||
* Table of CPU max frequencies. This is indexed by the max frequency value
|
||||
* (0-3) from the ocotp CFG3 register.
|
||||
* Tables of CPU max frequencies and corresponding voltages. This is indexed by
|
||||
* the max frequency value (0-3) from the ocotp CFG3 register.
|
||||
*/
|
||||
static uint32_t imx6_cpu_maxhz_tab[] = {
|
||||
792000000, 852000000, 996000000, 1200000000
|
||||
};
|
||||
static uint32_t imx6_cpu_millivolt_tab[] = {
|
||||
1150, 1225, 1225, 1275
|
||||
};
|
||||
|
||||
#define TZ_ZEROC 2732 /* deci-Kelvin <-> deci-Celcius offset. */
|
||||
|
||||
@ -130,6 +137,64 @@ imx6_anatop_write_4(bus_size_t offset, uint32_t value)
|
||||
bus_write_4(imx6_anatop_sc->res[MEMRES], offset, value);
|
||||
}
|
||||
|
||||
static void
|
||||
vdd_set(struct imx6_anatop_softc *sc, int mv)
|
||||
{
|
||||
int newtarg, oldtarg;
|
||||
uint32_t delay, pmureg;
|
||||
static boolean_t init_done = false;
|
||||
|
||||
/*
|
||||
* The datasheet says VDD_PU and VDD_SOC must be equal, and VDD_ARM
|
||||
* can't be more than 50mV above or 200mV below them. For now to keep
|
||||
* things simple we set all three to the same value.
|
||||
*/
|
||||
|
||||
pmureg = imx6_anatop_read_4(IMX6_ANALOG_PMU_REG_CORE);
|
||||
oldtarg = pmureg & IMX6_ANALOG_PMU_REG0_TARG_MASK;
|
||||
|
||||
/* Convert mV to target value. Clamp target to valid range. */
|
||||
if (mv < 725)
|
||||
newtarg = 0x00;
|
||||
else if (mv > 1450)
|
||||
newtarg = 0x1F;
|
||||
else
|
||||
newtarg = (mv - 700) / 25;
|
||||
|
||||
/*
|
||||
* The first time through the 3 voltages might not be equal so use a
|
||||
* long conservative delay. After that we need to delay 3uS for every
|
||||
* 25mV step upward. No need to delay at all when lowering.
|
||||
*/
|
||||
if (init_done) {
|
||||
if (newtarg == oldtarg)
|
||||
return;
|
||||
else if (newtarg > oldtarg)
|
||||
delay = (newtarg - oldtarg) * 3;
|
||||
else
|
||||
delay = 0;
|
||||
} else {
|
||||
delay = 700 / 25 * 3;
|
||||
init_done = true;
|
||||
}
|
||||
|
||||
/*
|
||||
* Make the change and wait for it to take effect.
|
||||
*/
|
||||
pmureg &= ~(IMX6_ANALOG_PMU_REG0_TARG_MASK |
|
||||
IMX6_ANALOG_PMU_REG1_TARG_MASK |
|
||||
IMX6_ANALOG_PMU_REG2_TARG_MASK);
|
||||
|
||||
pmureg |= newtarg << IMX6_ANALOG_PMU_REG0_TARG_SHIFT;
|
||||
pmureg |= newtarg << IMX6_ANALOG_PMU_REG1_TARG_SHIFT;
|
||||
pmureg |= newtarg << IMX6_ANALOG_PMU_REG2_TARG_SHIFT;
|
||||
|
||||
imx6_anatop_write_4(IMX6_ANALOG_PMU_REG_CORE, pmureg);
|
||||
DELAY(delay);
|
||||
sc->cpu_curmv = newtarg * 25 + 700;
|
||||
device_printf(sc->dev, "voltage set to %u\n", sc->cpu_curmv);
|
||||
}
|
||||
|
||||
static inline uint32_t
|
||||
cpufreq_hz_from_div(struct imx6_anatop_softc *sc, uint32_t div)
|
||||
{
|
||||
@ -231,7 +296,9 @@ cpufreq_initialize(struct imx6_anatop_softc *sc)
|
||||
FSL_OCOTP_CFG3_SPEED_MASK) >> FSL_OCOTP_CFG3_SPEED_SHIFT;
|
||||
|
||||
sc->cpu_minhz = cpufreq_actual_hz(sc, imx6_cpu_maxhz_tab[0]);
|
||||
sc->cpu_minmv = imx6_cpu_millivolt_tab[0];
|
||||
sc->cpu_maxhz = cpufreq_actual_hz(sc, imx6_cpu_maxhz_tab[cfg3speed]);
|
||||
sc->cpu_maxmv = imx6_cpu_millivolt_tab[cfg3speed];
|
||||
|
||||
/*
|
||||
* Set the CPU to maximum speed.
|
||||
@ -241,6 +308,7 @@ cpufreq_initialize(struct imx6_anatop_softc *sc)
|
||||
* basically assumes that a single core can't overheat before interrupts
|
||||
* are enabled; empirical testing shows that to be a safe assumption.
|
||||
*/
|
||||
vdd_set(sc, sc->cpu_maxmv);
|
||||
cpufreq_set_clock(sc, sc->cpu_maxhz);
|
||||
device_printf(sc->dev, "CPU frequency %uMHz\n", sc->cpu_curmhz);
|
||||
}
|
||||
@ -321,6 +389,7 @@ tempmon_gofast(struct imx6_anatop_softc *sc)
|
||||
{
|
||||
|
||||
if (sc->cpu_curhz < sc->cpu_maxhz) {
|
||||
vdd_set(sc, sc->cpu_maxmv);
|
||||
cpufreq_set_clock(sc, sc->cpu_maxhz);
|
||||
}
|
||||
}
|
||||
@ -331,6 +400,7 @@ tempmon_goslow(struct imx6_anatop_softc *sc)
|
||||
|
||||
if (sc->cpu_curhz > sc->cpu_minhz) {
|
||||
cpufreq_set_clock(sc, sc->cpu_minhz);
|
||||
vdd_set(sc, sc->cpu_minmv);
|
||||
}
|
||||
}
|
||||
|
||||
@ -451,6 +521,11 @@ imx6_anatop_attach(device_t dev)
|
||||
if (err != 0)
|
||||
goto out;
|
||||
|
||||
SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
|
||||
SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
|
||||
OID_AUTO, "cpu_voltage", CTLFLAG_RD,
|
||||
&sc->cpu_curmv, 0, "Current CPU voltage in millivolts");
|
||||
|
||||
imx6_anatop_sc = sc;
|
||||
|
||||
/*
|
||||
|
@ -92,6 +92,7 @@ ccm_attach(device_t dev)
|
||||
{
|
||||
struct ccm_softc *sc;
|
||||
int err, rid;
|
||||
uint32_t reg;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
err = 0;
|
||||
@ -107,6 +108,26 @@ ccm_attach(device_t dev)
|
||||
}
|
||||
|
||||
ccm_sc = sc;
|
||||
|
||||
/*
|
||||
* Configure the Low Power Mode setting to leave the ARM core power on
|
||||
* when a WFI instruction is executed. This lets the MPCore timers and
|
||||
* GIC continue to run, which is helpful when the only thing that can
|
||||
* wake you up is an MPCore Private Timer interrupt delivered via GIC.
|
||||
*
|
||||
* XXX Based on the docs, setting CCM_CGPR_INT_MEM_CLK_LPM shouldn't be
|
||||
* required when the LPM bits are set to LPM_RUN. But experimentally
|
||||
* I've experienced a fairly rare lockup when not setting it. I was
|
||||
* unable to prove conclusively that the lockup was related to power
|
||||
* management or that this definitively fixes it. Revisit this.
|
||||
*/
|
||||
reg = RD4(sc, CCM_CGPR);
|
||||
reg |= CCM_CGPR_INT_MEM_CLK_LPM;
|
||||
WR4(sc, CCM_CGPR, reg);
|
||||
reg = RD4(sc, CCM_CLPCR);
|
||||
reg = (reg & ~CCM_CLPCR_LPM_MASK) | CCM_CLPCR_LPM_RUN;
|
||||
WR4(sc, CCM_CLPCR, reg);
|
||||
|
||||
err = 0;
|
||||
|
||||
out:
|
||||
|
@ -29,13 +29,20 @@
|
||||
#ifndef IMX6_CCMREG_H
|
||||
#define IMX6_CCMREG_H
|
||||
|
||||
#define CCM_CCGR1 0x06C
|
||||
#define CCM_CCGR2 0x070
|
||||
#define CCM_CCGR3 0x074
|
||||
#define CCM_CCGR4 0x078
|
||||
#define CCM_CCGR5 0x07C
|
||||
#define CCM_CCGR6 0x080
|
||||
#define CCM_CMEOR 0x088
|
||||
#define CCM_CLPCR 0x054
|
||||
#define CCM_CLPCR_LPM_MASK 0x03
|
||||
#define CCM_CLPCR_LPM_RUN 0x00
|
||||
#define CCM_CLPCR_LPM_WAIT 0x01
|
||||
#define CCM_CLPCR_LPM_STOP 0x02
|
||||
#define CCM_CGPR 0x064
|
||||
#define CCM_CGPR_INT_MEM_CLK_LPM (1 << 17)
|
||||
#define CCM_CCGR1 0x06C
|
||||
#define CCM_CCGR2 0x070
|
||||
#define CCM_CCGR3 0x074
|
||||
#define CCM_CCGR4 0x078
|
||||
#define CCM_CCGR5 0x07C
|
||||
#define CCM_CCGR6 0x080
|
||||
#define CCM_CMEOR 0x088
|
||||
|
||||
|
||||
#endif
|
||||
|
@ -23,6 +23,7 @@ arm/freescale/vybrid/vf_mscm.c standard
|
||||
arm/freescale/vybrid/vf_src.c standard
|
||||
arm/freescale/vybrid/vf_edma.c standard
|
||||
arm/freescale/vybrid/vf_dmamux.c standard
|
||||
arm/freescale/vybrid/vf_i2c.c optional iicbus
|
||||
arm/freescale/vybrid/vf_tcon.c optional vt
|
||||
arm/freescale/vybrid/vf_dcu4.c optional vt
|
||||
arm/freescale/vybrid/vf_nfc.c optional nand
|
||||
|
471
sys/arm/freescale/vybrid/vf_i2c.c
Normal file
471
sys/arm/freescale/vybrid/vf_i2c.c
Normal file
@ -0,0 +1,471 @@
|
||||
/*-
|
||||
* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Vybrid Family Inter-Integrated Circuit (I2C)
|
||||
* Chapter 48, Vybrid Reference Manual, Rev. 5, 07/2013
|
||||
*/
|
||||
|
||||
/*
|
||||
* This driver is based on the I2C driver for IMX (imx/i2c.c).
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/rman.h>
|
||||
#include <sys/timeet.h>
|
||||
#include <sys/timetc.h>
|
||||
|
||||
#include <dev/iicbus/iiconf.h>
|
||||
#include <dev/iicbus/iicbus.h>
|
||||
|
||||
#include "iicbus_if.h"
|
||||
|
||||
#include <dev/fdt/fdt_common.h>
|
||||
#include <dev/ofw/openfirm.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/fdt.h>
|
||||
#include <machine/cpu.h>
|
||||
#include <machine/intr.h>
|
||||
|
||||
#include <arm/freescale/vybrid/vf_common.h>
|
||||
|
||||
#define I2C_IBAD 0x0 /* I2C Bus Address Register */
|
||||
#define I2C_IBFD 0x1 /* I2C Bus Frequency Divider Register */
|
||||
#define I2C_IBCR 0x2 /* I2C Bus Control Register */
|
||||
#define IBCR_MDIS (1 << 7) /* Module disable. */
|
||||
#define IBCR_IBIE (1 << 6) /* I-Bus Interrupt Enable. */
|
||||
#define IBCR_MSSL (1 << 5) /* Master/Slave mode select. */
|
||||
#define IBCR_TXRX (1 << 4) /* Transmit/Receive mode select. */
|
||||
#define IBCR_NOACK (1 << 3) /* Data Acknowledge disable. */
|
||||
#define IBCR_RSTA (1 << 2) /* Repeat Start. */
|
||||
#define IBCR_DMAEN (1 << 1) /* DMA Enable. */
|
||||
#define I2C_IBSR 0x3 /* I2C Bus Status Register */
|
||||
#define IBSR_TCF (1 << 7) /* Transfer complete. */
|
||||
#define IBSR_IAAS (1 << 6) /* Addressed as a slave. */
|
||||
#define IBSR_IBB (1 << 5) /* Bus busy. */
|
||||
#define IBSR_IBAL (1 << 4) /* Arbitration Lost. */
|
||||
#define IBSR_SRW (1 << 2) /* Slave Read/Write. */
|
||||
#define IBSR_IBIF (1 << 1) /* I-Bus Interrupt Flag. */
|
||||
#define IBSR_RXAK (1 << 0) /* Received Acknowledge. */
|
||||
#define I2C_IBDR 0x4 /* I2C Bus Data I/O Register */
|
||||
#define I2C_IBIC 0x5 /* I2C Bus Interrupt Config Register */
|
||||
#define IBIC_BIIE (1 << 7) /* Bus Idle Interrupt Enable bit. */
|
||||
#define I2C_IBDBG 0x6 /* I2C Bus Debug Register */
|
||||
|
||||
#ifdef DEBUG
|
||||
#define vf_i2c_dbg(_sc, fmt, args...) \
|
||||
device_printf((_sc)->dev, fmt, ##args)
|
||||
#else
|
||||
#define vf_i2c_dbg(_sc, fmt, args...)
|
||||
#endif
|
||||
|
||||
static int i2c_repeated_start(device_t, u_char, int);
|
||||
static int i2c_start(device_t, u_char, int);
|
||||
static int i2c_stop(device_t);
|
||||
static int i2c_reset(device_t, u_char, u_char, u_char *);
|
||||
static int i2c_read(device_t, char *, int, int *, int, int);
|
||||
static int i2c_write(device_t, const char *, int, int *, int);
|
||||
|
||||
struct i2c_softc {
|
||||
struct resource *res[2];
|
||||
bus_space_tag_t bst;
|
||||
bus_space_handle_t bsh;
|
||||
device_t dev;
|
||||
device_t iicbus;
|
||||
struct mtx mutex;
|
||||
};
|
||||
|
||||
static struct resource_spec i2c_spec[] = {
|
||||
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
|
||||
{ SYS_RES_IRQ, 0, RF_ACTIVE },
|
||||
{ -1, 0 }
|
||||
};
|
||||
|
||||
static int
|
||||
i2c_probe(device_t dev)
|
||||
{
|
||||
|
||||
if (!ofw_bus_status_okay(dev))
|
||||
return (ENXIO);
|
||||
|
||||
if (!ofw_bus_is_compatible(dev, "fsl,mvf600-i2c"))
|
||||
return (ENXIO);
|
||||
|
||||
device_set_desc(dev, "Vybrid Family Inter-Integrated Circuit (I2C)");
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_attach(device_t dev)
|
||||
{
|
||||
struct i2c_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
sc->dev = dev;
|
||||
|
||||
mtx_init(&sc->mutex, device_get_nameunit(dev), "I2C", MTX_DEF);
|
||||
|
||||
if (bus_alloc_resources(dev, i2c_spec, sc->res)) {
|
||||
device_printf(dev, "could not allocate resources\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
/* Memory interface */
|
||||
sc->bst = rman_get_bustag(sc->res[0]);
|
||||
sc->bsh = rman_get_bushandle(sc->res[0]);
|
||||
|
||||
WRITE1(sc, I2C_IBIC, IBIC_BIIE);
|
||||
|
||||
sc->iicbus = device_add_child(dev, "iicbus", -1);
|
||||
if (sc->iicbus == NULL) {
|
||||
device_printf(dev, "could not add iicbus child");
|
||||
mtx_destroy(&sc->mutex);
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
bus_generic_attach(dev);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* Wait for transfer interrupt flag */
|
||||
static int
|
||||
wait_for_iif(struct i2c_softc *sc)
|
||||
{
|
||||
int retry;
|
||||
|
||||
retry = 1000;
|
||||
while (retry --) {
|
||||
if (READ1(sc, I2C_IBSR) & IBSR_IBIF) {
|
||||
WRITE1(sc, I2C_IBSR, IBSR_IBIF);
|
||||
return (IIC_NOERR);
|
||||
}
|
||||
DELAY(10);
|
||||
}
|
||||
|
||||
return (IIC_ETIMEOUT);
|
||||
}
|
||||
|
||||
/* Wait for free bus */
|
||||
static int
|
||||
wait_for_nibb(struct i2c_softc *sc)
|
||||
{
|
||||
int retry;
|
||||
|
||||
retry = 1000;
|
||||
while (retry --) {
|
||||
if ((READ1(sc, I2C_IBSR) & IBSR_IBB) == 0)
|
||||
return (IIC_NOERR);
|
||||
DELAY(10);
|
||||
}
|
||||
|
||||
return (IIC_ETIMEOUT);
|
||||
}
|
||||
|
||||
/* Wait for transfer complete+interrupt flag */
|
||||
static int
|
||||
wait_for_icf(struct i2c_softc *sc)
|
||||
{
|
||||
int retry;
|
||||
|
||||
retry = 1000;
|
||||
while (retry --) {
|
||||
if (READ1(sc, I2C_IBSR) & IBSR_TCF) {
|
||||
if (READ1(sc, I2C_IBSR) & IBSR_IBIF) {
|
||||
WRITE1(sc, I2C_IBSR, IBSR_IBIF);
|
||||
return (IIC_NOERR);
|
||||
}
|
||||
}
|
||||
DELAY(10);
|
||||
}
|
||||
|
||||
return (IIC_ETIMEOUT);
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_repeated_start(device_t dev, u_char slave, int timeout)
|
||||
{
|
||||
struct i2c_softc *sc;
|
||||
int error;
|
||||
int reg;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
vf_i2c_dbg(sc, "i2c repeated start\n");
|
||||
|
||||
mtx_lock(&sc->mutex);
|
||||
|
||||
WRITE1(sc, I2C_IBAD, slave);
|
||||
|
||||
if ((READ1(sc, I2C_IBSR) & IBSR_IBB) == 0) {
|
||||
mtx_unlock(&sc->mutex);
|
||||
return (IIC_EBUSBSY);
|
||||
}
|
||||
|
||||
/* Set repeated start condition */
|
||||
DELAY(10);
|
||||
|
||||
reg = READ1(sc, I2C_IBCR);
|
||||
reg |= (IBCR_RSTA | IBCR_IBIE);
|
||||
WRITE1(sc, I2C_IBCR, reg);
|
||||
|
||||
DELAY(10);
|
||||
|
||||
/* Write target address - LSB is R/W bit */
|
||||
WRITE1(sc, I2C_IBDR, slave);
|
||||
|
||||
error = wait_for_iif(sc);
|
||||
|
||||
mtx_unlock(&sc->mutex);
|
||||
|
||||
if (error)
|
||||
return (error);
|
||||
|
||||
return (IIC_NOERR);
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_start(device_t dev, u_char slave, int timeout)
|
||||
{
|
||||
struct i2c_softc *sc;
|
||||
int error;
|
||||
int reg;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
vf_i2c_dbg(sc, "i2c start\n");
|
||||
|
||||
mtx_lock(&sc->mutex);
|
||||
|
||||
WRITE1(sc, I2C_IBAD, slave);
|
||||
|
||||
if (READ1(sc, I2C_IBSR) & IBSR_IBB) {
|
||||
mtx_unlock(&sc->mutex);
|
||||
vf_i2c_dbg(sc, "cant i2c start: IIC_EBUSBSY\n");
|
||||
return (IIC_EBUSBSY);
|
||||
}
|
||||
|
||||
/* Set start condition */
|
||||
reg = (IBCR_MSSL | IBCR_NOACK | IBCR_IBIE);
|
||||
WRITE1(sc, I2C_IBCR, reg);
|
||||
|
||||
DELAY(100);
|
||||
|
||||
reg |= (IBCR_TXRX);
|
||||
WRITE1(sc, I2C_IBCR, reg);
|
||||
|
||||
/* Write target address - LSB is R/W bit */
|
||||
WRITE1(sc, I2C_IBDR, slave);
|
||||
|
||||
error = wait_for_iif(sc);
|
||||
|
||||
mtx_unlock(&sc->mutex);
|
||||
if (error) {
|
||||
vf_i2c_dbg(sc, "cant i2c start: iif error\n");
|
||||
return (error);
|
||||
}
|
||||
|
||||
return (IIC_NOERR);
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_stop(device_t dev)
|
||||
{
|
||||
struct i2c_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
vf_i2c_dbg(sc, "i2c stop\n");
|
||||
|
||||
mtx_lock(&sc->mutex);
|
||||
|
||||
WRITE1(sc, I2C_IBCR, IBCR_NOACK | IBCR_IBIE);
|
||||
|
||||
DELAY(100);
|
||||
|
||||
/* Reset controller if bus still busy after STOP */
|
||||
if (wait_for_nibb(sc) == IIC_ETIMEOUT) {
|
||||
WRITE1(sc, I2C_IBCR, IBCR_MDIS);
|
||||
DELAY(1000);
|
||||
WRITE1(sc, I2C_IBCR, IBCR_NOACK);
|
||||
}
|
||||
mtx_unlock(&sc->mutex);
|
||||
|
||||
return (IIC_NOERR);
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr)
|
||||
{
|
||||
struct i2c_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
vf_i2c_dbg(sc, "i2c reset\n");
|
||||
|
||||
switch (speed) {
|
||||
case IIC_FAST:
|
||||
case IIC_SLOW:
|
||||
case IIC_UNKNOWN:
|
||||
case IIC_FASTEST:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
mtx_lock(&sc->mutex);
|
||||
WRITE1(sc, I2C_IBCR, IBCR_MDIS);
|
||||
|
||||
DELAY(1000);
|
||||
|
||||
WRITE1(sc, I2C_IBFD, 20);
|
||||
WRITE1(sc, I2C_IBCR, 0x0); /* Enable i2c */
|
||||
|
||||
DELAY(1000);
|
||||
|
||||
mtx_unlock(&sc->mutex);
|
||||
|
||||
return (IIC_NOERR);
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay)
|
||||
{
|
||||
struct i2c_softc *sc;
|
||||
int error;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
vf_i2c_dbg(sc, "i2c read\n");
|
||||
|
||||
*read = 0;
|
||||
|
||||
mtx_lock(&sc->mutex);
|
||||
|
||||
if (len) {
|
||||
if (len == 1)
|
||||
WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL | \
|
||||
IBCR_NOACK);
|
||||
else
|
||||
WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL);
|
||||
|
||||
/* dummy read */
|
||||
READ1(sc, I2C_IBDR);
|
||||
DELAY(1000);
|
||||
}
|
||||
|
||||
while (*read < len) {
|
||||
error = wait_for_icf(sc);
|
||||
if (error) {
|
||||
mtx_unlock(&sc->mutex);
|
||||
return (error);
|
||||
}
|
||||
|
||||
if ((*read == len - 2) && last) {
|
||||
/* NO ACK on last byte */
|
||||
WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL | \
|
||||
IBCR_NOACK);
|
||||
}
|
||||
|
||||
if ((*read == len - 1) && last) {
|
||||
/* Transfer done, remove master bit */
|
||||
WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_NOACK);
|
||||
}
|
||||
|
||||
*buf++ = READ1(sc, I2C_IBDR);
|
||||
(*read)++;
|
||||
}
|
||||
mtx_unlock(&sc->mutex);
|
||||
|
||||
return (IIC_NOERR);
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout)
|
||||
{
|
||||
struct i2c_softc *sc;
|
||||
int error;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
vf_i2c_dbg(sc, "i2c write\n");
|
||||
|
||||
*sent = 0;
|
||||
|
||||
mtx_lock(&sc->mutex);
|
||||
while (*sent < len) {
|
||||
|
||||
WRITE1(sc, I2C_IBDR, *buf++);
|
||||
|
||||
error = wait_for_iif(sc);
|
||||
if (error) {
|
||||
mtx_unlock(&sc->mutex);
|
||||
return (error);
|
||||
}
|
||||
|
||||
(*sent)++;
|
||||
}
|
||||
mtx_unlock(&sc->mutex);
|
||||
|
||||
return (IIC_NOERR);
|
||||
}
|
||||
|
||||
static device_method_t i2c_methods[] = {
|
||||
DEVMETHOD(device_probe, i2c_probe),
|
||||
DEVMETHOD(device_attach, i2c_attach),
|
||||
|
||||
DEVMETHOD(iicbus_callback, iicbus_null_callback),
|
||||
DEVMETHOD(iicbus_repeated_start, i2c_repeated_start),
|
||||
DEVMETHOD(iicbus_start, i2c_start),
|
||||
DEVMETHOD(iicbus_stop, i2c_stop),
|
||||
DEVMETHOD(iicbus_reset, i2c_reset),
|
||||
DEVMETHOD(iicbus_read, i2c_read),
|
||||
DEVMETHOD(iicbus_write, i2c_write),
|
||||
DEVMETHOD(iicbus_transfer, iicbus_transfer_gen),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t i2c_driver = {
|
||||
"i2c",
|
||||
i2c_methods,
|
||||
sizeof(struct i2c_softc),
|
||||
};
|
||||
|
||||
static devclass_t i2c_devclass;
|
||||
|
||||
DRIVER_MODULE(i2c, simplebus, i2c_driver, i2c_devclass, 0, 0);
|
||||
DRIVER_MODULE(iicbus, i2c, iicbus_driver, iicbus_devclass, 0, 0);
|
@ -523,6 +523,7 @@ void armv7_setup (char *string);
|
||||
void armv7_context_switch (void);
|
||||
void armv7_drain_writebuf (void);
|
||||
void armv7_sev (void);
|
||||
void armv7_sleep (int unused);
|
||||
u_int armv7_auxctrl (u_int, u_int);
|
||||
void pj4bv7_setup (char *string);
|
||||
void pj4b_config (void);
|
||||
|
@ -207,6 +207,7 @@ geom_nop_load="NO" # Transparent disk driver (see gnop(8))
|
||||
geom_raid3_load="NO" # RAID3 disk driver (see graid3(8))
|
||||
geom_shsec_load="NO" # Shared secret disk driver (see gshsec(8))
|
||||
geom_stripe_load="NO" # RAID0 disk driver (see gstripe(8))
|
||||
geom_uncompress_load="NO" # Compressed disk images driver (see mkulzma(8))
|
||||
geom_uzip_load="NO" # Compressed disk images driver (see mkuzip(8))
|
||||
geom_vinum_load="NO" # Concatenated/mirror/raid driver (see vinum(4))
|
||||
|
||||
|
@ -155,7 +155,7 @@
|
||||
int dtrace_destructive_disallow = 0;
|
||||
dtrace_optval_t dtrace_nonroot_maxsize = (16 * 1024 * 1024);
|
||||
size_t dtrace_difo_maxsize = (256 * 1024);
|
||||
dtrace_optval_t dtrace_dof_maxsize = (256 * 1024);
|
||||
dtrace_optval_t dtrace_dof_maxsize = (8 * 1024 * 1024);
|
||||
size_t dtrace_global_maxsize = (16 * 1024);
|
||||
size_t dtrace_actions_max = (16 * 1024);
|
||||
size_t dtrace_retain_max = 1024;
|
||||
|
@ -47,7 +47,7 @@
|
||||
#include <sys/types.h>
|
||||
#include <sys/proc.h>
|
||||
#include <sys/dtrace_bsd.h>
|
||||
#include <cddl/dev/dtrace/i386/regset.h>
|
||||
#include <cddl/dev/dtrace/x86/regset.h>
|
||||
#include <machine/segments.h>
|
||||
#include <machine/reg.h>
|
||||
#include <machine/pcb.h>
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,110 +0,0 @@
|
||||
/*
|
||||
* CDDL HEADER START
|
||||
*
|
||||
* The contents of this file are subject to the terms of the
|
||||
* Common Development and Distribution License (the "License").
|
||||
* You may not use this file except in compliance with the License.
|
||||
*
|
||||
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
|
||||
* or http://www.opensolaris.org/os/licensing.
|
||||
* See the License for the specific language governing permissions
|
||||
* and limitations under the License.
|
||||
*
|
||||
* When distributing Covered Code, include this CDDL HEADER in each
|
||||
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
|
||||
* If applicable, add the following below this CDDL HEADER, with the
|
||||
* fields enclosed by brackets "[]" replaced with your own identifying
|
||||
* information: Portions Copyright [yyyy] [name of copyright owner]
|
||||
*
|
||||
* CDDL HEADER END
|
||||
*/
|
||||
/*
|
||||
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
|
||||
* Use is subject to license terms.
|
||||
*/
|
||||
|
||||
/* Copyright (c) 1988 AT&T */
|
||||
/* All Rights Reserved */
|
||||
|
||||
/*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _DIS_TABLES_H
|
||||
#define _DIS_TABLES_H
|
||||
|
||||
/*
|
||||
* Constants and prototypes for the IA32 disassembler backend. See dis_tables.c
|
||||
* for usage information and documentation.
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/param.h>
|
||||
|
||||
/*
|
||||
* values for cpu mode
|
||||
*/
|
||||
#define SIZE16 1
|
||||
#define SIZE32 2
|
||||
#define SIZE64 3
|
||||
|
||||
#define OPLEN 256
|
||||
#define PFIXLEN 8
|
||||
#define NCPS 20 /* number of chars per symbol */
|
||||
|
||||
/*
|
||||
* data structures that must be provided to dtrace_dis86()
|
||||
*/
|
||||
typedef struct d86opnd {
|
||||
char d86_opnd[OPLEN]; /* symbolic rep of operand */
|
||||
char d86_prefix[PFIXLEN]; /* any prefix string or "" */
|
||||
uint_t d86_mode; /* mode for immediate */
|
||||
uint_t d86_value_size; /* size in bytes of d86_value */
|
||||
uint64_t d86_value; /* immediate value of opnd */
|
||||
} d86opnd_t;
|
||||
|
||||
typedef struct dis86 {
|
||||
uint_t d86_mode;
|
||||
uint_t d86_error;
|
||||
uint_t d86_len; /* instruction length */
|
||||
int d86_rmindex; /* index of modrm byte or -1 */
|
||||
uint_t d86_memsize; /* size of memory referenced */
|
||||
char d86_bytes[16]; /* bytes of instruction */
|
||||
char d86_mnem[OPLEN];
|
||||
uint_t d86_numopnds;
|
||||
uint_t d86_rex_prefix; /* value of REX prefix if !0 */
|
||||
char *d86_seg_prefix; /* segment prefix, if any */
|
||||
uint_t d86_opnd_size;
|
||||
uint_t d86_addr_size;
|
||||
uint_t d86_got_modrm;
|
||||
struct d86opnd d86_opnd[4]; /* up to 4 operands */
|
||||
int (*d86_check_func)(void *);
|
||||
int (*d86_get_byte)(void *);
|
||||
#ifdef DIS_TEXT
|
||||
int (*d86_sym_lookup)(void *, uint64_t, char *, size_t);
|
||||
int (*d86_sprintf_func)(char *, size_t, const char *, ...);
|
||||
int d86_flags;
|
||||
uint_t d86_imm_bytes;
|
||||
#endif
|
||||
void *d86_data;
|
||||
} dis86_t;
|
||||
|
||||
extern int dtrace_disx86(dis86_t *x, uint_t cpu_mode);
|
||||
|
||||
#define DIS_F_OCTAL 0x1 /* Print all numbers in octal */
|
||||
#define DIS_F_NOIMMSYM 0x2 /* Don't print symbols for immediates (.o) */
|
||||
|
||||
#ifdef DIS_TEXT
|
||||
extern void dtrace_disx86_str(dis86_t *x, uint_t cpu_mode, uint64_t pc,
|
||||
char *buf, size_t len);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _DIS_TABLES_H */
|
@ -1,127 +0,0 @@
|
||||
/*
|
||||
* CDDL HEADER START
|
||||
*
|
||||
* The contents of this file are subject to the terms of the
|
||||
* Common Development and Distribution License, Version 1.0 only
|
||||
* (the "License"). You may not use this file except in compliance
|
||||
* with the License.
|
||||
*
|
||||
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
|
||||
* or http://www.opensolaris.org/os/licensing.
|
||||
* See the License for the specific language governing permissions
|
||||
* and limitations under the License.
|
||||
*
|
||||
* When distributing Covered Code, include this CDDL HEADER in each
|
||||
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
|
||||
* If applicable, add the following below this CDDL HEADER, with the
|
||||
* fields enclosed by brackets "[]" replaced with your own identifying
|
||||
* information: Portions Copyright [yyyy] [name of copyright owner]
|
||||
*
|
||||
* CDDL HEADER END
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
/*
|
||||
* Copyright 2004 Sun Microsystems, Inc. All rights reserved.
|
||||
* Use is subject to license terms.
|
||||
*/
|
||||
|
||||
/* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
|
||||
|
||||
/* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
|
||||
/* All Rights Reserved */
|
||||
|
||||
#ifndef _REGSET_H
|
||||
#define _REGSET_H
|
||||
|
||||
/*
|
||||
* #pragma ident "@(#)regset.h 1.11 05/06/08 SMI"
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The names and offsets defined here should be specified by the
|
||||
* AMD64 ABI suppl.
|
||||
*
|
||||
* We make fsbase and gsbase part of the lwp context (since they're
|
||||
* the only way to access the full 64-bit address range via the segment
|
||||
* registers) and thus belong here too. However we treat them as
|
||||
* read-only; if %fs or %gs are updated, the results of the descriptor
|
||||
* table lookup that those updates implicitly cause will be reflected
|
||||
* in the corresponding fsbase and/or gsbase values the next time the
|
||||
* context can be inspected. However it is NOT possible to override
|
||||
* the fsbase/gsbase settings via this interface.
|
||||
*
|
||||
* Direct modification of the base registers (thus overriding the
|
||||
* descriptor table base address) can be achieved with _lwp_setprivate.
|
||||
*/
|
||||
|
||||
#define REG_GSBASE 27
|
||||
#define REG_FSBASE 26
|
||||
#define REG_DS 25
|
||||
#define REG_ES 24
|
||||
|
||||
#define REG_GS 23
|
||||
#define REG_FS 22
|
||||
#define REG_SS 21
|
||||
#define REG_RSP 20
|
||||
#define REG_RFL 19
|
||||
#define REG_CS 18
|
||||
#define REG_RIP 17
|
||||
#define REG_ERR 16
|
||||
#define REG_TRAPNO 15
|
||||
#define REG_RAX 14
|
||||
#define REG_RCX 13
|
||||
#define REG_RDX 12
|
||||
#define REG_RBX 11
|
||||
#define REG_RBP 10
|
||||
#define REG_RSI 9
|
||||
#define REG_RDI 8
|
||||
#define REG_R8 7
|
||||
#define REG_R9 6
|
||||
#define REG_R10 5
|
||||
#define REG_R11 4
|
||||
#define REG_R12 3
|
||||
#define REG_R13 2
|
||||
#define REG_R14 1
|
||||
#define REG_R15 0
|
||||
|
||||
/*
|
||||
* The names and offsets defined here are specified by i386 ABI suppl.
|
||||
*/
|
||||
|
||||
#define SS 18 /* only stored on a privilege transition */
|
||||
#define UESP 17 /* only stored on a privilege transition */
|
||||
#define EFL 16
|
||||
#define CS 15
|
||||
#define EIP 14
|
||||
#define ERR 13
|
||||
#define TRAPNO 12
|
||||
#define EAX 11
|
||||
#define ECX 10
|
||||
#define EDX 9
|
||||
#define EBX 8
|
||||
#define ESP 7
|
||||
#define EBP 6
|
||||
#define ESI 5
|
||||
#define EDI 4
|
||||
#define DS 3
|
||||
#define ES 2
|
||||
#define FS 1
|
||||
#define GS 0
|
||||
|
||||
#define REG_PC EIP
|
||||
#define REG_FP EBP
|
||||
#define REG_SP UESP
|
||||
#define REG_PS EFL
|
||||
#define REG_R0 EAX
|
||||
#define REG_R1 EDX
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _REGSET_H */
|
@ -61,6 +61,7 @@ extern "C" {
|
||||
|
||||
#define REG_GSBASE 27
|
||||
#define REG_FSBASE 26
|
||||
#if defined(sun)
|
||||
#define REG_DS 25
|
||||
#define REG_ES 24
|
||||
|
||||
@ -88,11 +89,40 @@ extern "C" {
|
||||
#define REG_R13 2
|
||||
#define REG_R14 1
|
||||
#define REG_R15 0
|
||||
#else
|
||||
#define REG_SS 25
|
||||
#define REG_RSP 24
|
||||
#define REG_RFL 23
|
||||
#define REG_CS 22
|
||||
#define REG_RIP 21
|
||||
#define REG_DS 20
|
||||
#define REG_ES 19
|
||||
#define REG_ERR 18
|
||||
#define REG_GS 17
|
||||
#define REG_FS 16
|
||||
#define REG_TRAPNO 15
|
||||
#define REG_RAX 14
|
||||
#define REG_RCX 13
|
||||
#define REG_RDX 12
|
||||
#define REG_RBX 11
|
||||
#define REG_RBP 10
|
||||
#define REG_RSI 9
|
||||
#define REG_RDI 8
|
||||
#define REG_R8 7
|
||||
#define REG_R9 6
|
||||
#define REG_R10 5
|
||||
#define REG_R11 4
|
||||
#define REG_R12 3
|
||||
#define REG_R13 2
|
||||
#define REG_R14 1
|
||||
#define REG_R15 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The names and offsets defined here are specified by i386 ABI suppl.
|
||||
*/
|
||||
|
||||
#if defined(sun)
|
||||
#define SS 18 /* only stored on a privilege transition */
|
||||
#define UESP 17 /* only stored on a privilege transition */
|
||||
#define EFL 16
|
||||
@ -112,6 +142,27 @@ extern "C" {
|
||||
#define ES 2
|
||||
#define FS 1
|
||||
#define GS 0
|
||||
#else
|
||||
#define GS 18
|
||||
#define SS 17 /* only stored on a privilege transition */
|
||||
#define UESP 16 /* only stored on a privilege transition */
|
||||
#define EFL 15
|
||||
#define CS 14
|
||||
#define EIP 13
|
||||
#define ERR 12
|
||||
#define TRAPNO 11
|
||||
#define EAX 10
|
||||
#define ECX 9
|
||||
#define EDX 8
|
||||
#define EBX 7
|
||||
#define ESP 6
|
||||
#define EBP 5
|
||||
#define ESI 4
|
||||
#define EDI 3
|
||||
#define DS 2
|
||||
#define ES 1
|
||||
#define FS 0
|
||||
#endif
|
||||
|
||||
#define REG_PC EIP
|
||||
#define REG_FP EBP
|
@ -72,6 +72,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <sys/time.h>
|
||||
#include <sys/tty.h>
|
||||
#include <sys/user.h>
|
||||
#include <sys/uuid.h>
|
||||
#include <sys/vmmeter.h>
|
||||
#include <sys/vnode.h>
|
||||
#include <sys/bus.h>
|
||||
@ -1337,6 +1338,22 @@ linprocfs_dofdescfs(PFS_FILL_ARGS)
|
||||
return (0);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Filler function for proc/sys/kernel/random/uuid
|
||||
*/
|
||||
static int
|
||||
linprocfs_douuid(PFS_FILL_ARGS)
|
||||
{
|
||||
struct uuid uuid;
|
||||
|
||||
kern_uuidgen(&uuid, 1);
|
||||
sbuf_printf_uuid(sb, &uuid);
|
||||
sbuf_printf(sb, "\n");
|
||||
return(0);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Constructor
|
||||
*/
|
||||
@ -1436,6 +1453,11 @@ linprocfs_init(PFS_INIT_ARGS)
|
||||
pfs_create_file(dir, "sem", &linprocfs_dosem,
|
||||
NULL, NULL, NULL, PFS_RD);
|
||||
|
||||
/* /proc/sys/kernel/random/... */
|
||||
dir = pfs_create_dir(dir, "random", NULL, NULL, NULL, 0);
|
||||
pfs_create_file(dir, "uuid", &linprocfs_douuid,
|
||||
NULL, NULL, NULL, PFS_RD);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
|
@ -43,3 +43,4 @@ BINDIR=/usr/bin
|
||||
build-tools: ${PROG}
|
||||
|
||||
.include <bsd.prog.mk>
|
||||
CFLAGS+= -Wno-missing-prototypes
|
||||
|
@ -32,18 +32,21 @@
|
||||
#include <sys/bus.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/socket.h>
|
||||
#include <sys/sockio.h>
|
||||
#include <sys/sysctl.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/types.h>
|
||||
|
||||
#include <net/if.h>
|
||||
#include <net/if_arp.h>
|
||||
#include <net/ethernet.h>
|
||||
#include <net/if_dl.h>
|
||||
#include <net/if_media.h>
|
||||
#include <net/if_types.h>
|
||||
#include <net/if_var.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <dev/mii/mii.h>
|
||||
|
@ -32,6 +32,8 @@
|
||||
#include <sys/bus.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/socket.h>
|
||||
|
||||
|
@ -32,6 +32,8 @@
|
||||
#include <sys/bus.h>
|
||||
#include <sys/errno.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/socket.h>
|
||||
|
||||
|
@ -32,6 +32,7 @@ __FBSDID("$FreeBSD$");
|
||||
#include <sys/param.h>
|
||||
#include <sys/pmc.h>
|
||||
#include <sys/pmckern.h>
|
||||
#include <sys/sysent.h>
|
||||
#include <sys/systm.h>
|
||||
|
||||
#include <machine/pmc_mdep.h>
|
||||
@ -60,10 +61,14 @@ pmc_save_kernel_callchain(uintptr_t *cc, int maxsamples,
|
||||
cc[frames++] = PMC_TRAPFRAME_TO_PC(tf);
|
||||
sp = (uintptr_t *)PMC_TRAPFRAME_TO_FP(tf);
|
||||
|
||||
for (frames = 1; frames < maxsamples; frames++) {
|
||||
for (; frames < maxsamples; frames++) {
|
||||
if (!INKERNEL(sp))
|
||||
break;
|
||||
#ifdef __powerpc64__
|
||||
cc[frames++] = sp[2];
|
||||
#else
|
||||
cc[frames++] = sp[1];
|
||||
#endif
|
||||
sp = (uintptr_t *)*sp;
|
||||
}
|
||||
return (frames);
|
||||
@ -72,12 +77,14 @@ pmc_save_kernel_callchain(uintptr_t *cc, int maxsamples,
|
||||
static int
|
||||
powerpc_switch_in(struct pmc_cpu *pc, struct pmc_process *pp)
|
||||
{
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
powerpc_switch_out(struct pmc_cpu *pc, struct pmc_process *pp)
|
||||
{
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
@ -111,6 +118,7 @@ powerpc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
|
||||
int
|
||||
powerpc_get_config(int cpu, int ri, struct pmc **ppm)
|
||||
{
|
||||
|
||||
*ppm = powerpc_pcpu[cpu]->pc_ppcpmcs[ri].phw_pmc;
|
||||
|
||||
return (0);
|
||||
@ -182,11 +190,23 @@ pmc_save_user_callchain(uintptr_t *cc, int maxsamples,
|
||||
cc[frames++] = PMC_TRAPFRAME_TO_PC(tf);
|
||||
sp = (uintptr_t *)PMC_TRAPFRAME_TO_FP(tf);
|
||||
|
||||
for (frames = 1; frames < maxsamples; frames++) {
|
||||
for (; frames < maxsamples; frames++) {
|
||||
if (!INUSER(sp))
|
||||
break;
|
||||
cc[frames++] = fuword(sp + 1);
|
||||
sp = (uintptr_t *)fuword(sp);
|
||||
#ifdef __powerpc64__
|
||||
/* Check if 32-bit mode. */
|
||||
if (!(tf->srr1 & PSL_SF)) {
|
||||
cc[frames++] = fuword32((uint32_t *)sp + 1);
|
||||
sp = (uintptr_t *)(uintptr_t)fuword32(sp);
|
||||
} else {
|
||||
cc[frames++] = fuword(sp + 2);
|
||||
sp = (uintptr_t *)fuword(sp);
|
||||
}
|
||||
#else
|
||||
cc[frames++] = fuword32((uint32_t *)sp + 1);
|
||||
sp = (uintptr_t *)fuword32(sp);
|
||||
#endif
|
||||
}
|
||||
|
||||
return (frames);
|
||||
}
|
||||
|
@ -617,8 +617,8 @@ mps_iocfacts_free(struct mps_softc *sc)
|
||||
|
||||
if (sc->post_busaddr != 0)
|
||||
bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
|
||||
if (sc->post_queue != NULL)
|
||||
bus_dmamem_free(sc->queues_dmat, sc->post_queue,
|
||||
if (sc->free_queue != NULL)
|
||||
bus_dmamem_free(sc->queues_dmat, sc->free_queue,
|
||||
sc->queues_map);
|
||||
if (sc->queues_dmat != NULL)
|
||||
bus_dma_tag_destroy(sc->queues_dmat);
|
||||
|
@ -180,6 +180,9 @@ mpssas_startup_increment(struct mpssas_softc *sassc)
|
||||
/* just starting, freeze the simq */
|
||||
mps_dprint(sassc->sc, MPS_INIT,
|
||||
"%s freezing simq\n", __func__);
|
||||
#if __FreeBSD_version >= 1000039
|
||||
xpt_hold_boot();
|
||||
#endif
|
||||
xpt_freeze_simq(sassc->sim, 1);
|
||||
}
|
||||
mps_dprint(sassc->sc, MPS_INIT, "%s refcount %u\n", __func__,
|
||||
@ -200,10 +203,10 @@ mpssas_startup_decrement(struct mpssas_softc *sassc)
|
||||
mps_dprint(sassc->sc, MPS_INIT,
|
||||
"%s releasing simq\n", __func__);
|
||||
sassc->flags &= ~MPSSAS_IN_STARTUP;
|
||||
xpt_release_simq(sassc->sim, 1);
|
||||
#if __FreeBSD_version >= 1000039
|
||||
xpt_release_boot();
|
||||
#else
|
||||
xpt_release_simq(sassc->sim, 1);
|
||||
mpssas_rescan_target(sassc->sc, NULL);
|
||||
#endif
|
||||
}
|
||||
@ -763,12 +766,8 @@ mps_attach_sas(struct mps_softc *sc)
|
||||
* Hold off boot until discovery is complete.
|
||||
*/
|
||||
sassc->flags |= MPSSAS_IN_STARTUP | MPSSAS_IN_DISCOVERY;
|
||||
#if __FreeBSD_version >= 1000039
|
||||
xpt_hold_boot();
|
||||
#else
|
||||
xpt_freeze_simq(sassc->sim, 1);
|
||||
#endif
|
||||
sc->sassc->startup_refcount = 0;
|
||||
mpssas_startup_increment(sassc);
|
||||
|
||||
callout_init(&sassc->discovery_callout, 1 /*mpsafe*/);
|
||||
sassc->discovery_timeouts = 0;
|
||||
@ -1139,7 +1138,7 @@ mpssas_handle_reinit(struct mps_softc *sc)
|
||||
mps_dprint(sc, MPS_INIT, "%s startup\n", __func__);
|
||||
sc->sassc->flags |= MPSSAS_IN_STARTUP;
|
||||
sc->sassc->flags |= MPSSAS_IN_DISCOVERY;
|
||||
xpt_freeze_simq(sc->sassc->sim, 1);
|
||||
mpssas_startup_increment(sc->sassc);
|
||||
|
||||
/* notify CAM of a bus reset */
|
||||
mpssas_announce_reset(sc, AC_BUS_RESET, CAM_TARGET_WILDCARD,
|
||||
@ -1152,12 +1151,6 @@ mpssas_handle_reinit(struct mps_softc *sc)
|
||||
"%s startup %u tm %u after command completion\n",
|
||||
__func__, sc->sassc->startup_refcount, sc->sassc->tm_count);
|
||||
|
||||
/*
|
||||
* The simq was explicitly frozen above, so set the refcount to 0.
|
||||
* The simq will be explicitly released after port enable completes.
|
||||
*/
|
||||
sc->sassc->startup_refcount = 0;
|
||||
|
||||
/* zero all the target handles, since they may change after the
|
||||
* reset, and we have to rediscover all the targets and use the new
|
||||
* handles.
|
||||
@ -3461,15 +3454,12 @@ mpssas_read_cap_done(struct cam_periph *periph, union ccb *done_ccb)
|
||||
int
|
||||
mpssas_startup(struct mps_softc *sc)
|
||||
{
|
||||
struct mpssas_softc *sassc;
|
||||
|
||||
/*
|
||||
* Send the port enable message and set the wait_for_port_enable flag.
|
||||
* This flag helps to keep the simq frozen until all discovery events
|
||||
* are processed.
|
||||
*/
|
||||
sassc = sc->sassc;
|
||||
mpssas_startup_increment(sassc);
|
||||
sc->wait_for_port_enable = 1;
|
||||
mpssas_send_portenable(sc);
|
||||
return (0);
|
||||
@ -3554,7 +3544,6 @@ mpssas_portenable_complete(struct mps_softc *sc, struct mps_command *cm)
|
||||
sc->port_enable_complete = 1;
|
||||
wakeup(&sc->port_enable_complete);
|
||||
mpssas_startup_decrement(sassc);
|
||||
xpt_release_simq(sassc->sim, 1);
|
||||
}
|
||||
|
||||
int
|
||||
|
@ -32,6 +32,8 @@
|
||||
* is on the board.
|
||||
*/
|
||||
|
||||
#include "opt_platform.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
@ -57,6 +59,12 @@ __FBSDID("$FreeBSD$");
|
||||
#include <dev/nand/nfc_at91.h>
|
||||
#include <arm/at91/at91_smc.h>
|
||||
|
||||
#ifdef FDT
|
||||
#include <dev/fdt/fdt_common.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Data cycles are triggered by access to any address within the EBI CS3 region
|
||||
* that has A21 and A22 clear. Command cycles are any access with bit A21
|
||||
@ -108,7 +116,10 @@ dev_write_1(struct at91_nand_softc *sc, bus_size_t offset, u_int8_t value)
|
||||
static int
|
||||
at91_nand_probe(device_t dev)
|
||||
{
|
||||
|
||||
#ifdef FDT
|
||||
if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-nand"))
|
||||
return (ENXIO);
|
||||
#endif
|
||||
device_set_desc(dev, "AT91 Integrated NAND controller");
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
@ -274,5 +285,9 @@ static driver_t at91_nand_driver = {
|
||||
};
|
||||
|
||||
static devclass_t at91_nand_devclass;
|
||||
DRIVER_MODULE(at91_nand, atmelarm, at91_nand_driver, at91_nand_devclass, 0, 0);
|
||||
|
||||
#ifdef FDT
|
||||
DRIVER_MODULE(at91_nand, simplebus, at91_nand_driver, at91_nand_devclass, 0, 0);
|
||||
#else
|
||||
DRIVER_MODULE(at91_nand, atmelarm, at91_nand_driver, at91_nand_devclass, 0, 0);
|
||||
#endif
|
||||
|
@ -248,7 +248,6 @@ struct tws_softc {
|
||||
struct mtx io_lock; /* IO lock */
|
||||
struct tws_ioctl_lock ioctl_lock; /* ioctl lock */
|
||||
u_int32_t seq_id; /* Sequence id */
|
||||
void *chan; /* IOCTL req wait channel */
|
||||
struct tws_circular_q aen_q; /* aen q */
|
||||
struct tws_circular_q trace_q; /* trace q */
|
||||
struct tws_stats stats; /* I/O stats */
|
||||
|
@ -1297,7 +1297,7 @@ tws_reinit(void *arg)
|
||||
|
||||
tws_turn_on_interrupts(sc);
|
||||
|
||||
wakeup_one(sc->chan);
|
||||
wakeup_one(sc);
|
||||
}
|
||||
|
||||
|
||||
|
@ -103,8 +103,7 @@ tws_passthru(struct tws_softc *sc, void *buf)
|
||||
do {
|
||||
req = tws_get_request(sc, TWS_REQ_TYPE_PASSTHRU);
|
||||
if ( !req ) {
|
||||
sc->chan = (void *)sc;
|
||||
error = tsleep(sc->chan, 0, "tws_sleep", TWS_IOCTL_TIMEOUT*hz);
|
||||
error = tsleep(sc, 0, "tws_sleep", TWS_IOCTL_TIMEOUT*hz);
|
||||
if ( error == EWOULDBLOCK ) {
|
||||
return(ETIMEDOUT);
|
||||
}
|
||||
@ -203,7 +202,7 @@ out_data:
|
||||
//
|
||||
req->state = TWS_REQ_STATE_FREE;
|
||||
|
||||
wakeup_one(sc->chan);
|
||||
wakeup_one(sc);
|
||||
|
||||
return(error);
|
||||
}
|
||||
|
333
sys/dev/usb/controller/at91dci_fdt.c
Normal file
333
sys/dev/usb/controller/at91dci_fdt.c
Normal file
@ -0,0 +1,333 @@
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/stdint.h>
|
||||
#include <sys/stddef.h>
|
||||
#include <sys/param.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/types.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/condvar.h>
|
||||
#include <sys/sysctl.h>
|
||||
#include <sys/sx.h>
|
||||
#include <sys/unistd.h>
|
||||
#include <sys/callout.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/priv.h>
|
||||
|
||||
#include <dev/usb/usb.h>
|
||||
#include <dev/usb/usbdi.h>
|
||||
|
||||
#include <dev/usb/usb_core.h>
|
||||
#include <dev/usb/usb_busdma.h>
|
||||
#include <dev/usb/usb_process.h>
|
||||
#include <dev/usb/usb_util.h>
|
||||
|
||||
#include <dev/usb/usb_controller.h>
|
||||
#include <dev/usb/usb_bus.h>
|
||||
#include <dev/usb/controller/at91dci.h>
|
||||
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <arm/at91/at91_pmcvar.h>
|
||||
#include <arm/at91/at91rm92reg.h>
|
||||
#include <arm/at91/at91_pioreg.h>
|
||||
#include <arm/at91/at91_piovar.h>
|
||||
|
||||
#include <dev/fdt/fdt_common.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
|
||||
#define MEM_RID 0
|
||||
|
||||
/* Pin Definitions - do they belong here or somewhere else ? -- YES! */
|
||||
|
||||
#define VBUS_MASK AT91C_PIO_PB24
|
||||
#define VBUS_BASE AT91RM92_PIOB_BASE
|
||||
|
||||
#define PULLUP_MASK AT91C_PIO_PB22
|
||||
#define PULLUP_BASE AT91RM92_PIOB_BASE
|
||||
|
||||
static device_probe_t at91_udp_probe;
|
||||
static device_attach_t at91_udp_attach;
|
||||
static device_detach_t at91_udp_detach;
|
||||
|
||||
struct at91_udp_softc {
|
||||
struct at91dci_softc sc_dci; /* must be first */
|
||||
struct at91_pmc_clock *sc_mclk;
|
||||
struct at91_pmc_clock *sc_iclk;
|
||||
struct at91_pmc_clock *sc_fclk;
|
||||
struct callout sc_vbus;
|
||||
};
|
||||
|
||||
static void
|
||||
at91_vbus_poll(struct at91_udp_softc *sc)
|
||||
{
|
||||
uint8_t vbus_val;
|
||||
|
||||
vbus_val = at91_pio_gpio_get(VBUS_BASE, VBUS_MASK) != 0;
|
||||
at91dci_vbus_interrupt(&sc->sc_dci, vbus_val);
|
||||
|
||||
callout_reset(&sc->sc_vbus, hz, (void *)&at91_vbus_poll, sc);
|
||||
}
|
||||
|
||||
static void
|
||||
at91_udp_clocks_on(void *arg)
|
||||
{
|
||||
struct at91_udp_softc *sc = arg;
|
||||
|
||||
at91_pmc_clock_enable(sc->sc_mclk);
|
||||
at91_pmc_clock_enable(sc->sc_iclk);
|
||||
at91_pmc_clock_enable(sc->sc_fclk);
|
||||
}
|
||||
|
||||
static void
|
||||
at91_udp_clocks_off(void *arg)
|
||||
{
|
||||
struct at91_udp_softc *sc = arg;
|
||||
|
||||
at91_pmc_clock_disable(sc->sc_fclk);
|
||||
at91_pmc_clock_disable(sc->sc_iclk);
|
||||
at91_pmc_clock_disable(sc->sc_mclk);
|
||||
}
|
||||
|
||||
static void
|
||||
at91_udp_pull_up(void *arg)
|
||||
{
|
||||
at91_pio_gpio_set(PULLUP_BASE, PULLUP_MASK);
|
||||
}
|
||||
|
||||
static void
|
||||
at91_udp_pull_down(void *arg)
|
||||
{
|
||||
at91_pio_gpio_clear(PULLUP_BASE, PULLUP_MASK);
|
||||
}
|
||||
|
||||
static int
|
||||
at91_udp_probe(device_t dev)
|
||||
{
|
||||
if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-udc"))
|
||||
return (ENXIO);
|
||||
device_set_desc(dev, "AT91 integrated AT91_UDP controller");
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
at91_udp_attach(device_t dev)
|
||||
{
|
||||
struct at91_udp_softc *sc = device_get_softc(dev);
|
||||
int err;
|
||||
int rid;
|
||||
|
||||
/* setup AT9100 USB device controller interface softc */
|
||||
|
||||
sc->sc_dci.sc_clocks_on = &at91_udp_clocks_on;
|
||||
sc->sc_dci.sc_clocks_off = &at91_udp_clocks_off;
|
||||
sc->sc_dci.sc_clocks_arg = sc;
|
||||
sc->sc_dci.sc_pull_up = &at91_udp_pull_up;
|
||||
sc->sc_dci.sc_pull_down = &at91_udp_pull_down;
|
||||
sc->sc_dci.sc_pull_arg = sc;
|
||||
|
||||
/* initialise some bus fields */
|
||||
sc->sc_dci.sc_bus.parent = dev;
|
||||
sc->sc_dci.sc_bus.devices = sc->sc_dci.sc_devices;
|
||||
sc->sc_dci.sc_bus.devices_max = AT91_MAX_DEVICES;
|
||||
|
||||
/* get all DMA memory */
|
||||
if (usb_bus_mem_alloc_all(&sc->sc_dci.sc_bus,
|
||||
USB_GET_DMA_TAG(dev), NULL)) {
|
||||
return (ENOMEM);
|
||||
}
|
||||
callout_init_mtx(&sc->sc_vbus, &sc->sc_dci.sc_bus.bus_mtx, 0);
|
||||
|
||||
/*
|
||||
* configure VBUS input pin, enable deglitch and enable
|
||||
* interrupt :
|
||||
*/
|
||||
at91_pio_use_gpio(VBUS_BASE, VBUS_MASK);
|
||||
at91_pio_gpio_input(VBUS_BASE, VBUS_MASK);
|
||||
at91_pio_gpio_set_deglitch(VBUS_BASE, VBUS_MASK, 1);
|
||||
at91_pio_gpio_set_interrupt(VBUS_BASE, VBUS_MASK, 0);
|
||||
|
||||
/*
|
||||
* configure PULLUP output pin :
|
||||
*/
|
||||
at91_pio_use_gpio(PULLUP_BASE, PULLUP_MASK);
|
||||
at91_pio_gpio_output(PULLUP_BASE, PULLUP_MASK, 0);
|
||||
|
||||
at91_udp_pull_down(sc);
|
||||
|
||||
/* wait 10ms for pulldown to stabilise */
|
||||
usb_pause_mtx(NULL, hz / 100);
|
||||
|
||||
sc->sc_mclk = at91_pmc_clock_ref("mck");
|
||||
sc->sc_iclk = at91_pmc_clock_ref("udc_clk");
|
||||
sc->sc_fclk = at91_pmc_clock_ref("udpck");
|
||||
|
||||
rid = MEM_RID;
|
||||
sc->sc_dci.sc_io_res =
|
||||
bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
|
||||
|
||||
if (!(sc->sc_dci.sc_io_res)) {
|
||||
err = ENOMEM;
|
||||
goto error;
|
||||
}
|
||||
sc->sc_dci.sc_io_tag = rman_get_bustag(sc->sc_dci.sc_io_res);
|
||||
sc->sc_dci.sc_io_hdl = rman_get_bushandle(sc->sc_dci.sc_io_res);
|
||||
sc->sc_dci.sc_io_size = rman_get_size(sc->sc_dci.sc_io_res);
|
||||
|
||||
rid = 0;
|
||||
sc->sc_dci.sc_irq_res =
|
||||
bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
|
||||
if (!(sc->sc_dci.sc_irq_res)) {
|
||||
goto error;
|
||||
}
|
||||
sc->sc_dci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
|
||||
if (!(sc->sc_dci.sc_bus.bdev)) {
|
||||
goto error;
|
||||
}
|
||||
device_set_ivars(sc->sc_dci.sc_bus.bdev, &sc->sc_dci.sc_bus);
|
||||
|
||||
#if (__FreeBSD_version >= 700031)
|
||||
err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
|
||||
NULL, (driver_intr_t *)at91dci_interrupt, sc, &sc->sc_dci.sc_intr_hdl);
|
||||
#else
|
||||
err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
|
||||
(driver_intr_t *)at91dci_interrupt, sc, &sc->sc_dci.sc_intr_hdl);
|
||||
#endif
|
||||
if (err) {
|
||||
sc->sc_dci.sc_intr_hdl = NULL;
|
||||
goto error;
|
||||
}
|
||||
|
||||
err = at91dci_init(&sc->sc_dci);
|
||||
if (!err) {
|
||||
err = device_probe_and_attach(sc->sc_dci.sc_bus.bdev);
|
||||
}
|
||||
if (err) {
|
||||
goto error;
|
||||
} else {
|
||||
/* poll VBUS one time */
|
||||
USB_BUS_LOCK(&sc->sc_dci.sc_bus);
|
||||
at91_vbus_poll(sc);
|
||||
USB_BUS_UNLOCK(&sc->sc_dci.sc_bus);
|
||||
}
|
||||
return (0);
|
||||
|
||||
error:
|
||||
at91_udp_detach(dev);
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
static int
|
||||
at91_udp_detach(device_t dev)
|
||||
{
|
||||
struct at91_udp_softc *sc = device_get_softc(dev);
|
||||
device_t bdev;
|
||||
int err;
|
||||
|
||||
if (sc->sc_dci.sc_bus.bdev) {
|
||||
bdev = sc->sc_dci.sc_bus.bdev;
|
||||
device_detach(bdev);
|
||||
device_delete_child(dev, bdev);
|
||||
}
|
||||
/* during module unload there are lots of children leftover */
|
||||
device_delete_children(dev);
|
||||
|
||||
USB_BUS_LOCK(&sc->sc_dci.sc_bus);
|
||||
callout_stop(&sc->sc_vbus);
|
||||
USB_BUS_UNLOCK(&sc->sc_dci.sc_bus);
|
||||
|
||||
callout_drain(&sc->sc_vbus);
|
||||
|
||||
/* disable Transceiver */
|
||||
AT91_UDP_WRITE_4(&sc->sc_dci, AT91_UDP_TXVC, AT91_UDP_TXVC_DIS);
|
||||
|
||||
/* disable and clear all interrupts */
|
||||
AT91_UDP_WRITE_4(&sc->sc_dci, AT91_UDP_IDR, 0xFFFFFFFF);
|
||||
AT91_UDP_WRITE_4(&sc->sc_dci, AT91_UDP_ICR, 0xFFFFFFFF);
|
||||
|
||||
if (sc->sc_dci.sc_irq_res && sc->sc_dci.sc_intr_hdl) {
|
||||
/*
|
||||
* only call at91_udp_uninit() after at91_udp_init()
|
||||
*/
|
||||
at91dci_uninit(&sc->sc_dci);
|
||||
|
||||
err = bus_teardown_intr(dev, sc->sc_dci.sc_irq_res,
|
||||
sc->sc_dci.sc_intr_hdl);
|
||||
sc->sc_dci.sc_intr_hdl = NULL;
|
||||
}
|
||||
if (sc->sc_dci.sc_irq_res) {
|
||||
bus_release_resource(dev, SYS_RES_IRQ, 0,
|
||||
sc->sc_dci.sc_irq_res);
|
||||
sc->sc_dci.sc_irq_res = NULL;
|
||||
}
|
||||
if (sc->sc_dci.sc_io_res) {
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, MEM_RID,
|
||||
sc->sc_dci.sc_io_res);
|
||||
sc->sc_dci.sc_io_res = NULL;
|
||||
}
|
||||
usb_bus_mem_free_all(&sc->sc_dci.sc_bus, NULL);
|
||||
|
||||
/* disable clocks */
|
||||
at91_pmc_clock_disable(sc->sc_iclk);
|
||||
at91_pmc_clock_disable(sc->sc_fclk);
|
||||
at91_pmc_clock_disable(sc->sc_mclk);
|
||||
at91_pmc_clock_deref(sc->sc_fclk);
|
||||
at91_pmc_clock_deref(sc->sc_iclk);
|
||||
at91_pmc_clock_deref(sc->sc_mclk);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t at91_udp_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, at91_udp_probe),
|
||||
DEVMETHOD(device_attach, at91_udp_attach),
|
||||
DEVMETHOD(device_detach, at91_udp_detach),
|
||||
DEVMETHOD(device_suspend, bus_generic_suspend),
|
||||
DEVMETHOD(device_resume, bus_generic_resume),
|
||||
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
||||
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t at91_udp_driver = {
|
||||
.name = "at91_udp",
|
||||
.methods = at91_udp_methods,
|
||||
.size = sizeof(struct at91_udp_softc),
|
||||
};
|
||||
|
||||
static devclass_t at91_udp_devclass;
|
||||
|
||||
DRIVER_MODULE(at91_udp, simplebus, at91_udp_driver, at91_udp_devclass, 0, 0);
|
250
sys/dev/usb/controller/ohci_fdt.c
Normal file
250
sys/dev/usb/controller/ohci_fdt.c
Normal file
@ -0,0 +1,250 @@
|
||||
/*-
|
||||
* Copyright (c) 2006 M. Warner Losh. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/stdint.h>
|
||||
#include <sys/stddef.h>
|
||||
#include <sys/param.h>
|
||||
#include <sys/queue.h>
|
||||
#include <sys/types.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/condvar.h>
|
||||
#include <sys/sysctl.h>
|
||||
#include <sys/sx.h>
|
||||
#include <sys/unistd.h>
|
||||
#include <sys/callout.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/priv.h>
|
||||
|
||||
#include <dev/usb/usb.h>
|
||||
#include <dev/usb/usbdi.h>
|
||||
|
||||
#include <dev/usb/usb_core.h>
|
||||
#include <dev/usb/usb_busdma.h>
|
||||
#include <dev/usb/usb_process.h>
|
||||
#include <dev/usb/usb_util.h>
|
||||
|
||||
#include <dev/usb/usb_controller.h>
|
||||
#include <dev/usb/usb_bus.h>
|
||||
#include <dev/usb/controller/ohci.h>
|
||||
#include <dev/usb/controller/ohcireg.h>
|
||||
|
||||
#include <sys/rman.h>
|
||||
|
||||
#include <arm/at91/at91_pmcvar.h>
|
||||
|
||||
#include <dev/fdt/fdt_common.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
|
||||
#define MEM_RID 0
|
||||
|
||||
static device_probe_t ohci_at91_fdt_probe;
|
||||
static device_attach_t ohci_at91_fdt_attach;
|
||||
static device_detach_t ohci_at91_fdt_detach;
|
||||
|
||||
struct at91_ohci_softc {
|
||||
struct ohci_softc sc_ohci; /* must be first */
|
||||
struct at91_pmc_clock *mclk;
|
||||
struct at91_pmc_clock *iclk;
|
||||
struct at91_pmc_clock *fclk;
|
||||
};
|
||||
|
||||
static int
|
||||
ohci_at91_fdt_probe(device_t dev)
|
||||
{
|
||||
if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-ohci"))
|
||||
return (ENXIO);
|
||||
device_set_desc(dev, "AT91 integrated OHCI controller");
|
||||
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
|
||||
static int
|
||||
ohci_at91_fdt_attach(device_t dev)
|
||||
{
|
||||
struct at91_ohci_softc *sc = device_get_softc(dev);
|
||||
int err;
|
||||
int rid;
|
||||
|
||||
/* initialise some bus fields */
|
||||
sc->sc_ohci.sc_bus.parent = dev;
|
||||
sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices;
|
||||
sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES;
|
||||
|
||||
/* get all DMA memory */
|
||||
if (usb_bus_mem_alloc_all(&sc->sc_ohci.sc_bus,
|
||||
USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
|
||||
return (ENOMEM);
|
||||
}
|
||||
sc->mclk = at91_pmc_clock_ref("mck");
|
||||
sc->iclk = at91_pmc_clock_ref("ohci_clk");
|
||||
sc->fclk = at91_pmc_clock_ref("uhpck");
|
||||
|
||||
sc->sc_ohci.sc_dev = dev;
|
||||
|
||||
rid = MEM_RID;
|
||||
sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
|
||||
&rid, RF_ACTIVE);
|
||||
|
||||
if (!(sc->sc_ohci.sc_io_res)) {
|
||||
err = ENOMEM;
|
||||
goto error;
|
||||
}
|
||||
sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res);
|
||||
sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res);
|
||||
sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res);
|
||||
|
||||
rid = 0;
|
||||
sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
|
||||
RF_ACTIVE);
|
||||
if (!(sc->sc_ohci.sc_irq_res)) {
|
||||
goto error;
|
||||
}
|
||||
sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
|
||||
if (!(sc->sc_ohci.sc_bus.bdev)) {
|
||||
goto error;
|
||||
}
|
||||
device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus);
|
||||
|
||||
strlcpy(sc->sc_ohci.sc_vendor, "Atmel", sizeof(sc->sc_ohci.sc_vendor));
|
||||
|
||||
err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
|
||||
NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl);
|
||||
if (err) {
|
||||
sc->sc_ohci.sc_intr_hdl = NULL;
|
||||
goto error;
|
||||
}
|
||||
/*
|
||||
* turn on the clocks from the AT91's point of view. Keep the unit in reset.
|
||||
*/
|
||||
at91_pmc_clock_enable(sc->mclk);
|
||||
at91_pmc_clock_enable(sc->iclk);
|
||||
at91_pmc_clock_enable(sc->fclk);
|
||||
bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
|
||||
OHCI_CONTROL, 0);
|
||||
|
||||
err = ohci_init(&sc->sc_ohci);
|
||||
if (!err) {
|
||||
err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev);
|
||||
}
|
||||
if (err) {
|
||||
goto error;
|
||||
}
|
||||
return (0);
|
||||
|
||||
error:
|
||||
ohci_at91_fdt_detach(dev);
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
static int
|
||||
ohci_at91_fdt_detach(device_t dev)
|
||||
{
|
||||
struct at91_ohci_softc *sc = device_get_softc(dev);
|
||||
device_t bdev;
|
||||
int err;
|
||||
|
||||
if (sc->sc_ohci.sc_bus.bdev) {
|
||||
bdev = sc->sc_ohci.sc_bus.bdev;
|
||||
device_detach(bdev);
|
||||
device_delete_child(dev, bdev);
|
||||
}
|
||||
/* during module unload there are lots of children leftover */
|
||||
device_delete_children(dev);
|
||||
|
||||
if (sc->sc_ohci.sc_io_res != NULL) {
|
||||
/*
|
||||
* Put the controller into reset, then disable clocks and do
|
||||
* the MI tear down. We have to disable the clocks/hardware
|
||||
* after we do the rest of the teardown. We also disable the
|
||||
* clocks in the opposite order we acquire them, but that
|
||||
* doesn't seem to be absolutely necessary. We free up the
|
||||
* clocks after we disable them, so the system could, in
|
||||
* theory, reuse them.
|
||||
*/
|
||||
bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
|
||||
OHCI_CONTROL, 0);
|
||||
|
||||
at91_pmc_clock_disable(sc->fclk);
|
||||
at91_pmc_clock_disable(sc->iclk);
|
||||
at91_pmc_clock_disable(sc->mclk);
|
||||
at91_pmc_clock_deref(sc->fclk);
|
||||
at91_pmc_clock_deref(sc->iclk);
|
||||
at91_pmc_clock_deref(sc->mclk);
|
||||
|
||||
if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) {
|
||||
/*
|
||||
* only call ohci_detach() after ohci_init()
|
||||
*/
|
||||
ohci_detach(&sc->sc_ohci);
|
||||
|
||||
err = bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res,
|
||||
sc->sc_ohci.sc_intr_hdl);
|
||||
sc->sc_ohci.sc_intr_hdl = NULL;
|
||||
}
|
||||
if (sc->sc_ohci.sc_irq_res) {
|
||||
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res);
|
||||
sc->sc_ohci.sc_irq_res = NULL;
|
||||
}
|
||||
if (sc->sc_ohci.sc_io_res) {
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, MEM_RID,
|
||||
sc->sc_ohci.sc_io_res);
|
||||
sc->sc_ohci.sc_io_res = NULL;
|
||||
}
|
||||
}
|
||||
usb_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t ohci_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, ohci_at91_fdt_probe),
|
||||
DEVMETHOD(device_attach, ohci_at91_fdt_attach),
|
||||
DEVMETHOD(device_detach, ohci_at91_fdt_detach),
|
||||
DEVMETHOD(device_suspend, bus_generic_suspend),
|
||||
DEVMETHOD(device_resume, bus_generic_resume),
|
||||
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
||||
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t ohci_driver = {
|
||||
.name = "ohci",
|
||||
.methods = ohci_methods,
|
||||
.size = sizeof(struct at91_ohci_softc),
|
||||
};
|
||||
|
||||
static devclass_t ohci_devclass;
|
||||
|
||||
DRIVER_MODULE(ohci, simplebus, ohci_driver, ohci_devclass, 0, 0);
|
||||
MODULE_DEPEND(ohci, usb, 1, 1, 1);
|
@ -109,7 +109,7 @@ static void usb_dev_uninit(void *);
|
||||
static int usb_fifo_uiomove(struct usb_fifo *, void *, int,
|
||||
struct uio *);
|
||||
static void usb_fifo_check_methods(struct usb_fifo_methods *);
|
||||
static struct usb_fifo *usb_fifo_alloc(void);
|
||||
static struct usb_fifo *usb_fifo_alloc(struct mtx *);
|
||||
static struct usb_endpoint *usb_dev_get_ep(struct usb_device *, uint8_t,
|
||||
uint8_t);
|
||||
static void usb_loc_fill(struct usb_fs_privdata *,
|
||||
@ -124,6 +124,7 @@ static d_ioctl_t usb_ioctl;
|
||||
static d_read_t usb_read;
|
||||
static d_write_t usb_write;
|
||||
static d_poll_t usb_poll;
|
||||
static d_kqfilter_t usb_kqfilter;
|
||||
|
||||
static d_ioctl_t usb_static_ioctl;
|
||||
|
||||
@ -141,7 +142,8 @@ struct cdevsw usb_devsw = {
|
||||
.d_flags = D_TRACKCLOSE,
|
||||
.d_read = usb_read,
|
||||
.d_write = usb_write,
|
||||
.d_poll = usb_poll
|
||||
.d_poll = usb_poll,
|
||||
.d_kqfilter = usb_kqfilter,
|
||||
};
|
||||
|
||||
static struct cdev* usb_dev = NULL;
|
||||
@ -368,15 +370,17 @@ usb_unref_device(struct usb_cdev_privdata *cpd,
|
||||
}
|
||||
|
||||
static struct usb_fifo *
|
||||
usb_fifo_alloc(void)
|
||||
usb_fifo_alloc(struct mtx *mtx)
|
||||
{
|
||||
struct usb_fifo *f;
|
||||
|
||||
f = malloc(sizeof(*f), M_USBDEV, M_WAITOK | M_ZERO);
|
||||
if (f) {
|
||||
if (f != NULL) {
|
||||
cv_init(&f->cv_io, "FIFO-IO");
|
||||
cv_init(&f->cv_drain, "FIFO-DRAIN");
|
||||
f->priv_mtx = mtx;
|
||||
f->refcount = 1;
|
||||
knlist_init_mtx(&f->selinfo.si_note, mtx);
|
||||
}
|
||||
return (f);
|
||||
}
|
||||
@ -500,7 +504,7 @@ usb_fifo_create(struct usb_cdev_privdata *cpd,
|
||||
DPRINTFN(5, "dev_get_endpoint returned NULL\n");
|
||||
return (EINVAL);
|
||||
}
|
||||
f = usb_fifo_alloc();
|
||||
f = usb_fifo_alloc(&udev->device_mtx);
|
||||
if (f == NULL) {
|
||||
DPRINTFN(5, "could not alloc tx fifo\n");
|
||||
return (ENOMEM);
|
||||
@ -508,7 +512,6 @@ usb_fifo_create(struct usb_cdev_privdata *cpd,
|
||||
/* update some fields */
|
||||
f->fifo_index = n + USB_FIFO_TX;
|
||||
f->dev_ep_index = e;
|
||||
f->priv_mtx = &udev->device_mtx;
|
||||
f->priv_sc0 = ep;
|
||||
f->methods = &usb_ugen_methods;
|
||||
f->iface_index = ep->iface_index;
|
||||
@ -527,7 +530,7 @@ usb_fifo_create(struct usb_cdev_privdata *cpd,
|
||||
DPRINTFN(5, "dev_get_endpoint returned NULL\n");
|
||||
return (EINVAL);
|
||||
}
|
||||
f = usb_fifo_alloc();
|
||||
f = usb_fifo_alloc(&udev->device_mtx);
|
||||
if (f == NULL) {
|
||||
DPRINTFN(5, "could not alloc rx fifo\n");
|
||||
return (ENOMEM);
|
||||
@ -535,7 +538,6 @@ usb_fifo_create(struct usb_cdev_privdata *cpd,
|
||||
/* update some fields */
|
||||
f->fifo_index = n + USB_FIFO_RX;
|
||||
f->dev_ep_index = e;
|
||||
f->priv_mtx = &udev->device_mtx;
|
||||
f->priv_sc0 = ep;
|
||||
f->methods = &usb_ugen_methods;
|
||||
f->iface_index = ep->iface_index;
|
||||
@ -620,6 +622,10 @@ usb_fifo_free(struct usb_fifo *f)
|
||||
cv_destroy(&f->cv_io);
|
||||
cv_destroy(&f->cv_drain);
|
||||
|
||||
knlist_clear(&f->selinfo.si_note, 0);
|
||||
seldrain(&f->selinfo);
|
||||
knlist_destroy(&f->selinfo.si_note);
|
||||
|
||||
free(f, M_USBDEV);
|
||||
}
|
||||
|
||||
@ -774,7 +780,12 @@ usb_fifo_close(struct usb_fifo *f, int fflags)
|
||||
mtx_lock(f->priv_mtx);
|
||||
|
||||
/* clear current cdev private data pointer */
|
||||
mtx_lock(&usb_ref_lock);
|
||||
f->curr_cpd = NULL;
|
||||
mtx_unlock(&usb_ref_lock);
|
||||
|
||||
/* check if we are watched by kevent */
|
||||
KNOTE_LOCKED(&f->selinfo.si_note, 0);
|
||||
|
||||
/* check if we are selected */
|
||||
if (f->flag_isselect) {
|
||||
@ -1117,6 +1128,162 @@ done:
|
||||
return (err);
|
||||
}
|
||||
|
||||
static void
|
||||
usb_filter_detach(struct knote *kn)
|
||||
{
|
||||
struct usb_fifo *f = kn->kn_hook;
|
||||
knlist_remove(&f->selinfo.si_note, kn, 0);
|
||||
}
|
||||
|
||||
static int
|
||||
usb_filter_write(struct knote *kn, long hint)
|
||||
{
|
||||
struct usb_cdev_privdata* cpd;
|
||||
struct usb_fifo *f;
|
||||
struct usb_mbuf *m;
|
||||
|
||||
DPRINTFN(2, "\n");
|
||||
|
||||
f = kn->kn_hook;
|
||||
|
||||
mtx_assert(f->priv_mtx, MA_OWNED);
|
||||
|
||||
cpd = f->curr_cpd;
|
||||
if (cpd == NULL) {
|
||||
m = (void *)1;
|
||||
} else if (f->fs_ep_max == 0) {
|
||||
if (f->flag_iserror) {
|
||||
/* we got an error */
|
||||
m = (void *)1;
|
||||
} else {
|
||||
if (f->queue_data == NULL) {
|
||||
/*
|
||||
* start write transfer, if not
|
||||
* already started
|
||||
*/
|
||||
(f->methods->f_start_write) (f);
|
||||
}
|
||||
/* check if any packets are available */
|
||||
USB_IF_POLL(&f->free_q, m);
|
||||
}
|
||||
} else {
|
||||
if (f->flag_iscomplete) {
|
||||
m = (void *)1;
|
||||
} else {
|
||||
m = NULL;
|
||||
}
|
||||
}
|
||||
return (m ? 1 : 0);
|
||||
}
|
||||
|
||||
static int
|
||||
usb_filter_read(struct knote *kn, long hint)
|
||||
{
|
||||
struct usb_cdev_privdata* cpd;
|
||||
struct usb_fifo *f;
|
||||
struct usb_mbuf *m;
|
||||
|
||||
DPRINTFN(2, "\n");
|
||||
|
||||
f = kn->kn_hook;
|
||||
|
||||
mtx_assert(f->priv_mtx, MA_OWNED);
|
||||
|
||||
cpd = f->curr_cpd;
|
||||
if (cpd == NULL) {
|
||||
m = (void *)1;
|
||||
} else if (f->fs_ep_max == 0) {
|
||||
if (f->flag_iserror) {
|
||||
/* we have an error */
|
||||
m = (void *)1;
|
||||
} else {
|
||||
if (f->queue_data == NULL) {
|
||||
/*
|
||||
* start read transfer, if not
|
||||
* already started
|
||||
*/
|
||||
(f->methods->f_start_read) (f);
|
||||
}
|
||||
/* check if any packets are available */
|
||||
USB_IF_POLL(&f->used_q, m);
|
||||
|
||||
/* start reading data, if any */
|
||||
if (m == NULL)
|
||||
(f->methods->f_start_read) (f);
|
||||
}
|
||||
} else {
|
||||
if (f->flag_iscomplete) {
|
||||
m = (void *)1;
|
||||
} else {
|
||||
m = NULL;
|
||||
}
|
||||
}
|
||||
return (m ? 1 : 0);
|
||||
}
|
||||
|
||||
static struct filterops usb_filtops_write = {
|
||||
.f_isfd = 1,
|
||||
.f_detach = usb_filter_detach,
|
||||
.f_event = usb_filter_write,
|
||||
};
|
||||
|
||||
static struct filterops usb_filtops_read = {
|
||||
.f_isfd = 1,
|
||||
.f_detach = usb_filter_detach,
|
||||
.f_event = usb_filter_read,
|
||||
};
|
||||
|
||||
|
||||
/* ARGSUSED */
|
||||
static int
|
||||
usb_kqfilter(struct cdev* dev, struct knote *kn)
|
||||
{
|
||||
struct usb_cdev_refdata refs;
|
||||
struct usb_cdev_privdata* cpd;
|
||||
struct usb_fifo *f;
|
||||
int fflags;
|
||||
int err = EINVAL;
|
||||
|
||||
DPRINTFN(2, "\n");
|
||||
|
||||
if (devfs_get_cdevpriv((void **)&cpd) != 0 ||
|
||||
usb_ref_device(cpd, &refs, 0) != 0)
|
||||
return (ENXIO);
|
||||
|
||||
fflags = cpd->fflags;
|
||||
|
||||
/* Figure out who needs service */
|
||||
switch (kn->kn_filter) {
|
||||
case EVFILT_WRITE:
|
||||
if (fflags & FWRITE) {
|
||||
f = refs.txfifo;
|
||||
kn->kn_fop = &usb_filtops_write;
|
||||
err = 0;
|
||||
}
|
||||
break;
|
||||
case EVFILT_READ:
|
||||
if (fflags & FREAD) {
|
||||
f = refs.rxfifo;
|
||||
kn->kn_fop = &usb_filtops_read;
|
||||
err = 0;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
err = EOPNOTSUPP;
|
||||
break;
|
||||
}
|
||||
|
||||
if (err == 0) {
|
||||
kn->kn_hook = f;
|
||||
mtx_lock(f->priv_mtx);
|
||||
knlist_add(&f->selinfo.si_note, kn, 1);
|
||||
mtx_unlock(f->priv_mtx);
|
||||
}
|
||||
|
||||
usb_unref_device(cpd, &refs);
|
||||
return (err);
|
||||
}
|
||||
|
||||
/* ARGSUSED */
|
||||
static int
|
||||
usb_poll(struct cdev* dev, int events, struct thread* td)
|
||||
@ -1184,7 +1351,7 @@ usb_poll(struct cdev* dev, int events, struct thread* td)
|
||||
|
||||
if (!refs.is_usbfs) {
|
||||
if (f->flag_iserror) {
|
||||
/* we have and error */
|
||||
/* we have an error */
|
||||
m = (void *)1;
|
||||
} else {
|
||||
if (f->queue_data == NULL) {
|
||||
@ -1581,6 +1748,8 @@ usb_fifo_wakeup(struct usb_fifo *f)
|
||||
{
|
||||
usb_fifo_signal(f);
|
||||
|
||||
KNOTE_LOCKED(&f->selinfo.si_note, 0);
|
||||
|
||||
if (f->flag_isselect) {
|
||||
selwakeup(&f->selinfo);
|
||||
f->flag_isselect = 0;
|
||||
@ -1696,8 +1865,8 @@ usb_fifo_attach(struct usb_device *udev, void *priv_sc,
|
||||
break;
|
||||
}
|
||||
|
||||
f_tx = usb_fifo_alloc();
|
||||
f_rx = usb_fifo_alloc();
|
||||
f_tx = usb_fifo_alloc(priv_mtx);
|
||||
f_rx = usb_fifo_alloc(priv_mtx);
|
||||
|
||||
if ((f_tx == NULL) || (f_rx == NULL)) {
|
||||
usb_fifo_free(f_tx);
|
||||
@ -1708,7 +1877,6 @@ usb_fifo_attach(struct usb_device *udev, void *priv_sc,
|
||||
|
||||
f_tx->fifo_index = n + USB_FIFO_TX;
|
||||
f_tx->dev_ep_index = -1;
|
||||
f_tx->priv_mtx = priv_mtx;
|
||||
f_tx->priv_sc0 = priv_sc;
|
||||
f_tx->methods = pm;
|
||||
f_tx->iface_index = iface_index;
|
||||
@ -1716,7 +1884,6 @@ usb_fifo_attach(struct usb_device *udev, void *priv_sc,
|
||||
|
||||
f_rx->fifo_index = n + USB_FIFO_RX;
|
||||
f_rx->dev_ep_index = -1;
|
||||
f_rx->priv_mtx = priv_mtx;
|
||||
f_rx->priv_sc0 = priv_sc;
|
||||
f_rx->methods = pm;
|
||||
f_rx->iface_index = iface_index;
|
||||
|
77
sys/gnu/dts/FreeBSD-list
Normal file
77
sys/gnu/dts/FreeBSD-list
Normal file
@ -0,0 +1,77 @@
|
||||
# $FreeBSD$
|
||||
# Files to include in the import and merging....
|
||||
src/arm/animeo_ip.dts
|
||||
src/arm/at91-ariag25.dts
|
||||
src/arm/at91-cosino.dtsi
|
||||
src/arm/at91-cosino_mega2560.dts
|
||||
src/arm/at91-foxg20.dts
|
||||
src/arm/at91-qil_a9260.dts
|
||||
src/arm/at91-sama5d3_xplained.dts
|
||||
src/arm/at91rm9200.dtsi
|
||||
src/arm/at91rm9200_pqfp.dtsi
|
||||
src/arm/at91rm9200ek.dts
|
||||
src/arm/at91sam9260.dtsi
|
||||
src/arm/at91sam9263.dtsi
|
||||
src/arm/at91sam9263ek.dts
|
||||
src/arm/at91sam9g15.dtsi
|
||||
src/arm/at91sam9g15ek.dts
|
||||
src/arm/at91sam9g20.dtsi
|
||||
src/arm/at91sam9g20ek.dts
|
||||
src/arm/at91sam9g20ek_2mmc.dts
|
||||
src/arm/at91sam9g20ek_common.dtsi
|
||||
src/arm/at91sam9g25.dtsi
|
||||
src/arm/at91sam9g25ek.dts
|
||||
src/arm/at91sam9g35.dtsi
|
||||
src/arm/at91sam9g35ek.dts
|
||||
src/arm/at91sam9g45.dtsi
|
||||
src/arm/at91sam9m10g45ek.dts
|
||||
src/arm/at91sam9n12.dtsi
|
||||
src/arm/at91sam9n12ek.dts
|
||||
src/arm/at91sam9x25.dtsi
|
||||
src/arm/at91sam9x25ek.dts
|
||||
src/arm/at91sam9x35.dtsi
|
||||
src/arm/at91sam9x35ek.dts
|
||||
src/arm/at91sam9x5.dtsi
|
||||
src/arm/at91sam9x5_macb0.dtsi
|
||||
src/arm/at91sam9x5_macb1.dtsi
|
||||
src/arm/at91sam9x5_usart3.dtsi
|
||||
src/arm/at91sam9x5cm.dtsi
|
||||
src/arm/at91sam9x5ek.dtsi
|
||||
src/arm/ethernut5.dts
|
||||
src/arm/evk-pro3.dts
|
||||
src/arm/ge863-pro3.dtsi
|
||||
src/arm/kizbox.dts
|
||||
src/arm/mpa1600.dts
|
||||
src/arm/pm9g45.dts
|
||||
src/arm/sama5d3.dtsi
|
||||
src/arm/sama5d31.dtsi
|
||||
src/arm/sama5d31ek.dts
|
||||
src/arm/sama5d33.dtsi
|
||||
src/arm/sama5d33ek.dts
|
||||
src/arm/sama5d34.dtsi
|
||||
src/arm/sama5d34ek.dts
|
||||
src/arm/sama5d35.dtsi
|
||||
src/arm/sama5d35ek.dts
|
||||
src/arm/sama5d36.dtsi
|
||||
src/arm/sama5d36ek.dts
|
||||
src/arm/sama5d3_can.dtsi
|
||||
src/arm/sama5d3_emac.dtsi
|
||||
src/arm/sama5d3_gmac.dtsi
|
||||
src/arm/sama5d3_lcd.dtsi
|
||||
src/arm/sama5d3_mci2.dtsi
|
||||
src/arm/sama5d3_tcb1.dtsi
|
||||
src/arm/sama5d3_uart.dtsi
|
||||
src/arm/sama5d3xcm.dtsi
|
||||
src/arm/sama5d3xdm.dtsi
|
||||
src/arm/sama5d3xmb.dtsi
|
||||
src/arm/skeleton.dtsi
|
||||
src/arm/tny_a9260.dts
|
||||
src/arm/tny_a9260_common.dtsi
|
||||
src/arm/tny_a9263.dts
|
||||
src/arm/tny_a9g20.dts
|
||||
src/arm/usb_a9260.dts
|
||||
src/arm/usb_a9260_common.dtsi
|
||||
src/arm/usb_a9263.dts
|
||||
src/arm/usb_a9g20.dts
|
||||
src/arm/usb_a9g20_common.dtsi
|
||||
src/arm/usb_a9g20_lpw.dts
|
24
sys/gnu/dts/FreeBSD-upgrade
Normal file
24
sys/gnu/dts/FreeBSD-upgrade
Normal file
@ -0,0 +1,24 @@
|
||||
#/bin/sh
|
||||
# $FreeBSD$
|
||||
#
|
||||
# These files are imported from Ian Campbell's git tree mirroring the linux
|
||||
# kernel.
|
||||
#
|
||||
# git clone git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
|
||||
#
|
||||
# will grab the latest tree. It is imported into vendor/device-tree/dist and tagged
|
||||
# with the svn cp command, per the handbook.
|
||||
#
|
||||
# We only import those files from here that we know work with some kernel, rather than
|
||||
# all of them. This means we have an 'opt in' list rather than an 'opt out' list
|
||||
# that's more typical for FreeBSD. The opt-in list should be relative to the top level
|
||||
# directory (so a bunch of lines starting with src). We import src/$ARCH/foo into
|
||||
# sys/gnu/dts/$ARCH/foo with the goal being to use as many of these files as possible
|
||||
# unmodified for FreeBSD. This isn't always possible, but there are workarounds.
|
||||
#
|
||||
# This script should take care of all that the first time...
|
||||
|
||||
s=svn+ssh://svn.freebsd.org/base/vendor/device-tree/dist/
|
||||
|
||||
args=$(grep -v ^# FreeBSD-list | sed -e"s=^=$s=")
|
||||
svn cp -m "Initial import of DTS files from Linux" ${args} svn+ssh://svn.freebsd.org/base/head/sys/gnu/dts/arm
|
167
sys/gnu/dts/arm/animeo_ip.dts
Normal file
167
sys/gnu/dts/arm/animeo_ip.dts
Normal file
@ -0,0 +1,167 @@
|
||||
/*
|
||||
* animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards
|
||||
*
|
||||
* Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 only.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "at91sam9260.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Somfy Animeo IP";
|
||||
compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9";
|
||||
|
||||
aliases {
|
||||
serial0 = &usart1;
|
||||
serial1 = &usart2;
|
||||
serial2 = &usart0;
|
||||
serial3 = &dbgu;
|
||||
serial4 = &usart3;
|
||||
serial5 = &uart0;
|
||||
serial6 = &uart1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = &usart2;
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
usart0: serial@fffb0000 {
|
||||
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart2: serial@fffb8000 {
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffc4000 {
|
||||
pinctrl-0 = <&pinctrl_macb_rmii &pinctrl_macb_rmii_mii>;
|
||||
phy-mode = "mii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffa8000 {
|
||||
pinctrl-0 = <&pinctrl_mmc0_clk
|
||||
&pinctrl_mmc0_slot1_cmd_dat0
|
||||
&pinctrl_mmc0_slot1_dat1_3>;
|
||||
status = "okay";
|
||||
|
||||
slot@1 {
|
||||
reg = <1>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
barebox@0 {
|
||||
label = "barebox";
|
||||
reg = <0x0 0x58000>;
|
||||
};
|
||||
|
||||
u_boot_env@58000 {
|
||||
label = "u_boot_env";
|
||||
reg = <0x58000 0x8000>;
|
||||
};
|
||||
|
||||
ubi@60000 {
|
||||
label = "ubi";
|
||||
reg = <0x60000 0x1FA0000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
num-ports = <2>;
|
||||
atmel,vbus-gpio = <&pioB 15 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
power_green {
|
||||
label = "power_green";
|
||||
gpios = <&pioC 17 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
power_red {
|
||||
label = "power_red";
|
||||
gpios = <&pioA 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
tx_green {
|
||||
label = "tx_green";
|
||||
gpios = <&pioC 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
tx_red {
|
||||
label = "tx_red";
|
||||
gpios = <&pioC 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
keyswitch_in {
|
||||
label = "keyswitch_in";
|
||||
gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <28>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
error_in {
|
||||
label = "error_in";
|
||||
gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <29>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
btn {
|
||||
label = "btn";
|
||||
gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <31>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
};
|
180
sys/gnu/dts/arm/at91-ariag25.dts
Normal file
180
sys/gnu/dts/arm/at91-ariag25.dts
Normal file
@ -0,0 +1,180 @@
|
||||
/*
|
||||
* at91-ariag25.dts - Device Tree file for Acme Systems Aria G25 (AT91SAM9G25 based)
|
||||
*
|
||||
* Copyright (C) 2013 Douglas Gilbert <dgilbert@interlog.com>,
|
||||
* Robert Nelson <robertcnelson@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g25.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Acme Systems Aria G25";
|
||||
compatible = "acme,ariag25", "atmel,at91sam9x5ek",
|
||||
"atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
serial5 = &uart0;
|
||||
serial6 = &uart1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait";
|
||||
};
|
||||
|
||||
memory {
|
||||
/* 128 MB, change this for 256 MB revision */
|
||||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
mmc0: mmc@f0008000 {
|
||||
/* N.B. Aria has no SD card detect (CD), assumed present */
|
||||
|
||||
pinctrl-0 = <
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0: i2c@f8010000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@f8014000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* TWD2+TCLK2 hidden behind ethernet, so no i2c2 */
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
pinctrl-0 = <&pinctrl_usart0
|
||||
&pinctrl_usart0_rts
|
||||
&pinctrl_usart0_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@f8020000 {
|
||||
pinctrl-0 = <&pinctrl_usart1
|
||||
/* &pinctrl_usart1_rts */
|
||||
/* &pinctrl_usart1_cts */
|
||||
>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart2: serial@f8024000 {
|
||||
/* cannot activate RTS2+CTS2, clash with
|
||||
* ethernet on PB0 and PB1 */
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart3: serial@f8028000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8028000 0x200>;
|
||||
interrupts = <8 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3
|
||||
/* &pinctrl_usart3_rts */
|
||||
/* &pinctrl_usart3_cts */
|
||||
>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
/*
|
||||
* following can be overwritten by bootloader:
|
||||
* for example u-boot 'ftd set' command
|
||||
*/
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* UART0/1 pins are marked as GPIO on
|
||||
* Aria documentation.
|
||||
* Change to "okay" if you need additional serial ports
|
||||
*/
|
||||
uart0: serial@f8040000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@f8044000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc0: adc@f804c000 {
|
||||
status = "okay";
|
||||
atmel,adc-channels-used = <0xf>;
|
||||
atmel,adc-num-channels = <4>;
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
w1_0 {
|
||||
pinctrl_w1_0: w1_0-0 {
|
||||
atmel,pins = <0 21 0x0 0x1>; /* PA21 PIO, pull-up */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rtc@fffffeb0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
status = "okay";
|
||||
num-ports = <3>;
|
||||
};
|
||||
|
||||
usb1: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
/* little green LED in middle of Aria G25 module */
|
||||
aria_led {
|
||||
label = "aria_led";
|
||||
gpios = <&pioB 8 GPIO_ACTIVE_HIGH>; /* PB8 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
onewire@0 {
|
||||
compatible = "w1-gpio";
|
||||
gpios = <&pioA 21 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_w1_0>;
|
||||
};
|
||||
};
|
122
sys/gnu/dts/arm/at91-cosino.dtsi
Normal file
122
sys/gnu/dts/arm/at91-cosino.dtsi
Normal file
@ -0,0 +1,122 @@
|
||||
/*
|
||||
* at91-cosino.dtsi - Device Tree file for Cosino core module
|
||||
*
|
||||
* Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
|
||||
* HCE Engineering
|
||||
*
|
||||
* Derived from at91sam9x5ek.dtsi by:
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "at91sam9g35.dtsi"
|
||||
|
||||
/ {
|
||||
model = "HCE Cosino core module";
|
||||
compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
mmc0: mmc@f0008000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c0: i2c@f8010000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
adc0: adc@f804c000 {
|
||||
atmel,adc-clock-rate = <1000000>;
|
||||
atmel,adc-ts-wires = <4>;
|
||||
atmel,adc-ts-pressure-threshold = <10000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffe40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc; /* Enable PMECC */
|
||||
atmel,pmecc-cap = <4>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
uboot@40000 {
|
||||
label = "u-boot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
ubootenv@c0000 {
|
||||
label = "U-Boot Env";
|
||||
reg = <0xc0000 0x140000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
84
sys/gnu/dts/arm/at91-cosino_mega2560.dts
Normal file
84
sys/gnu/dts/arm/at91-cosino_mega2560.dts
Normal file
@ -0,0 +1,84 @@
|
||||
/*
|
||||
* at91-cosino_mega2560.dts - Device Tree file for Cosino board with
|
||||
* Mega 2560 extension
|
||||
*
|
||||
* Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
|
||||
* HCE Engineering
|
||||
*
|
||||
* Derived from at91sam9g35ek.dts by:
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "at91-cosino.dtsi"
|
||||
|
||||
/ {
|
||||
model = "HCE Cosino Mega 2560";
|
||||
compatible = "hce,cosino_mega2560", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
adc0: adc@f804c000 {
|
||||
atmel,adc-clock-rate = <1000000>;
|
||||
atmel,adc-ts-wires = <4>;
|
||||
atmel,adc-ts-pressure-threshold = <10000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
tsadcc: tsadcc@f804c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
rtc@fffffeb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@f8020000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart2: serial@f8024000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb2: gadget@f803c000 {
|
||||
atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc1: mmc@f000c000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_mmc1_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc1_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
status = "okay";
|
||||
num-ports = <3>;
|
||||
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
|
||||
&pioD 19 GPIO_ACTIVE_LOW
|
||||
&pioD 20 GPIO_ACTIVE_LOW
|
||||
>;
|
||||
};
|
||||
|
||||
usb1: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
157
sys/gnu/dts/arm/at91-foxg20.dts
Normal file
157
sys/gnu/dts/arm/at91-foxg20.dts
Normal file
@ -0,0 +1,157 @@
|
||||
/*
|
||||
* at91-foxg20.dts - Device Tree file for Acme Systems FoxG20 board
|
||||
*
|
||||
* Based on DT files for at91sam9g20ek evaluation board (AT91SAM9G20 SoC)
|
||||
*
|
||||
* Copyright (C) 2013 Douglas Gilbert <dgilbert@interlog.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g20.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Acme Systems FoxG20";
|
||||
compatible = "acme,foxg20", "atmel,at91sam9g20", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
usb1: gadget@fffa4000 {
|
||||
atmel,vbus-gpio = <&pioC 6 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffa8000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_mmc0_clk
|
||||
&pinctrl_mmc0_slot1_cmd_dat0
|
||||
&pinctrl_mmc0_slot1_dat1_3>;
|
||||
status = "okay";
|
||||
|
||||
slot@1 {
|
||||
reg = <1>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_usart0
|
||||
&pinctrl_usart0_rts
|
||||
&pinctrl_usart0_cts
|
||||
>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart2: serial@fffb8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart3: serial@fffd0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart0: serial@fffd4000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart1: serial@fffd8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
board {
|
||||
pinctrl_pck0_as_mck: pck0_as_mck {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_slot1 {
|
||||
pinctrl_board_mmc0_slot1: mmc0_slot1-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* CD pin */
|
||||
};
|
||||
};
|
||||
|
||||
i2c0 {
|
||||
pinctrl_i2c0: i2c0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* TWD (SDA), open drain */
|
||||
AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* TWCK (SCL), open drain */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
i2c-gpio,delay-us = <5>; /* ~85 kHz */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
/* red LED marked "PC7" near mini USB (device) receptacle */
|
||||
user_led {
|
||||
label = "user_led";
|
||||
gpios = <&pioC 7 GPIO_ACTIVE_HIGH>; /* PC7 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
btn {
|
||||
label = "Button";
|
||||
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x103>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
};
|
185
sys/gnu/dts/arm/at91-qil_a9260.dts
Normal file
185
sys/gnu/dts/arm/at91-qil_a9260.dts
Normal file
@ -0,0 +1,185 @@
|
||||
/*
|
||||
* at91-qil_a9260.dts - Device Tree file for Calao QIL A9260 board
|
||||
*
|
||||
* Copyright (C) 2011-2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9260.dtsi"
|
||||
/ {
|
||||
model = "Calao QIL A9260";
|
||||
compatible = "calao,qil-a9260", "atmel,at91sam9260", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
usb1: gadget@fffa4000 {
|
||||
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffa8000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_mmc0_clk
|
||||
&pinctrl_mmc0_slot0_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_usart0
|
||||
&pinctrl_usart0_rts
|
||||
&pinctrl_usart0_cts
|
||||
&pinctrl_usart0_dtr_dsr
|
||||
&pinctrl_usart0_dcd
|
||||
&pinctrl_usart0_ri>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_usart1
|
||||
&pinctrl_usart1_rts
|
||||
&pinctrl_usart1_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart2: serial@fffb8000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_usart2
|
||||
&pinctrl_usart2_rts
|
||||
&pinctrl_usart2_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi0: spi@fffc8000 {
|
||||
status = "okay";
|
||||
cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
m41t94@0 {
|
||||
compatible = "st,m41t94";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
shdwc@fffffd10 {
|
||||
atmel,wakeup-counter = <10>;
|
||||
atmel,wakeup-rtt-timer;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
|
||||
oftree@a0000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
|
||||
kernel@c0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@4c0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
|
||||
data@7cc0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
user_led {
|
||||
label = "user_led";
|
||||
gpios = <&pioB 21 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user_pb {
|
||||
label = "user_pb";
|
||||
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <28>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
229
sys/gnu/dts/arm/at91-sama5d3_xplained.dts
Normal file
229
sys/gnu/dts/arm/at91-sama5d3_xplained.dts
Normal file
@ -0,0 +1,229 @@
|
||||
/*
|
||||
* at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained board
|
||||
*
|
||||
* Copyright (C) 2014 Atmel,
|
||||
* 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d36.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SAMA5D3 Xplained";
|
||||
compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x10000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
mmc0: mmc@f0000000 {
|
||||
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <8>;
|
||||
cd-gpios = <&pioE 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0004000 {
|
||||
cs-gpios = <&pioD 13 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
can0: can@f000c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c0: i2c@f0014000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@f0018000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@f0028000 {
|
||||
phy-mode = "rgmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@f001c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@f0020000 {
|
||||
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart0: serial@f0024000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc1: mmc@f8000000 {
|
||||
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioE 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
spi1: spi@f8008000 {
|
||||
cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioD 16 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
adc0: adc@f8018000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_adc0_adtrg
|
||||
&pinctrl_adc0_ad0
|
||||
&pinctrl_adc0_ad1
|
||||
&pinctrl_adc0_ad2
|
||||
&pinctrl_adc0_ad3
|
||||
&pinctrl_adc0_ad4
|
||||
&pinctrl_adc0_ad5
|
||||
&pinctrl_adc0_ad6
|
||||
&pinctrl_adc0_ad7
|
||||
&pinctrl_adc0_ad8
|
||||
&pinctrl_adc0_ad9
|
||||
>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c2: i2c@f801c000 {
|
||||
dmas = <0>, <0>; /* Do not use DMA for i2c2 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb1: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
board {
|
||||
pinctrl_mmc0_cd: mmc0_cd {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
|
||||
pinctrl_mmc1_cd: mmc1_cd {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
|
||||
pinctrl_usba_vbus: usba_vbus {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
main: mainck {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@60000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc;
|
||||
atmel,pmecc-cap = <4>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: gadget@00500000 {
|
||||
atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>; /* PE9, conflicts with A9 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usba_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb1: ohci@00600000 {
|
||||
num-ports = <3>;
|
||||
atmel,vbus-gpio = <0
|
||||
&pioE 3 GPIO_ACTIVE_LOW
|
||||
&pioE 4 GPIO_ACTIVE_LOW
|
||||
>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb2: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
bp3 {
|
||||
label = "PB_USER";
|
||||
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x104>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
d2 {
|
||||
label = "d2";
|
||||
gpios = <&pioE 23 GPIO_ACTIVE_LOW>; /* PE23, conflicts with A23, CTS2 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
d3 {
|
||||
label = "d3";
|
||||
gpios = <&pioE 24 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
643
sys/gnu/dts/arm/at91rm9200.dtsi
Normal file
643
sys/gnu/dts/arm/at91rm9200.dtsi
Normal file
@ -0,0 +1,643 @@
|
||||
/*
|
||||
* at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
|
||||
* 2012 Joachim Eastwood <manabian@gmail.com>
|
||||
*
|
||||
* Based on at91sam9260.dtsi
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91RM9200 family SoC";
|
||||
compatible = "atmel,at91rm9200";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
gpio0 = &pioA;
|
||||
gpio1 = &pioB;
|
||||
gpio2 = &pioC;
|
||||
gpio3 = &pioD;
|
||||
tcb0 = &tcb0;
|
||||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
ssc0 = &ssc0;
|
||||
ssc1 = &ssc1;
|
||||
ssc2 = &ssc2;
|
||||
};
|
||||
cpus {
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu {
|
||||
compatible = "arm,arm920t";
|
||||
device_type = "cpu";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x04000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <3>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
reg = <0xfffff000 0x200>;
|
||||
atmel,external-irqs = <25 26 27 28 29 30 31>;
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffff00 {
|
||||
compatible = "atmel,at91rm9200-sdramc";
|
||||
reg = <0xffffff00 0x100>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
};
|
||||
|
||||
st: timer@fffffd00 {
|
||||
compatible = "atmel,at91rm9200-st";
|
||||
reg = <0xfffffd00 0x100>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
};
|
||||
|
||||
tcb0: timer@fffa0000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfffa0000 0x100>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
|
||||
18 IRQ_TYPE_LEVEL_HIGH 0
|
||||
19 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
tcb1: timer@fffa4000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfffa4000 0x100>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
|
||||
21 IRQ_TYPE_LEVEL_HIGH 0
|
||||
22 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
i2c0: i2c@fffb8000 {
|
||||
compatible = "atmel,at91rm9200-i2c";
|
||||
reg = <0xfffb8000 0x4000>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_twi>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffb4000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfffb4000 0x4000>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@fffd0000 {
|
||||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffd0000 0x4000>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
ssc1: ssc@fffd4000 {
|
||||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffd4000 0x4000>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
ssc2: ssc@fffd8000 {
|
||||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffd8000 0x4000>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
compatible = "cdns,at91rm9200-emac", "cdns,emac";
|
||||
reg = <0xfffbc000 0x4000>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
phy-mode = "rmii";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x800>;
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xffffffff 0xffffffff /* pioA */
|
||||
0xffffffff 0x083fffff /* pioB */
|
||||
0xffff3fff 0x00000000 /* pioC */
|
||||
0x03ff87ff 0x0fffff80 /* pioD */
|
||||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
|
||||
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
|
||||
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_cts: uart0_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts: uart0_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
|
||||
AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts: uart1_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_cts: uart1_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
|
||||
AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_dcd: uart1_dcd-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_ri: uart1_ri-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
|
||||
AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts: uart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart2_cts: uart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
|
||||
AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts: uart3_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_cts: uart3_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
|
||||
AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
macb {
|
||||
pinctrl_macb_rmii: macb_rmii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
|
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
|
||||
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
|
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
|
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
|
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
|
||||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
|
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
|
||||
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
|
||||
AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
|
||||
AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
|
||||
AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
|
||||
AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
|
||||
AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
|
||||
AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
|
||||
AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_clk: mmc0_clk-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
|
||||
AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
|
||||
AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
|
||||
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
|
||||
AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
|
||||
AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
|
||||
AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
|
||||
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
|
||||
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
|
||||
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
|
||||
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
|
||||
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
|
||||
AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
|
||||
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
|
||||
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
ssc2 {
|
||||
pinctrl_ssc2_tx: ssc2_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
|
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
|
||||
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc2_rx: ssc2_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
|
||||
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
|
||||
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
twi {
|
||||
pinctrl_twi: twi-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
|
||||
AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
|
||||
};
|
||||
|
||||
pinctrl_twi_gpio: twi_gpio-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
|
||||
AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb1 {
|
||||
pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
|
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
|
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@fffc0000 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffc0000 0x200>;
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@fffc4000 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffc4000 0x200>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@fffc8000 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffc8000 0x200>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart3: serial@fffcc000 {
|
||||
compatible = "atmel,at91rm9200-usart";
|
||||
reg = <0xfffcc000 0x200>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: gadget@fffb0000 {
|
||||
compatible = "atmel,at91rm9200-udc";
|
||||
reg = <0xfffb0000 0x4000>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@fffe0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffe0000 0x200>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
nand-ecc-mode = "soft";
|
||||
gpios = <&pioC 2 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
&pioB 1 GPIO_ACTIVE_HIGH
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00300000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00300000 0x100000>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
|
||||
&pioA 26 GPIO_ACTIVE_HIGH /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_twi_gpio>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
17
sys/gnu/dts/arm/at91rm9200_pqfp.dtsi
Normal file
17
sys/gnu/dts/arm/at91rm9200_pqfp.dtsi
Normal file
@ -0,0 +1,17 @@
|
||||
/*
|
||||
* at91rm9200_pqfp.dtsi - Device Tree Include file for AT91RM9200 PQFP family SoC
|
||||
*
|
||||
* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "at91rm9200.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "atmel,at91rm9200-pqfp", "atmel,at91rm9200";
|
||||
};
|
||||
|
||||
&pioD {
|
||||
status = "disabled";
|
||||
};
|
129
sys/gnu/dts/arm/at91rm9200ek.dts
Normal file
129
sys/gnu/dts/arm/at91rm9200ek.dts
Normal file
@ -0,0 +1,129 @@
|
||||
/*
|
||||
* at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit
|
||||
*
|
||||
* Copyright (C) 2012 Joachim Eastwood <manabian@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 only
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91rm9200.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91RM9200 evaluation kit";
|
||||
compatible = "atmel,at91rm9200ek", "atmel,at91rm9200";
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
usb1: gadget@fffb0000 {
|
||||
atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
|
||||
atmel,pullup-gpio = <&pioD 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy {
|
||||
interrupt-parent = <&pioC>;
|
||||
interrupts = <4 IRQ_TYPE_EDGE_BOTH>;
|
||||
};
|
||||
};
|
||||
|
||||
usart1: serial@fffc4000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_uart1
|
||||
&pinctrl_uart1_rts
|
||||
&pinctrl_uart1_cts
|
||||
&pinctrl_uart1_dtr_dsr
|
||||
&pinctrl_uart1_dcd
|
||||
&pinctrl_uart1_ri>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi0: spi@fffe0000 {
|
||||
status = "okay";
|
||||
cs-gpios = <&pioA 3 0>, <0>, <0>, <0>;
|
||||
mtd_dataflash@0 {
|
||||
compatible = "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <15000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00300000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nor_flash@10000000 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x10000000 0x800000>;
|
||||
linux,mtd-name = "physmap-flash.0";
|
||||
bank-width = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
barebox@0 {
|
||||
label = "barebox";
|
||||
reg = <0x00000 0x40000>;
|
||||
};
|
||||
|
||||
bareboxenv@40000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x40000 0x10000>;
|
||||
};
|
||||
|
||||
kernel@50000 {
|
||||
label = "kernel";
|
||||
reg = <0x50000 0x300000>;
|
||||
};
|
||||
|
||||
root@350000 {
|
||||
label = "root";
|
||||
reg = <0x350000 0x4B0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ds2 {
|
||||
label = "green";
|
||||
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
|
||||
ds4 {
|
||||
label = "yellow";
|
||||
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
ds6 {
|
||||
label = "red";
|
||||
gpios = <&pioB 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
700
sys/gnu/dts/arm/at91sam9260.dtsi
Normal file
700
sys/gnu/dts/arm/at91sam9260.dtsi
Normal file
@ -0,0 +1,700 @@
|
||||
/*
|
||||
* at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
|
||||
* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9260 family SoC";
|
||||
compatible = "atmel,at91sam9260";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
serial5 = &uart0;
|
||||
serial6 = &uart1;
|
||||
gpio0 = &pioA;
|
||||
gpio1 = &pioB;
|
||||
gpio2 = &pioC;
|
||||
tcb0 = &tcb0;
|
||||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
ssc0 = &ssc0;
|
||||
};
|
||||
cpus {
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu {
|
||||
compatible = "arm,arm926ej-s";
|
||||
device_type = "cpu";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x04000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <3>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
reg = <0xfffff000 0x200>;
|
||||
atmel,external-irqs = <29 30 31>;
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffea00 {
|
||||
compatible = "atmel,at91sam9260-sdramc";
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
};
|
||||
|
||||
rstc@fffffd00 {
|
||||
compatible = "atmel,at91sam9260-rstc";
|
||||
reg = <0xfffffd00 0x10>;
|
||||
};
|
||||
|
||||
shdwc@fffffd10 {
|
||||
compatible = "atmel,at91sam9260-shdwc";
|
||||
reg = <0xfffffd10 0x10>;
|
||||
};
|
||||
|
||||
pit: timer@fffffd30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffd30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
};
|
||||
|
||||
tcb0: timer@fffa0000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfffa0000 0x100>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
|
||||
18 IRQ_TYPE_LEVEL_HIGH 0
|
||||
19 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
tcb1: timer@fffdc000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfffdc000 0x100>;
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
|
||||
27 IRQ_TYPE_LEVEL_HIGH 0
|
||||
28 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x600>;
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xffffffff 0xffc00c3b /* pioA */
|
||||
0xffffffff 0x7fff3ccf /* pioB */
|
||||
0xffffffff 0x007fffff /* pioC */
|
||||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
|
||||
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
|
||||
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
|
||||
AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_dcd: usart0_dcd-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_ri: usart0_ri-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
|
||||
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
|
||||
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
|
||||
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
|
||||
AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
|
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
|
||||
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
macb {
|
||||
pinctrl_macb_rmii: macb_rmii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
|
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
|
||||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
|
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
|
||||
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
|
||||
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
|
||||
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
|
||||
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
|
||||
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
|
||||
AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
|
||||
AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
|
||||
AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
|
||||
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
|
||||
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
|
||||
AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
|
||||
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
|
||||
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
|
||||
AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
|
||||
AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
|
||||
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
|
||||
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
|
||||
AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
|
||||
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
|
||||
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_clk: mmc0_clk-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
|
||||
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
|
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
|
||||
AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
|
||||
AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
|
||||
AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
|
||||
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
|
||||
AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
|
||||
AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
|
||||
AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
|
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
|
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
|
||||
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
|
||||
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
i2c_gpio0 {
|
||||
pinctrl_i2c_gpio0: i2c_gpio0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
|
||||
AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb1 {
|
||||
pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb0000 0x200>;
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb4000 0x200>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@fffb8000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb8000 0x200>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart3: serial@fffd0000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffd0000 0x200>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@fffd4000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffd4000 0x200>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@fffd8000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffd8000 0x200>;
|
||||
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffc4000 {
|
||||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xfffc4000 0x100>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: gadget@fffa4000 {
|
||||
compatible = "atmel,at91rm9200-udc";
|
||||
reg = <0xfffa4000 0x4000>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@fffac000 {
|
||||
compatible = "atmel,at91sam9260-i2c";
|
||||
reg = <0xfffac000 0x100>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffa8000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfffa8000 0x600>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@fffbc000 {
|
||||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffbc000 0x4000>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@fffc8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffc8000 0x200>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@fffcc000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffcc000 0x200>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc0: adc@fffe0000 {
|
||||
compatible = "atmel,at91sam9260-adc";
|
||||
reg = <0xfffe0000 0x100>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
atmel,adc-use-external-triggers;
|
||||
atmel,adc-channels-used = <0xf>;
|
||||
atmel,adc-vref = <3300>;
|
||||
atmel,adc-num-channels = <4>;
|
||||
atmel,adc-startup-time = <15>;
|
||||
atmel,adc-channel-base = <0x30>;
|
||||
atmel,adc-drdy-mask = <0x10000>;
|
||||
atmel,adc-status-register = <0x1c>;
|
||||
atmel,adc-trigger-register = <0x04>;
|
||||
atmel,adc-res = <8 10>;
|
||||
atmel,adc-res-names = "lowres", "highres";
|
||||
atmel,adc-use-res = "highres";
|
||||
|
||||
trigger@0 {
|
||||
trigger-name = "timer-counter-0";
|
||||
trigger-value = <0x1>;
|
||||
};
|
||||
trigger@1 {
|
||||
trigger-name = "timer-counter-1";
|
||||
trigger-value = <0x3>;
|
||||
};
|
||||
|
||||
trigger@2 {
|
||||
trigger-name = "timer-counter-2";
|
||||
trigger-value = <0x5>;
|
||||
};
|
||||
|
||||
trigger@3 {
|
||||
trigger-name = "external";
|
||||
trigger-value = <0x13>;
|
||||
trigger-external;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
reg = <0xfffffd40 0x10>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000
|
||||
0xffffe800 0x200
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioC 13 GPIO_ACTIVE_HIGH
|
||||
&pioC 14 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x100000>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
|
||||
&pioA 24 GPIO_ACTIVE_HIGH /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_gpio0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
641
sys/gnu/dts/arm/at91sam9263.dtsi
Normal file
641
sys/gnu/dts/arm/at91sam9263.dtsi
Normal file
@ -0,0 +1,641 @@
|
||||
/*
|
||||
* at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 only.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9263 family SoC";
|
||||
compatible = "atmel,at91sam9263";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
gpio0 = &pioA;
|
||||
gpio1 = &pioB;
|
||||
gpio2 = &pioC;
|
||||
gpio3 = &pioD;
|
||||
gpio4 = &pioE;
|
||||
tcb0 = &tcb0;
|
||||
i2c0 = &i2c0;
|
||||
ssc0 = &ssc0;
|
||||
ssc1 = &ssc1;
|
||||
pwm0 = &pwm0;
|
||||
};
|
||||
cpus {
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu {
|
||||
compatible = "arm,arm926ej-s";
|
||||
device_type = "cpu";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x08000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <3>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
reg = <0xfffff000 0x200>;
|
||||
atmel,external-irqs = <30 31>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
};
|
||||
|
||||
ramc: ramc@ffffe200 {
|
||||
compatible = "atmel,at91sam9260-sdramc";
|
||||
reg = <0xffffe200 0x200
|
||||
0xffffe800 0x200>;
|
||||
};
|
||||
|
||||
pit: timer@fffffd30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffd30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
};
|
||||
|
||||
tcb0: timer@fff7c000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfff7c000 0x100>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
rstc@fffffd00 {
|
||||
compatible = "atmel,at91sam9260-rstc";
|
||||
reg = <0xfffffd00 0x10>;
|
||||
};
|
||||
|
||||
shdwc@fffffd10 {
|
||||
compatible = "atmel,at91sam9260-shdwc";
|
||||
reg = <0xfffffd10 0x10>;
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff200 0xfffff200 0xa00>;
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xfffffffb 0xffffe07f /* pioA */
|
||||
0x0007ffff 0x39072fff /* pioB */
|
||||
0xffffffff 0x3ffffff8 /* pioC */
|
||||
0xfffffbff 0xffffffff /* pioD */
|
||||
0xffe00fff 0xfbfcff00 /* pioE */
|
||||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
|
||||
AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
|
||||
AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
|
||||
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
|
||||
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
|
||||
AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
macb {
|
||||
pinctrl_macb_rmii: macb_rmii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
|
||||
AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
|
||||
AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
|
||||
AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
|
||||
AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
|
||||
AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
|
||||
AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
|
||||
AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
|
||||
AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
|
||||
AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
|
||||
AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
|
||||
AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
|
||||
AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
|
||||
AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
|
||||
AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
|
||||
AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
|
||||
AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_clk: mmc0_clk-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
|
||||
AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
|
||||
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
|
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
|
||||
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
|
||||
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
|
||||
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_mmc1_clk: mmc1_clk-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
|
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
|
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
|
||||
AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
|
||||
AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
|
||||
AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
|
||||
AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
|
||||
AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
|
||||
AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
|
||||
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
|
||||
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
|
||||
AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
|
||||
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
|
||||
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
|
||||
AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
|
||||
AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
|
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
|
||||
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
fb {
|
||||
pinctrl_fb: fb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
|
||||
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
|
||||
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
|
||||
AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
|
||||
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
|
||||
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
|
||||
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
|
||||
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
|
||||
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
|
||||
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
|
||||
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
|
||||
AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
|
||||
AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
|
||||
AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
|
||||
AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
|
||||
AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
|
||||
AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
|
||||
AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
|
||||
AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
|
||||
AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
|
||||
AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
|
||||
AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioE: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xffffee00 0x200>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@fff8c000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff8c000 0x200>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@fff90000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff90000 0x200>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@fff94000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff94000 0x200>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@fff98000 {
|
||||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfff98000 0x4000>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc1: ssc@fff9c000 {
|
||||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfff9c000 0x4000>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xfffbc000 0x100>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: gadget@fff78000 {
|
||||
compatible = "atmel,at91rm9200-udc";
|
||||
reg = <0xfff78000 0x4000>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@fff88000 {
|
||||
compatible = "atmel,at91sam9260-i2c";
|
||||
reg = <0xfff88000 0x100>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfff80000 0x600>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@fff84000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfff84000 0x600>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
reg = <0xfffffd40 0x10>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@fffa4000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffa4000 0x200>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@fffa8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffa8000 0x200>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm0: pwm@fffb8000 {
|
||||
compatible = "atmel,at91sam9rl-pwm";
|
||||
reg = <0xfffb8000 0x300>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
fb0: fb@0x00700000 {
|
||||
compatible = "atmel,at91sam9263-lcdc";
|
||||
reg = <0x00700000 0x1000>;
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fb>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000
|
||||
0xffffe000 0x200
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioA 22 GPIO_ACTIVE_HIGH
|
||||
&pioD 15 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00a00000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00a00000 0x100000>;
|
||||
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
|
||||
&pioB 5 GPIO_ACTIVE_HIGH /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
227
sys/gnu/dts/arm/at91sam9263ek.dts
Normal file
227
sys/gnu/dts/arm/at91sam9263ek.dts
Normal file
@ -0,0 +1,227 @@
|
||||
/*
|
||||
* at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 only
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9263.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel at91sam9263ek";
|
||||
compatible = "atmel,at91sam9263ek", "atmel,at91sam9263", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <16367660>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@ffffee00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@fff8c000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_usart0
|
||||
&pinctrl_usart0_rts
|
||||
&pinctrl_usart0_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb1: gadget@fff78000 {
|
||||
atmel,vbus-gpio = <&pioA 25 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_clk
|
||||
&pinctrl_mmc0_slot0_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>;
|
||||
wp-gpios = <&pioE 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PE18 gpio CD pin pull up and deglitch */
|
||||
AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@fffa4000 {
|
||||
status = "okay";
|
||||
cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
|
||||
mtd_dataflash@0 {
|
||||
compatible = "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
fb0: fb@0x00700000 {
|
||||
display = <&display0>;
|
||||
status = "okay";
|
||||
|
||||
display0: display {
|
||||
bits-per-pixel = <16>;
|
||||
atmel,lcdcon-backlight;
|
||||
atmel,dmacon = <0x1>;
|
||||
atmel,lcdcon2 = <0x80008002>;
|
||||
atmel,guard-time = <1>;
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: timing0 {
|
||||
clock-frequency = <4965000>;
|
||||
hactive = <240>;
|
||||
vactive = <320>;
|
||||
hback-porch = <1>;
|
||||
hfront-porch = <33>;
|
||||
vback-porch = <1>;
|
||||
vfront-porch = <0>;
|
||||
hsync-len = <5>;
|
||||
vsync-len = <1>;
|
||||
hsync-active = <1>;
|
||||
vsync-active = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt = <1>;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
|
||||
oftree@80000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
|
||||
kernel@a0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@4a0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
|
||||
data@7ca0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00a00000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH
|
||||
&pioA 21 GPIO_ACTIVE_HIGH
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
d3 {
|
||||
label = "d3";
|
||||
gpios = <&pioB 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
d2 {
|
||||
label = "d2";
|
||||
gpios = <&pioC 29 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "nand-disk";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
left_click {
|
||||
label = "left_click";
|
||||
gpios = <&pioC 5 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <272>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
right_click {
|
||||
label = "right_click";
|
||||
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <273>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
status = "okay";
|
||||
|
||||
24c512@50 {
|
||||
compatible = "24c512";
|
||||
reg = <0x50>;
|
||||
pagesize = <128>;
|
||||
};
|
||||
};
|
||||
};
|
28
sys/gnu/dts/arm/at91sam9g15.dtsi
Normal file
28
sys/gnu/dts/arm/at91sam9g15.dtsi
Normal file
@ -0,0 +1,28 @@
|
||||
/*
|
||||
* at91sam9g15.dtsi - Device Tree Include file for AT91SAM9G15 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include "at91sam9x5.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G15 SoC";
|
||||
compatible = "atmel,at91sam9g15", "atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe0399f 0x00000000 /* pioA */
|
||||
0x00040000 0x00047e3f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x00000000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
16
sys/gnu/dts/arm/at91sam9g15ek.dts
Normal file
16
sys/gnu/dts/arm/at91sam9g15ek.dts
Normal file
@ -0,0 +1,16 @@
|
||||
/*
|
||||
* at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g15.dtsi"
|
||||
#include "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G15-EK";
|
||||
compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
};
|
30
sys/gnu/dts/arm/at91sam9g20.dtsi
Normal file
30
sys/gnu/dts/arm/at91sam9g20.dtsi
Normal file
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include "at91sam9260.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G20 family SoC";
|
||||
compatible = "atmel,at91sam9g20";
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x08000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
i2c0: i2c@fffac000 {
|
||||
compatible = "atmel,at91sam9g20-i2c";
|
||||
};
|
||||
|
||||
adc0: adc@fffe0000 {
|
||||
atmel,adc-startup-time = <40>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
29
sys/gnu/dts/arm/at91sam9g20ek.dts
Normal file
29
sys/gnu/dts/arm/at91sam9g20ek.dts
Normal file
@ -0,0 +1,29 @@
|
||||
/*
|
||||
* at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g20ek_common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel at91sam9g20ek";
|
||||
compatible = "atmel,at91sam9g20ek", "atmel,at91sam9g20", "atmel,at91sam9";
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ds1 {
|
||||
label = "ds1";
|
||||
gpios = <&pioA 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
ds5 {
|
||||
label = "ds5";
|
||||
gpios = <&pioA 6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
55
sys/gnu/dts/arm/at91sam9g20ek_2mmc.dts
Normal file
55
sys/gnu/dts/arm/at91sam9g20ek_2mmc.dts
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* at91sam9g20ek_2mmc.dts - Device Tree file for Atmel at91sam9g20ek 2 MMC board
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g20ek_common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel at91sam9g20ek 2 mmc";
|
||||
compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
apb{
|
||||
mmc0: mmc@fffa8000 {
|
||||
/* clk already mux wuth slot0 */
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0_slot0
|
||||
&pinctrl_mmc0_slot0_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioC 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0_slot0 {
|
||||
pinctrl_board_mmc0_slot0: mmc0_slot0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC2 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ds1 {
|
||||
label = "ds1";
|
||||
gpios = <&pioB 9 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
ds5 {
|
||||
label = "ds5";
|
||||
gpios = <&pioB 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
211
sys/gnu/dts/arm/at91sam9g20ek_common.dtsi
Normal file
211
sys/gnu/dts/arm/at91sam9g20ek_common.dtsi
Normal file
@ -0,0 +1,211 @@
|
||||
/*
|
||||
* at91sam9g20ek_common.dtsi - Device Tree file for Atmel at91sam9g20ek board
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
#include "at91sam9g20.dtsi"
|
||||
|
||||
/ {
|
||||
|
||||
chosen {
|
||||
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
board {
|
||||
pinctrl_pck0_as_mck: pck0_as_mck {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
mmc0_slot1 {
|
||||
pinctrl_board_mmc0_slot1: mmc0_slot1-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC9 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_usart0
|
||||
&pinctrl_usart0_rts
|
||||
&pinctrl_usart0_cts
|
||||
&pinctrl_usart0_dtr_dsr
|
||||
&pinctrl_usart0_dcd
|
||||
&pinctrl_usart0_ri>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb1: gadget@fffa4000 {
|
||||
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffa8000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0_slot1
|
||||
&pinctrl_mmc0_clk
|
||||
&pinctrl_mmc0_slot1_cmd_dat0
|
||||
&pinctrl_mmc0_slot1_dat1_3>;
|
||||
status = "okay";
|
||||
slot@1 {
|
||||
reg = <1>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
ssc0: ssc@fffbc000 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx>;
|
||||
};
|
||||
|
||||
spi0: spi@fffc8000 {
|
||||
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
|
||||
mtd_dataflash@0 {
|
||||
compatible = "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x20000>;
|
||||
};
|
||||
|
||||
bareboxenv2@80000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
|
||||
oftree@80000 {
|
||||
label = "oftree";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
|
||||
kernel@a0000 {
|
||||
label = "kernel";
|
||||
reg = <0xc0000 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@4a0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4c0000 0x7800000>;
|
||||
};
|
||||
|
||||
data@7ca0000 {
|
||||
label = "data";
|
||||
reg = <0x7cc0000 0x8340000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
status = "okay";
|
||||
|
||||
24c512@50 {
|
||||
compatible = "24c512";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
wm8731: wm8731@1b {
|
||||
compatible = "wm8731";
|
||||
reg = <0x1b>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
btn3 {
|
||||
label = "Button 3";
|
||||
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x103>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
btn4 {
|
||||
label = "Button 4";
|
||||
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x104>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "atmel,at91sam9g20ek-wm8731-audio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pck0_as_mck>;
|
||||
|
||||
atmel,model = "wm8731 @ AT91SAMG20EK";
|
||||
|
||||
atmel,audio-routing =
|
||||
"Ext Spk", "LHPOUT",
|
||||
"Int Mic", "MICIN";
|
||||
|
||||
atmel,ssc-controller = <&ssc0>;
|
||||
atmel,audio-codec = <&wm8731>;
|
||||
};
|
||||
};
|
30
sys/gnu/dts/arm/at91sam9g25.dtsi
Normal file
30
sys/gnu/dts/arm/at91sam9g25.dtsi
Normal file
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* at91sam9g25.dtsi - Device Tree Include file for AT91SAM9G25 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include "at91sam9x5.dtsi"
|
||||
#include "at91sam9x5_usart3.dtsi"
|
||||
#include "at91sam9x5_macb0.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G25 SoC";
|
||||
compatible = "atmel,at91sam9g25", "atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe0399f 0xc000001c /* pioA */
|
||||
0x0007ffff 0x8000fe3f 0x00000000 /* pioB */
|
||||
0x80000000 0x07c0ffff 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
25
sys/gnu/dts/arm/at91sam9g25ek.dts
Normal file
25
sys/gnu/dts/arm/at91sam9g25ek.dts
Normal file
@ -0,0 +1,25 @@
|
||||
/*
|
||||
* at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g25.dtsi"
|
||||
#include "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G25-EK";
|
||||
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
29
sys/gnu/dts/arm/at91sam9g35.dtsi
Normal file
29
sys/gnu/dts/arm/at91sam9g35.dtsi
Normal file
@ -0,0 +1,29 @@
|
||||
/*
|
||||
* at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include "at91sam9x5.dtsi"
|
||||
#include "at91sam9x5_macb0.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G35 SoC";
|
||||
compatible = "atmel,at91sam9g35", "atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe0399f 0xc000000c /* pioA */
|
||||
0x000406ff 0x00047e3f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x00000000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
25
sys/gnu/dts/arm/at91sam9g35ek.dts
Normal file
25
sys/gnu/dts/arm/at91sam9g35ek.dts
Normal file
@ -0,0 +1,25 @@
|
||||
/*
|
||||
* at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g35.dtsi"
|
||||
#include "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G35-EK";
|
||||
compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
856
sys/gnu/dts/arm/at91sam9g45.dtsi
Normal file
856
sys/gnu/dts/arm/at91sam9g45.dtsi
Normal file
@ -0,0 +1,856 @@
|
||||
/*
|
||||
* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
|
||||
* applies to AT91SAM9G45, AT91SAM9M10,
|
||||
* AT91SAM9G46, AT91SAM9M11 SoC
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G45 family SoC";
|
||||
compatible = "atmel,at91sam9g45";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
gpio0 = &pioA;
|
||||
gpio1 = &pioB;
|
||||
gpio2 = &pioC;
|
||||
gpio3 = &pioD;
|
||||
gpio4 = &pioE;
|
||||
tcb0 = &tcb0;
|
||||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
ssc0 = &ssc0;
|
||||
ssc1 = &ssc1;
|
||||
pwm0 = &pwm0;
|
||||
};
|
||||
cpus {
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu {
|
||||
compatible = "arm,arm926ej-s";
|
||||
device_type = "cpu";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x10000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <3>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
reg = <0xfffff000 0x200>;
|
||||
atmel,external-irqs = <31>;
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffe400 {
|
||||
compatible = "atmel,at91sam9g45-ddramc";
|
||||
reg = <0xffffe400 0x200
|
||||
0xffffe600 0x200>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
};
|
||||
|
||||
rstc@fffffd00 {
|
||||
compatible = "atmel,at91sam9g45-rstc";
|
||||
reg = <0xfffffd00 0x10>;
|
||||
};
|
||||
|
||||
pit: timer@fffffd30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffd30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
};
|
||||
|
||||
|
||||
shdwc@fffffd10 {
|
||||
compatible = "atmel,at91sam9rl-shdwc";
|
||||
reg = <0xfffffd10 0x10>;
|
||||
};
|
||||
|
||||
tcb0: timer@fff7c000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfff7c000 0x100>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
tcb1: timer@fffd4000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfffd4000 0x100>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
dma: dma-controller@ffffec00 {
|
||||
compatible = "atmel,at91sam9g45-dma";
|
||||
reg = <0xffffec00 0x200>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#dma-cells = <2>;
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff200 0xfffff200 0xa00>;
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B */
|
||||
0xffffffff 0xffc003ff /* pioA */
|
||||
0xffffffff 0x800f8f00 /* pioB */
|
||||
0xffffffff 0x00000e00 /* pioC */
|
||||
0xffffffff 0xff0c1381 /* pioD */
|
||||
0xffffffff 0x81ffff81 /* pioE */
|
||||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
|
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
i2c0 {
|
||||
pinctrl_i2c0: i2c0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
|
||||
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
|
||||
};
|
||||
};
|
||||
|
||||
i2c1 {
|
||||
pinctrl_i2c1: i2c1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
|
||||
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
|
||||
AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
|
||||
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
|
||||
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
|
||||
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
|
||||
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
macb {
|
||||
pinctrl_macb_rmii: macb_rmii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
|
||||
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
|
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
|
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
|
||||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
|
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
|
||||
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
|
||||
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
|
||||
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
|
||||
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
|
||||
AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
|
||||
AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
|
||||
AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
|
||||
AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
|
||||
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
|
||||
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
|
||||
AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
|
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
|
||||
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
|
||||
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
|
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
|
||||
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
|
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
|
||||
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
|
||||
AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
|
||||
AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
|
||||
AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
|
||||
AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
|
||||
AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
|
||||
AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
|
||||
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
|
||||
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
|
||||
AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
|
||||
AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
|
||||
AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
|
||||
AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
|
||||
AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
|
||||
AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
|
||||
AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
|
||||
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
|
||||
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
|
||||
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
|
||||
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb1 {
|
||||
pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
fb {
|
||||
pinctrl_fb: fb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
|
||||
AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
|
||||
AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
|
||||
AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
|
||||
AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
|
||||
AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
|
||||
AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
|
||||
AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
|
||||
AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
|
||||
AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
|
||||
AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
|
||||
AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
|
||||
AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
|
||||
AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
|
||||
AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
|
||||
AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
|
||||
AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
|
||||
AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
|
||||
AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
|
||||
AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
|
||||
AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
|
||||
AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
|
||||
AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
|
||||
AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
|
||||
AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
|
||||
AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
|
||||
AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
|
||||
AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
|
||||
AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
|
||||
AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioE: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xffffee00 0x200>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@fff8c000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff8c000 0x200>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@fff90000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff90000 0x200>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@fff94000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff94000 0x200>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart3: serial@fff98000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff98000 0x200>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xfffbc000 0x100>;
|
||||
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@fff84000 {
|
||||
compatible = "atmel,at91sam9g10-i2c";
|
||||
reg = <0xfff84000 0x100>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@fff88000 {
|
||||
compatible = "atmel,at91sam9g10-i2c";
|
||||
reg = <0xfff88000 0x100>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@fff9c000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xfff9c000 0x4000>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc1: ssc@fffa0000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xfffa0000 0x4000>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc0: adc@fffb0000 {
|
||||
compatible = "atmel,at91sam9260-adc";
|
||||
reg = <0xfffb0000 0x100>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
atmel,adc-use-external-triggers;
|
||||
atmel,adc-channels-used = <0xff>;
|
||||
atmel,adc-vref = <3300>;
|
||||
atmel,adc-num-channels = <8>;
|
||||
atmel,adc-startup-time = <40>;
|
||||
atmel,adc-channel-base = <0x30>;
|
||||
atmel,adc-drdy-mask = <0x10000>;
|
||||
atmel,adc-status-register = <0x1c>;
|
||||
atmel,adc-trigger-register = <0x08>;
|
||||
atmel,adc-res = <8 10>;
|
||||
atmel,adc-res-names = "lowres", "highres";
|
||||
atmel,adc-use-res = "highres";
|
||||
|
||||
trigger@0 {
|
||||
trigger-name = "external-rising";
|
||||
trigger-value = <0x1>;
|
||||
trigger-external;
|
||||
};
|
||||
trigger@1 {
|
||||
trigger-name = "external-falling";
|
||||
trigger-value = <0x2>;
|
||||
trigger-external;
|
||||
};
|
||||
|
||||
trigger@2 {
|
||||
trigger-name = "external-any";
|
||||
trigger-value = <0x3>;
|
||||
trigger-external;
|
||||
};
|
||||
|
||||
trigger@3 {
|
||||
trigger-name = "continuous";
|
||||
trigger-value = <0x6>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm0: pwm@fffb8000 {
|
||||
compatible = "atmel,at91sam9rl-pwm";
|
||||
reg = <0xfffb8000 0x300>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfff80000 0x600>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
pinctrl-names = "default";
|
||||
dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@fffd0000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfffd0000 0x600>;
|
||||
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
pinctrl-names = "default";
|
||||
dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
|
||||
dma-names = "rxtx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
reg = <0xfffffd40 0x10>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@fffa4000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffa4000 0x200>;
|
||||
interrupts = <14 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@fffa8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffa8000 0x200>;
|
||||
interrupts = <15 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb2: gadget@fff78000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91sam9rl-udc";
|
||||
reg = <0x00600000 0x80000
|
||||
0xfff78000 0x400>;
|
||||
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
status = "disabled";
|
||||
|
||||
ep0 {
|
||||
reg = <0>;
|
||||
atmel,fifo-size = <64>;
|
||||
atmel,nb-banks = <1>;
|
||||
};
|
||||
|
||||
ep1 {
|
||||
reg = <1>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <2>;
|
||||
atmel,can-dma;
|
||||
atmel,can-isoc;
|
||||
};
|
||||
|
||||
ep2 {
|
||||
reg = <2>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <2>;
|
||||
atmel,can-dma;
|
||||
atmel,can-isoc;
|
||||
};
|
||||
|
||||
ep3 {
|
||||
reg = <3>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <3>;
|
||||
atmel,can-dma;
|
||||
};
|
||||
|
||||
ep4 {
|
||||
reg = <4>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <3>;
|
||||
atmel,can-dma;
|
||||
};
|
||||
|
||||
ep5 {
|
||||
reg = <5>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <3>;
|
||||
atmel,can-dma;
|
||||
atmel,can-isoc;
|
||||
};
|
||||
|
||||
ep6 {
|
||||
reg = <6>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <3>;
|
||||
atmel,can-dma;
|
||||
atmel,can-isoc;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fb0: fb@0x00500000 {
|
||||
compatible = "atmel,at91sam9g45-lcdc";
|
||||
reg = <0x00500000 0x1000>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fb>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000
|
||||
0xffffe200 0x200
|
||||
>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioC 8 GPIO_ACTIVE_HIGH
|
||||
&pioC 14 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00700000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00700000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: ehci@00800000 {
|
||||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00800000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
|
||||
&pioA 21 GPIO_ACTIVE_HIGH /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <5>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
279
sys/gnu/dts/arm/at91sam9m10g45ek.dts
Normal file
279
sys/gnu/dts/arm/at91sam9m10g45ek.dts
Normal file
@ -0,0 +1,279 @@
|
||||
/*
|
||||
* at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g45.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9M10G45-EK";
|
||||
compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@ffffee00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fff90000 {
|
||||
pinctrl-0 =
|
||||
<&pinctrl_usart1
|
||||
&pinctrl_usart1_rts
|
||||
&pinctrl_usart1_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c0: i2c@fff84000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@fff88000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1: mmc@fffd0000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc1
|
||||
&pinctrl_mmc1_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc1_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>;
|
||||
wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_board_mmc1: mmc1-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and deglitch */
|
||||
AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */
|
||||
};
|
||||
};
|
||||
|
||||
pwm0 {
|
||||
pinctrl_pwm_leds: pwm-led {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PD0 periph B */
|
||||
AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PD31 periph B */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@fffa4000{
|
||||
status = "okay";
|
||||
cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
|
||||
mtd_dataflash@0 {
|
||||
compatible = "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <13000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
usb2: gadget@fff78000 {
|
||||
atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwm0: pwm@fffb8000 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm_leds>;
|
||||
};
|
||||
};
|
||||
|
||||
fb0: fb@0x00500000 {
|
||||
display = <&display0>;
|
||||
status = "okay";
|
||||
|
||||
display0: display {
|
||||
bits-per-pixel = <32>;
|
||||
atmel,lcdcon-backlight;
|
||||
atmel,dmacon = <0x1>;
|
||||
atmel,lcdcon2 = <0x80008002>;
|
||||
atmel,guard-time = <9>;
|
||||
atmel,lcd-wiring-mode = "RGB";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: timing0 {
|
||||
clock-frequency = <9000000>;
|
||||
hactive = <480>;
|
||||
vactive = <272>;
|
||||
hback-porch = <1>;
|
||||
hfront-porch = <1>;
|
||||
vback-porch = <40>;
|
||||
vfront-porch = <1>;
|
||||
hsync-len = <45>;
|
||||
vsync-len = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
boot@0 {
|
||||
label = "bootstrap/uboot/kernel";
|
||||
reg = <0x0 0x400000>;
|
||||
};
|
||||
|
||||
rootfs@400000 {
|
||||
label = "rootfs";
|
||||
reg = <0x400000 0x3C00000>;
|
||||
};
|
||||
|
||||
data@4000000 {
|
||||
label = "data";
|
||||
reg = <0x4000000 0xC000000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00700000 {
|
||||
status = "okay";
|
||||
num-ports = <2>;
|
||||
atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
|
||||
&pioD 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
usb1: ehci@00800000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
d8 {
|
||||
label = "d8";
|
||||
gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
pwmleds {
|
||||
compatible = "pwm-leds";
|
||||
|
||||
d6 {
|
||||
label = "d6";
|
||||
pwms = <&pwm0 3 5000 0>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "nand-disk";
|
||||
};
|
||||
|
||||
d7 {
|
||||
label = "d7";
|
||||
pwms = <&pwm0 1 5000 0>;
|
||||
max-brightness = <255>;
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
left_click {
|
||||
label = "left_click";
|
||||
gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <272>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
right_click {
|
||||
label = "right_click";
|
||||
gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <273>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
left {
|
||||
label = "Joystick Left";
|
||||
gpios = <&pioB 14 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <105>;
|
||||
};
|
||||
|
||||
right {
|
||||
label = "Joystick Right";
|
||||
gpios = <&pioB 15 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <106>;
|
||||
};
|
||||
|
||||
up {
|
||||
label = "Joystick Up";
|
||||
gpios = <&pioB 16 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <103>;
|
||||
};
|
||||
|
||||
down {
|
||||
label = "Joystick Down";
|
||||
gpios = <&pioB 17 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <108>;
|
||||
};
|
||||
|
||||
enter {
|
||||
label = "Joystick Press";
|
||||
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <28>;
|
||||
};
|
||||
};
|
||||
};
|
602
sys/gnu/dts/arm/at91sam9n12.dtsi
Normal file
602
sys/gnu/dts/arm/at91sam9n12.dtsi
Normal file
@ -0,0 +1,602 @@
|
||||
/*
|
||||
* at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Hong Xu <hong.xu@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9N12 SoC";
|
||||
compatible = "atmel,at91sam9n12";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
gpio0 = &pioA;
|
||||
gpio1 = &pioB;
|
||||
gpio2 = &pioC;
|
||||
gpio3 = &pioD;
|
||||
tcb0 = &tcb0;
|
||||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
ssc0 = &ssc0;
|
||||
pwm0 = &pwm0;
|
||||
};
|
||||
cpus {
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu {
|
||||
compatible = "arm,arm926ej-s";
|
||||
device_type = "cpu";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x10000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <3>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
reg = <0xfffff000 0x200>;
|
||||
atmel,external-irqs = <31>;
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffe800 {
|
||||
compatible = "atmel,at91sam9g45-ddramc";
|
||||
reg = <0xffffe800 0x200>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
};
|
||||
|
||||
rstc@fffffe00 {
|
||||
compatible = "atmel,at91sam9g45-rstc";
|
||||
reg = <0xfffffe00 0x10>;
|
||||
};
|
||||
|
||||
pit: timer@fffffe30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffe30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
};
|
||||
|
||||
shdwc@fffffe10 {
|
||||
compatible = "atmel,at91sam9x5-shdwc";
|
||||
reg = <0xfffffe10 0x10>;
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf0008000 0x600>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tcb0: timer@f8008000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf8008000 0x100>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
tcb1: timer@f800c000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf800c000 0x100>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
dma: dma-controller@ffffec00 {
|
||||
compatible = "atmel,at91sam9g45-dma";
|
||||
reg = <0xffffec00 0x200>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#dma-cells = <2>;
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x800>;
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe07983 0x00000000 /* pioA */
|
||||
0x00040000 0x00047e0f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x07c00000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
|
||||
AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
|
||||
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
|
||||
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
|
||||
AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
|
||||
AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
|
||||
AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
|
||||
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
|
||||
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
|
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
|
||||
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
|
||||
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
|
||||
AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
|
||||
AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
|
||||
AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
|
||||
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
|
||||
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
|
||||
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
|
||||
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
|
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
|
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
|
||||
AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
|
||||
AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
i2c0 {
|
||||
pinctrl_i2c0: i2c0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c1 {
|
||||
pinctrl_i2c1: i2c1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
|
||||
AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb1 {
|
||||
pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
|
||||
<&dma 0 AT91_DMA_CFG_PER_ID(22)>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf801c000 0x4000>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@f8020000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8020000 0x4000>;
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@f8024000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8024000 0x4000>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart3: serial@f8028000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8028000 0x4000>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@f8010000 {
|
||||
compatible = "atmel,at91sam9x5-i2c";
|
||||
reg = <0xf8010000 0x100>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
|
||||
<&dma 1 AT91_DMA_CFG_PER_ID(14)>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@f8014000 {
|
||||
compatible = "atmel,at91sam9x5-i2c";
|
||||
reg = <0xf8014000 0x100>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
|
||||
<&dma 1 AT91_DMA_CFG_PER_ID(16)>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@f0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xf0000000 0x100>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
|
||||
<&dma 1 AT91_DMA_CFG_PER_ID(2)>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@f0004000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xf0004000 0x100>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
|
||||
<&dma 1 AT91_DMA_CFG_PER_ID(4)>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
watchdog@fffffe40 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
reg = <0xfffffe40 0x10>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm0: pwm@f8034000 {
|
||||
compatible = "atmel,at91sam9rl-pwm";
|
||||
reg = <0xf8034000 0x300>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = < 0x40000000 0x10000000
|
||||
0xffffe000 0x00000600
|
||||
0xffffe600 0x00000200
|
||||
0x00108000 0x00018000
|
||||
>;
|
||||
atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioD 5 GPIO_ACTIVE_HIGH
|
||||
&pioD 4 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x00100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
|
||||
&pioA 31 GPIO_ACTIVE_HIGH /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
183
sys/gnu/dts/arm/at91sam9n12ek.dts
Normal file
183
sys/gnu/dts/arm/at91sam9n12ek.dts
Normal file
@ -0,0 +1,183 @@
|
||||
/*
|
||||
* at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Hong Xu <hong.xu@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9n12.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9N12-EK";
|
||||
compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <16000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c0: i2c@f8010000 {
|
||||
status = "okay";
|
||||
|
||||
wm8904: codec@1a {
|
||||
compatible = "wm8904";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
||||
qt1070: keyboard@1b {
|
||||
compatible = "qt1070";
|
||||
reg = <0x1b>;
|
||||
interrupt-parent = <&pioA>;
|
||||
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qt1070_irq>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c1: i2c@f8014000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioA 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA7 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
|
||||
qt1070 {
|
||||
pinctrl_qt1070_irq: qt1070_irq {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0000000 {
|
||||
status = "okay";
|
||||
cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
|
||||
m25p80@0 {
|
||||
compatible = "atmel,at25df321a";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffe40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc;
|
||||
atmel,pmecc-cap = <2>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
d8 {
|
||||
label = "d8";
|
||||
gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
|
||||
d9 {
|
||||
label = "d6";
|
||||
gpios = <&pioB 5 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "nand-disk";
|
||||
};
|
||||
|
||||
d10 {
|
||||
label = "d7";
|
||||
gpios = <&pioB 6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
enter {
|
||||
label = "Enter";
|
||||
gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <28>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "atmel,asoc-wm8904";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;
|
||||
|
||||
atmel,model = "wm8904 @ AT91SAM9N12";
|
||||
atmel,audio-routing =
|
||||
"Headphone Jack", "HPOUTL",
|
||||
"Headphone Jack", "HPOUTR",
|
||||
"IN2L", "Line In Jack",
|
||||
"IN2R", "Line In Jack",
|
||||
"Mic", "MICBIAS",
|
||||
"IN1L", "Mic";
|
||||
|
||||
atmel,ssc-controller = <&ssc0>;
|
||||
atmel,audio-codec = <&wm8904>;
|
||||
};
|
||||
};
|
31
sys/gnu/dts/arm/at91sam9x25.dtsi
Normal file
31
sys/gnu/dts/arm/at91sam9x25.dtsi
Normal file
@ -0,0 +1,31 @@
|
||||
/*
|
||||
* at91sam9x25.dtsi - Device Tree Include file for AT91SAM9X25 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include "at91sam9x5.dtsi"
|
||||
#include "at91sam9x5_usart3.dtsi"
|
||||
#include "at91sam9x5_macb0.dtsi"
|
||||
#include "at91sam9x5_macb1.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X25 SoC";
|
||||
compatible = "atmel,at91sam9x25", "atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe03fff 0xc000001c /* pioA */
|
||||
0x0007ffff 0x00047e3f 0x00000000 /* pioB */
|
||||
0x80000000 0xfffd0000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
30
sys/gnu/dts/arm/at91sam9x25ek.dts
Normal file
30
sys/gnu/dts/arm/at91sam9x25ek.dts
Normal file
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9x25.dtsi"
|
||||
#include "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X25-EK";
|
||||
compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb1: ethernet@f8030000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
29
sys/gnu/dts/arm/at91sam9x35.dtsi
Normal file
29
sys/gnu/dts/arm/at91sam9x35.dtsi
Normal file
@ -0,0 +1,29 @@
|
||||
/*
|
||||
* at91sam9x35.dtsi - Device Tree Include file for AT91SAM9X35 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include "at91sam9x5.dtsi"
|
||||
#include "at91sam9x5_macb0.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X35 SoC";
|
||||
compatible = "atmel,at91sam9x35", "atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe03fff 0xc000000c /* pioA */
|
||||
0x000406ff 0x00047e3f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x00000000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
25
sys/gnu/dts/arm/at91sam9x35ek.dts
Normal file
25
sys/gnu/dts/arm/at91sam9x35ek.dts
Normal file
@ -0,0 +1,25 @@
|
||||
/*
|
||||
* at91sam9x35ek.dts - Device Tree file for AT91SAM9X35-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9x35.dtsi"
|
||||
#include "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X35-EK";
|
||||
compatible = "atmel,at91sam9x35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
861
sys/gnu/dts/arm/at91sam9x5.dtsi
Normal file
861
sys/gnu/dts/arm/at91sam9x5.dtsi
Normal file
@ -0,0 +1,861 @@
|
||||
/*
|
||||
* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
|
||||
* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
|
||||
* AT91SAM9X25, AT91SAM9X35 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/dma/at91.h>
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9x5 family SoC";
|
||||
compatible = "atmel,at91sam9x5";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
gpio0 = &pioA;
|
||||
gpio1 = &pioB;
|
||||
gpio2 = &pioC;
|
||||
gpio3 = &pioD;
|
||||
tcb0 = &tcb0;
|
||||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
ssc0 = &ssc0;
|
||||
pwm0 = &pwm0;
|
||||
};
|
||||
cpus {
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu {
|
||||
compatible = "arm,arm926ej-s";
|
||||
device_type = "cpu";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x10000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <3>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
reg = <0xfffff000 0x200>;
|
||||
atmel,external-irqs = <31>;
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffe800 {
|
||||
compatible = "atmel,at91sam9g45-ddramc";
|
||||
reg = <0xffffe800 0x200>;
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
};
|
||||
|
||||
rstc@fffffe00 {
|
||||
compatible = "atmel,at91sam9g45-rstc";
|
||||
reg = <0xfffffe00 0x10>;
|
||||
};
|
||||
|
||||
shdwc@fffffe10 {
|
||||
compatible = "atmel,at91sam9x5-shdwc";
|
||||
reg = <0xfffffe10 0x10>;
|
||||
};
|
||||
|
||||
pit: timer@fffffe30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffe30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
};
|
||||
|
||||
tcb0: timer@f8008000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf8008000 0x100>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
tcb1: timer@f800c000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf800c000 0x100>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
};
|
||||
|
||||
dma0: dma-controller@ffffec00 {
|
||||
compatible = "atmel,at91sam9g45-dma";
|
||||
reg = <0xffffec00 0x200>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#dma-cells = <2>;
|
||||
};
|
||||
|
||||
dma1: dma-controller@ffffee00 {
|
||||
compatible = "atmel,at91sam9g45-dma";
|
||||
reg = <0xffffee00 0x200>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#dma-cells = <2>;
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x800>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
|
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_sck: usart0_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
|
||||
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
|
||||
};
|
||||
|
||||
pinctrl_usart1_sck: usart1_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
|
||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_sck: usart2_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
|
||||
AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
|
||||
AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
|
||||
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
|
||||
AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
|
||||
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
|
||||
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
|
||||
AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
|
||||
AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
|
||||
AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
|
||||
AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
|
||||
AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
|
||||
AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
|
||||
AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
|
||||
AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
|
||||
AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
|
||||
};
|
||||
|
||||
pinctrl_nand_16bits: nand_16bits-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
|
||||
AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
|
||||
AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
|
||||
AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
|
||||
AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
|
||||
AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
|
||||
AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
|
||||
AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
|
||||
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
|
||||
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
|
||||
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
|
||||
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
|
||||
AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
|
||||
AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
|
||||
};
|
||||
|
||||
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
|
||||
AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
|
||||
AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
|
||||
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
|
||||
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
|
||||
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
|
||||
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
|
||||
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
|
||||
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
|
||||
AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
|
||||
AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
i2c0 {
|
||||
pinctrl_i2c0: i2c0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
|
||||
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
|
||||
};
|
||||
};
|
||||
|
||||
i2c1 {
|
||||
pinctrl_i2c1: i2c1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
|
||||
AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
|
||||
};
|
||||
};
|
||||
|
||||
i2c2 {
|
||||
pinctrl_i2c2: i2c2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
|
||||
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
|
||||
};
|
||||
};
|
||||
|
||||
i2c_gpio0 {
|
||||
pinctrl_i2c_gpio0: i2c_gpio0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
|
||||
AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
|
||||
};
|
||||
};
|
||||
|
||||
i2c_gpio1 {
|
||||
pinctrl_i2c_gpio1: i2c_gpio1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
|
||||
AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
|
||||
};
|
||||
};
|
||||
|
||||
i2c_gpio2 {
|
||||
pinctrl_i2c_gpio2: i2c_gpio2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
|
||||
AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb1 {
|
||||
pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-lines = <19>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-lines = <22>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
|
||||
<&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf0008000 0x600>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@f000c000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf000c000 0x600>;
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf801c000 0x200>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@f8020000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8020000 0x200>;
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@f8024000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8024000 0x200>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@f8010000 {
|
||||
compatible = "atmel,at91sam9x5-i2c";
|
||||
reg = <0xf8010000 0x100>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
|
||||
<&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@f8014000 {
|
||||
compatible = "atmel,at91sam9x5-i2c";
|
||||
reg = <0xf8014000 0x100>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
|
||||
<&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@f8018000 {
|
||||
compatible = "atmel,at91sam9x5-i2c";
|
||||
reg = <0xf8018000 0x100>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
|
||||
<&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@f8040000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8040000 0x200>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@f8044000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8044000 0x200>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc0: adc@f804c000 {
|
||||
compatible = "atmel,at91sam9260-adc";
|
||||
reg = <0xf804c000 0x100>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
atmel,adc-use-external;
|
||||
atmel,adc-channels-used = <0xffff>;
|
||||
atmel,adc-vref = <3300>;
|
||||
atmel,adc-num-channels = <12>;
|
||||
atmel,adc-startup-time = <40>;
|
||||
atmel,adc-channel-base = <0x50>;
|
||||
atmel,adc-drdy-mask = <0x1000000>;
|
||||
atmel,adc-status-register = <0x30>;
|
||||
atmel,adc-trigger-register = <0xc0>;
|
||||
atmel,adc-res = <8 10>;
|
||||
atmel,adc-res-names = "lowres", "highres";
|
||||
atmel,adc-use-res = "highres";
|
||||
|
||||
trigger@0 {
|
||||
trigger-name = "external-rising";
|
||||
trigger-value = <0x1>;
|
||||
trigger-external;
|
||||
};
|
||||
|
||||
trigger@1 {
|
||||
trigger-name = "external-falling";
|
||||
trigger-value = <0x2>;
|
||||
trigger-external;
|
||||
};
|
||||
|
||||
trigger@2 {
|
||||
trigger-name = "external-any";
|
||||
trigger-value = <0x3>;
|
||||
trigger-external;
|
||||
};
|
||||
|
||||
trigger@3 {
|
||||
trigger-name = "continuous";
|
||||
trigger-value = <0x6>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xf0000000 0x100>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
|
||||
<&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@f0004000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xf0004000 0x100>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
|
||||
<&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb2: gadget@f803c000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91sam9rl-udc";
|
||||
reg = <0x00500000 0x80000
|
||||
0xf803c000 0x400>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
status = "disabled";
|
||||
|
||||
ep0 {
|
||||
reg = <0>;
|
||||
atmel,fifo-size = <64>;
|
||||
atmel,nb-banks = <1>;
|
||||
};
|
||||
|
||||
ep1 {
|
||||
reg = <1>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <2>;
|
||||
atmel,can-dma;
|
||||
atmel,can-isoc;
|
||||
};
|
||||
|
||||
ep2 {
|
||||
reg = <2>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <2>;
|
||||
atmel,can-dma;
|
||||
atmel,can-isoc;
|
||||
};
|
||||
|
||||
ep3 {
|
||||
reg = <3>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <3>;
|
||||
atmel,can-dma;
|
||||
};
|
||||
|
||||
ep4 {
|
||||
reg = <4>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <3>;
|
||||
atmel,can-dma;
|
||||
};
|
||||
|
||||
ep5 {
|
||||
reg = <5>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <3>;
|
||||
atmel,can-dma;
|
||||
atmel,can-isoc;
|
||||
};
|
||||
|
||||
ep6 {
|
||||
reg = <6>;
|
||||
atmel,fifo-size = <1024>;
|
||||
atmel,nb-banks = <3>;
|
||||
atmel,can-dma;
|
||||
atmel,can-isoc;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffe40 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
reg = <0xfffffe40 0x10>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc@fffffeb0 {
|
||||
compatible = "atmel,at91sam9x5-rtc";
|
||||
reg = <0xfffffeb0 0x40>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm0: pwm@f8034000 {
|
||||
compatible = "atmel,at91sam9rl-pwm";
|
||||
reg = <0xf8034000 0x300>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000
|
||||
0xffffe000 0x600 /* PMECC Registers */
|
||||
0xffffe600 0x200 /* PMECC Error Location Registers */
|
||||
0x00108000 0x18000 /* PMECC looup table in ROM code */
|
||||
>;
|
||||
atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioD 5 GPIO_ACTIVE_HIGH
|
||||
&pioD 4 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00600000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: ehci@00700000 {
|
||||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00700000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
|
||||
&pioA 31 GPIO_ACTIVE_HIGH /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_gpio0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
|
||||
&pioC 1 GPIO_ACTIVE_HIGH /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_gpio1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@2 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
|
||||
&pioB 5 GPIO_ACTIVE_HIGH /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_gpio2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
56
sys/gnu/dts/arm/at91sam9x5_macb0.dtsi
Normal file
56
sys/gnu/dts/arm/at91sam9x5_macb0.dtsi
Normal file
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
|
||||
* Ethernet interface.
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
macb0 {
|
||||
pinctrl_macb0_rmii: macb0_rmii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
|
||||
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
|
||||
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
|
||||
AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
|
||||
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
|
||||
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
|
||||
AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
|
||||
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
|
||||
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
|
||||
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
|
||||
};
|
||||
|
||||
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
|
||||
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
|
||||
AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
|
||||
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
|
||||
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
|
||||
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
|
||||
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
|
||||
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
macb0: ethernet@f802c000 {
|
||||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xf802c000 0x100>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
44
sys/gnu/dts/arm/at91sam9x5_macb1.dtsi
Normal file
44
sys/gnu/dts/arm/at91sam9x5_macb1.dtsi
Normal file
@ -0,0 +1,44 @@
|
||||
/*
|
||||
* at91sam9x5_macb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 2
|
||||
* Ethernet interfaces.
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
macb1 {
|
||||
pinctrl_macb1_rmii: macb1_rmii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
|
||||
AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
|
||||
AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
|
||||
AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
|
||||
AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
|
||||
AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
|
||||
AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
|
||||
AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
|
||||
AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
|
||||
AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
macb1: ethernet@f8030000 {
|
||||
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
||||
reg = <0xf8030000 0x100>;
|
||||
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb1_rmii>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
55
sys/gnu/dts/arm/at91sam9x5_usart3.dtsi
Normal file
55
sys/gnu/dts/arm/at91sam9x5_usart3.dtsi
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
|
||||
* 4 USART.
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
serial4 = &usart3;
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
|
||||
AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_sck: usart3_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usart3: serial@f8028000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf8028000 0x200>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
97
sys/gnu/dts/arm/at91sam9x5cm.dtsi
Normal file
97
sys/gnu/dts/arm/at91sam9x5cm.dtsi
Normal file
@ -0,0 +1,97 @@
|
||||
/*
|
||||
* at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/ {
|
||||
memory {
|
||||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
1wire_cm {
|
||||
pinctrl_1wire_cm: 1wire_cm-0 {
|
||||
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
atmel,has-pmecc; /* Enable PMECC */
|
||||
atmel,pmecc-cap = <2>;
|
||||
atmel,pmecc-sector-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
uboot@40000 {
|
||||
label = "u-boot";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
ubootenv@c0000 {
|
||||
label = "U-Boot Env";
|
||||
reg = <0xc0000 0x140000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x1f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
pb18 {
|
||||
label = "pb18";
|
||||
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
pd21 {
|
||||
label = "pd21";
|
||||
gpios = <&pioD 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
1wire_cm {
|
||||
compatible = "w1-gpio";
|
||||
gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
|
||||
linux,open-drain;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_1wire_cm>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
};
|
132
sys/gnu/dts/arm/at91sam9x5ek.dtsi
Normal file
132
sys/gnu/dts/arm/at91sam9x5ek.dtsi
Normal file
@ -0,0 +1,132 @@
|
||||
/*
|
||||
* at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
#include "at91sam9x5cm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X5-EK";
|
||||
compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
mmc0: mmc@f0008000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1: mmc@f000c000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc1
|
||||
&pinctrl_mmc1_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc1_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb2: gadget@f803c000 {
|
||||
atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c0: i2c@f8010000 {
|
||||
status = "okay";
|
||||
|
||||
wm8731: wm8731@1a {
|
||||
compatible = "wm8731";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
|
||||
mmc1 {
|
||||
pinctrl_board_mmc1: mmc1-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0000000 {
|
||||
status = "okay";
|
||||
cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
|
||||
m25p80@0 {
|
||||
compatible = "atmel,at25df321a";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffe40 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
status = "okay";
|
||||
num-ports = <3>;
|
||||
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
|
||||
&pioD 19 GPIO_ACTIVE_LOW
|
||||
&pioD 20 GPIO_ACTIVE_LOW
|
||||
>;
|
||||
};
|
||||
|
||||
usb1: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "atmel,sam9x5-wm8731-audio";
|
||||
|
||||
atmel,model = "wm8731 @ AT91SAM9X5EK";
|
||||
|
||||
atmel,audio-routing =
|
||||
"Headphone Jack", "RHPOUT",
|
||||
"Headphone Jack", "LHPOUT",
|
||||
"LLINEIN", "Line In Jack",
|
||||
"RLINEIN", "Line In Jack";
|
||||
|
||||
atmel,ssc-controller = <&ssc0>;
|
||||
atmel,audio-codec = <&wm8731>;
|
||||
};
|
||||
};
|
84
sys/gnu/dts/arm/ethernut5.dts
Normal file
84
sys/gnu/dts/arm/ethernut5.dts
Normal file
@ -0,0 +1,84 @@
|
||||
/*
|
||||
* ethernut5.dts - Device Tree file for Ethernut 5 board
|
||||
*
|
||||
* Copyright (C) 2012 egnite GmbH <info@egnite.de>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9260.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Ethernut 5";
|
||||
compatible = "egnite,ethernut5", "atmel,at91sam9260", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x08000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb1: gadget@fffa4000 {
|
||||
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
gpios = <0
|
||||
&pioC 14 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
|
||||
root@0 {
|
||||
label = "root";
|
||||
reg = <0x0 0x08000000>;
|
||||
};
|
||||
|
||||
data@20000 {
|
||||
label = "data";
|
||||
reg = <0x08000000 0x38000000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
status = "okay";
|
||||
|
||||
pcf8563@50 {
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
};
|
53
sys/gnu/dts/arm/evk-pro3.dts
Normal file
53
sys/gnu/dts/arm/evk-pro3.dts
Normal file
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* evk-pro3.dts - Device Tree file for Telit EVK-PRO3 with Telit GE863-PRO3
|
||||
*
|
||||
* Copyright (C) 2012 Telit,
|
||||
* 2012 Fabio Porcedda <fabio.porcedda@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "ge863-pro3.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Telit EVK-PRO3 for Telit GE863-PRO3";
|
||||
compatible = "telit,evk-pro3", "atmel,at91sam9260", "atmel,at91sam9";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart2: serial@fffb8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb1: gadget@fffa4000 {
|
||||
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
num-ports = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
};
|
52
sys/gnu/dts/arm/ge863-pro3.dtsi
Normal file
52
sys/gnu/dts/arm/ge863-pro3.dtsi
Normal file
@ -0,0 +1,52 @@
|
||||
/*
|
||||
* ge863_pro3.dtsi - Device Tree file for Telit GE863-PRO3
|
||||
*
|
||||
* Copyright (C) 2012 Telit,
|
||||
* 2012 Fabio Porcedda <fabio.porcedda@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "at91sam9260.dtsi"
|
||||
|
||||
/ {
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <6000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
boot@0 {
|
||||
label = "boot";
|
||||
reg = <0x0 0x7c0000>;
|
||||
};
|
||||
|
||||
root@07c0000 {
|
||||
label = "root";
|
||||
reg = <0x7c0000 0x7840000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 root=ubi0:rootfs ubi.mtd=1 rootfstype=ubifs";
|
||||
};
|
||||
};
|
146
sys/gnu/dts/arm/kizbox.dts
Normal file
146
sys/gnu/dts/arm/kizbox.dts
Normal file
@ -0,0 +1,146 @@
|
||||
/*
|
||||
* kizbox.dts - Device Tree file for Overkiz Kizbox board
|
||||
*
|
||||
* Copyright (C) 2012 Boris BREZILLON <linux-arm@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g20.dtsi"
|
||||
|
||||
/ {
|
||||
|
||||
model = "Overkiz kizbox";
|
||||
compatible = "overkiz,kizbox", "atmel,at91sam9g20", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "panic=5 ubi.mtd=1 rootfstype=ubifs root=ubi0:root";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x2000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "mii";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii
|
||||
&pinctrl_macb_rmii_mii_alt>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
timeout-sec = <15>;
|
||||
atmel,max-heartbeat-sec = <16>;
|
||||
atmel,min-heartbeat-sec = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
status = "okay";
|
||||
|
||||
bootloaderkernel@0 {
|
||||
label = "bootloader-kernel";
|
||||
reg = <0x0 0xc0000>;
|
||||
};
|
||||
|
||||
ubi@c0000 {
|
||||
label = "ubi";
|
||||
reg = <0xc0000 0x7f40000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
usb0: ohci@00500000 {
|
||||
num-ports = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
status = "okay";
|
||||
|
||||
pcf8563@51 {
|
||||
/* nxp pcf8563 rtc */
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led1g {
|
||||
label = "led1:green";
|
||||
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
|
||||
led1r {
|
||||
label = "led1:red";
|
||||
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
|
||||
led2g {
|
||||
label = "led2:green";
|
||||
gpios = <&pioB 2 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "none";
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
led2r {
|
||||
label = "led2:red";
|
||||
gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
gpios = <&pioB 30 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x100>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
mode {
|
||||
label = "mode";
|
||||
gpios = <&pioB 31 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x101>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
};
|
69
sys/gnu/dts/arm/mpa1600.dts
Normal file
69
sys/gnu/dts/arm/mpa1600.dts
Normal file
@ -0,0 +1,69 @@
|
||||
/*
|
||||
* mpa1600.dts - Device Tree file for Phontech MPA 1600
|
||||
*
|
||||
* Copyright (C) 2013 Joachim Eastwood <manabian@gmail.com>
|
||||
*
|
||||
* Licensed under GPLv2 only
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91rm9200.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Phontech MPA 1600";
|
||||
compatible = "phontech,mpa1600", "atmel,at91rm9200";
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ssc0: ssc@fffd0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ssc1: ssc@fffd4000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00300000 {
|
||||
num-ports = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
monitor_mute {
|
||||
label = "Monitor mute";
|
||||
gpios = <&pioC 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <113>;
|
||||
};
|
||||
};
|
||||
};
|
165
sys/gnu/dts/arm/pm9g45.dts
Normal file
165
sys/gnu/dts/arm/pm9g45.dts
Normal file
@ -0,0 +1,165 @@
|
||||
/*
|
||||
* pm9g45.dts - Device Tree file for Ronetix pm9g45 board
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9g45.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Ronetix pm9g45";
|
||||
compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@ffffee00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
|
||||
board {
|
||||
pinctrl_board_nand: nand0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/
|
||||
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
|
||||
};
|
||||
};
|
||||
|
||||
mmc {
|
||||
pinctrl_board_mmc: mmc0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mmc0: mmc@fff80000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc
|
||||
&pinctrl_mmc0_slot0_clk_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
macb0: ethernet@fffbc000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
pinctrl-0 = <&pinctrl_board_nand>;
|
||||
|
||||
gpios = <&pioD 3 GPIO_ACTIVE_HIGH
|
||||
&pioC 14 GPIO_ACTIVE_HIGH
|
||||
0
|
||||
>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
barebox@20000 {
|
||||
label = "barebox";
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
|
||||
bareboxenv@60000 {
|
||||
label = "bareboxenv";
|
||||
reg = <0x60000 0x1A0000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "bareboxenv2";
|
||||
reg = <0x200000 0x300000>;
|
||||
};
|
||||
|
||||
kernel@500000 {
|
||||
label = "root";
|
||||
reg = <0x500000 0x400000>;
|
||||
};
|
||||
|
||||
data@900000 {
|
||||
label = "data";
|
||||
reg = <0x900000 0x8340000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00700000 {
|
||||
status = "okay";
|
||||
num-ports = <2>;
|
||||
};
|
||||
|
||||
usb1: ehci@00800000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led0 {
|
||||
label = "led0";
|
||||
gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "nand-disk";
|
||||
};
|
||||
|
||||
led1 {
|
||||
label = "led1";
|
||||
gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
right {
|
||||
label = "SW4";
|
||||
gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <106>;
|
||||
};
|
||||
|
||||
up {
|
||||
label = "SW3";
|
||||
gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <103>;
|
||||
};
|
||||
};
|
||||
};
|
1276
sys/gnu/dts/arm/sama5d3.dtsi
Normal file
1276
sys/gnu/dts/arm/sama5d3.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
16
sys/gnu/dts/arm/sama5d31.dtsi
Normal file
16
sys/gnu/dts/arm/sama5d31.dtsi
Normal file
@ -0,0 +1,16 @@
|
||||
/*
|
||||
* sama5d31.dtsi - Device Tree Include file for SAMA5D31 SoC
|
||||
*
|
||||
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
#include "sama5d3.dtsi"
|
||||
#include "sama5d3_lcd.dtsi"
|
||||
#include "sama5d3_emac.dtsi"
|
||||
#include "sama5d3_mci2.dtsi"
|
||||
#include "sama5d3_uart.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "atmel,samad31", "atmel,sama5d3", "atmel,sama5";
|
||||
};
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
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Reference in New Issue
Block a user