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Stop doing runtime checking on i386 cpus for cpu class. The cpu is

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slow enough as it is, without having to constantly check that it really
is an i386 still.  It was possible to compile out the conditionals for
faster cpus by leaving out 'I386_CPU', but it was not possible to
unconditionally compile for the i386.  You got the runtime checking whether
you wanted it or not.  This makes I386_CPU mutually exclusive with the
other cpu types, and tidies things up a little in the process.

Reviewed by:  alfred, markm, phk, benno, jlemon, jhb, jake, grog, msmith,
              jasone, dcs, des (and a bunch more people who encouraged it)
This commit is contained in:
Peter Wemm 2001-01-16 09:10:34 +00:00
parent 32f6256a49
commit e44a0ea311
14 changed files with 99 additions and 164 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
sys/amd64/amd64/identcpu.c
View File

@ -624,15 +624,18 @@ void
panicifcpuunsupported(void)
{
#if !defined(I386_CPU) && !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU)
#error This kernel is not configured for one of the supported CPUs
#endif
#if defined(I386_CPU) && (defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU))
#error I386_CPU is mutually exclusive with the other cpu types.
#endif
/*
* Now that we have told the user what they have,
* let them know if that machine type isn't configured.
*/
switch (cpu_class) {
case CPUCLASS_286: /* a 286 should not make it this far, anyway */
#if !defined(I386_CPU) && !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU)
#error This kernel is not configured for one of the supported CPUs
#endif
#if !defined(I386_CPU)
case CPUCLASS_386:
#endif

5
sys/amd64/amd64/machdep.c
View File

@ -1118,10 +1118,9 @@ cpu_setregs(void)
cr0 = rcr0();
cr0 |= CR0_NE; /* Done by npxinit() */
cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
#ifdef I386_CPU
if (cpu_class != CPUCLASS_386)
#ifndef I386_CPU
cr0 |= CR0_WP | CR0_AM;
#endif
cr0 |= CR0_WP | CR0_AM;
load_cr0(cr0);
load_gs(_udatasel);
}

53
sys/amd64/amd64/pmap.c
View File

@ -567,14 +567,11 @@ pmap_track_modified(vm_offset_t va)
static PMAP_INLINE void
invltlb_1pg(vm_offset_t va)
{
#if defined(I386_CPU)
if (cpu_class == CPUCLASS_386) {
invltlb();
} else
#ifdef I386_CPU
invltlb();
#else
invlpg(va);
#endif
{
invlpg(va);
}
}
static __inline void
@ -832,7 +829,10 @@ void
pmap_new_proc(p)
struct proc *p;
{
int i, updateneeded;
#ifdef I386_CPU
int updateneeded;
#endif
int i;
vm_object_t upobj;
vm_page_t m;
struct user *up;
@ -857,7 +857,9 @@ pmap_new_proc(p)
ptek = (unsigned *) vtopte((vm_offset_t) up);
#ifdef I386_CPU
updateneeded = 0;
#endif
for(i=0;i<UPAGES;i++) {
/*
* Get a kernel stack page
@ -876,11 +878,11 @@ pmap_new_proc(p)
*/
*(ptek + i) = VM_PAGE_TO_PHYS(m) | PG_RW | PG_V | pgeflag;
if (oldpte) {
if ((oldpte & PG_G) || (cpu_class > CPUCLASS_386)) {
invlpg((vm_offset_t) up + i * PAGE_SIZE);
} else {
updateneeded = 1;
}
#ifdef I386_CPU
updateneeded = 1;
#else
invlpg((vm_offset_t) up + i * PAGE_SIZE);
#endif
}
vm_page_wakeup(m);
@ -888,8 +890,10 @@ pmap_new_proc(p)
vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE);
m->valid = VM_PAGE_BITS_ALL;
}
#ifdef I386_CPU
if (updateneeded)
invltlb();
#endif
}
/*
@ -917,14 +921,14 @@ pmap_dispose_proc(p)
oldpte = *(ptek + i);
*(ptek + i) = 0;
if ((oldpte & PG_G) || (cpu_class > CPUCLASS_386))
invlpg((vm_offset_t) p->p_addr + i * PAGE_SIZE);
#ifndef I386_CPU
invlpg((vm_offset_t) p->p_addr + i * PAGE_SIZE);
#endif
vm_page_unwire(m, 0);
vm_page_free(m);
}
#if defined(I386_CPU)
if (cpu_class <= CPUCLASS_386)
invltlb();
#ifdef I386_CPU
invltlb();
#endif
}
@ -2775,15 +2779,12 @@ pmap_copy_page(src, dst)
*(int *) CMAP1 = PG_V | (src & PG_FRAME) | PG_A;
*(int *) CMAP2 = PG_V | PG_RW | (dst & PG_FRAME) | PG_A | PG_M;
#if defined(I386_CPU)
if (cpu_class == CPUCLASS_386) {
invltlb();
} else
#ifdef I386_CPU
invltlb();
#else
invlpg((u_int)CADDR1);
invlpg((u_int)CADDR2);
#endif
{
invlpg((u_int)CADDR1);
invlpg((u_int)CADDR2);
}
bcopy(CADDR1, CADDR2, PAGE_SIZE);

35
sys/amd64/amd64/support.S
View File

@ -89,7 +89,7 @@ ENTRY(generic_bzero)
popl %edi
ret
#if defined(I486_CPU)
#ifdef I486_CPU
ENTRY(i486_bzero)
movl 4(%esp),%edx
movl 8(%esp),%ecx
@ -703,12 +703,8 @@ ENTRY(generic_copyout)
cmpl $VM_MAXUSER_ADDRESS,%eax
ja copyout_fault
#if defined(I386_CPU)
#ifdef I386_CPU
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 3f
#endif
/*
* We have to check each PTE for user write permission.
* The checking may cause a page fault, so it is important to set
@ -760,7 +756,6 @@ ENTRY(generic_copyout)
#endif /* I386_CPU */
/* bcopy(%esi, %edi, %ebx) */
3:
movl %ebx,%ecx
#if defined(I586_CPU) && NNPX > 0
@ -1207,12 +1202,7 @@ ENTRY(suword)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f /* we only have to set the right segment selector */
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
/* XXX - page boundary crossing is still not handled */
movl %edx,%eax
@ -1240,7 +1230,6 @@ ENTRY(suword)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */
ja fusufault
@ -1259,12 +1248,7 @@ ENTRY(susword)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
/* XXX - page boundary crossing is still not handled */
movl %edx,%eax
@ -1292,7 +1276,6 @@ ENTRY(susword)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-2,%edx /* verify address validity */
ja fusufault
@ -1312,12 +1295,7 @@ ENTRY(subyte)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
movl %edx,%eax
shrl $IDXSHIFT,%edx
@ -1344,7 +1322,6 @@ ENTRY(subyte)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-1,%edx /* verify address validity */
ja fusufault
@ -1586,7 +1563,7 @@ ENTRY(rcr3)
/* void load_cr3(caddr_t cr3) */
ENTRY(load_cr3)
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
incl _tlb_flush_count
#endif
movl 4(%esp),%eax

35
sys/amd64/amd64/support.s
View File

@ -89,7 +89,7 @@ ENTRY(generic_bzero)
popl %edi
ret
#if defined(I486_CPU)
#ifdef I486_CPU
ENTRY(i486_bzero)
movl 4(%esp),%edx
movl 8(%esp),%ecx
@ -703,12 +703,8 @@ ENTRY(generic_copyout)
cmpl $VM_MAXUSER_ADDRESS,%eax
ja copyout_fault
#if defined(I386_CPU)
#ifdef I386_CPU
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 3f
#endif
/*
* We have to check each PTE for user write permission.
* The checking may cause a page fault, so it is important to set
@ -760,7 +756,6 @@ ENTRY(generic_copyout)
#endif /* I386_CPU */
/* bcopy(%esi, %edi, %ebx) */
3:
movl %ebx,%ecx
#if defined(I586_CPU) && NNPX > 0
@ -1207,12 +1202,7 @@ ENTRY(suword)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f /* we only have to set the right segment selector */
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
/* XXX - page boundary crossing is still not handled */
movl %edx,%eax
@ -1240,7 +1230,6 @@ ENTRY(suword)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */
ja fusufault
@ -1259,12 +1248,7 @@ ENTRY(susword)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
/* XXX - page boundary crossing is still not handled */
movl %edx,%eax
@ -1292,7 +1276,6 @@ ENTRY(susword)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-2,%edx /* verify address validity */
ja fusufault
@ -1312,12 +1295,7 @@ ENTRY(subyte)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
movl %edx,%eax
shrl $IDXSHIFT,%edx
@ -1344,7 +1322,6 @@ ENTRY(subyte)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-1,%edx /* verify address validity */
ja fusufault
@ -1586,7 +1563,7 @@ ENTRY(rcr3)
/* void load_cr3(caddr_t cr3) */
ENTRY(load_cr3)
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
incl _tlb_flush_count
#endif
movl 4(%esp),%eax

6
sys/conf/NOTES
View File

@ -155,10 +155,10 @@ options WITNESS_SKIPSPIN
#
# You must specify at least one CPU (the one you intend to run on);
# deleting the specification for CPUs you don't need to use may make
# parts of the system run faster. This is especially true removing
# I386_CPU.
# parts of the system run faster.
# I386_CPU is mutually exclusive with the other CPU types.
#
cpu I386_CPU
#cpu I386_CPU
cpu I486_CPU
cpu I586_CPU # aka Pentium(tm)
cpu I686_CPU # aka Pentium Pro(tm)

6
sys/i386/conf/NOTES
View File

@ -155,10 +155,10 @@ options WITNESS_SKIPSPIN
#
# You must specify at least one CPU (the one you intend to run on);
# deleting the specification for CPUs you don't need to use may make
# parts of the system run faster. This is especially true removing
# I386_CPU.
# parts of the system run faster.
# I386_CPU is mutually exclusive with the other CPU types.
#
cpu I386_CPU
#cpu I386_CPU
cpu I486_CPU
cpu I586_CPU # aka Pentium(tm)
cpu I686_CPU # aka Pentium Pro(tm)

9
sys/i386/i386/identcpu.c
View File

@ -624,15 +624,18 @@ void
panicifcpuunsupported(void)
{
#if !defined(I386_CPU) && !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU)
#error This kernel is not configured for one of the supported CPUs
#endif
#if defined(I386_CPU) && (defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU))
#error I386_CPU is mutually exclusive with the other cpu types.
#endif
/*
* Now that we have told the user what they have,
* let them know if that machine type isn't configured.
*/
switch (cpu_class) {
case CPUCLASS_286: /* a 286 should not make it this far, anyway */
#if !defined(I386_CPU) && !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU)
#error This kernel is not configured for one of the supported CPUs
#endif
#if !defined(I386_CPU)
case CPUCLASS_386:
#endif

5
sys/i386/i386/machdep.c
View File

@ -1118,10 +1118,9 @@ cpu_setregs(void)
cr0 = rcr0();
cr0 |= CR0_NE; /* Done by npxinit() */
cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
#ifdef I386_CPU
if (cpu_class != CPUCLASS_386)
#ifndef I386_CPU
cr0 |= CR0_WP | CR0_AM;
#endif
cr0 |= CR0_WP | CR0_AM;
load_cr0(cr0);
load_gs(_udatasel);
}

53
sys/i386/i386/pmap.c
View File

@ -567,14 +567,11 @@ pmap_track_modified(vm_offset_t va)
static PMAP_INLINE void
invltlb_1pg(vm_offset_t va)
{
#if defined(I386_CPU)
if (cpu_class == CPUCLASS_386) {
invltlb();
} else
#ifdef I386_CPU
invltlb();
#else
invlpg(va);
#endif
{
invlpg(va);
}
}
static __inline void
@ -832,7 +829,10 @@ void
pmap_new_proc(p)
struct proc *p;
{
int i, updateneeded;
#ifdef I386_CPU
int updateneeded;
#endif
int i;
vm_object_t upobj;
vm_page_t m;
struct user *up;
@ -857,7 +857,9 @@ pmap_new_proc(p)
ptek = (unsigned *) vtopte((vm_offset_t) up);
#ifdef I386_CPU
updateneeded = 0;
#endif
for(i=0;i<UPAGES;i++) {
/*
* Get a kernel stack page
@ -876,11 +878,11 @@ pmap_new_proc(p)
*/
*(ptek + i) = VM_PAGE_TO_PHYS(m) | PG_RW | PG_V | pgeflag;
if (oldpte) {
if ((oldpte & PG_G) || (cpu_class > CPUCLASS_386)) {
invlpg((vm_offset_t) up + i * PAGE_SIZE);
} else {
updateneeded = 1;
}
#ifdef I386_CPU
updateneeded = 1;
#else
invlpg((vm_offset_t) up + i * PAGE_SIZE);
#endif
}
vm_page_wakeup(m);
@ -888,8 +890,10 @@ pmap_new_proc(p)
vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE);
m->valid = VM_PAGE_BITS_ALL;
}
#ifdef I386_CPU
if (updateneeded)
invltlb();
#endif
}
/*
@ -917,14 +921,14 @@ pmap_dispose_proc(p)
oldpte = *(ptek + i);
*(ptek + i) = 0;
if ((oldpte & PG_G) || (cpu_class > CPUCLASS_386))
invlpg((vm_offset_t) p->p_addr + i * PAGE_SIZE);
#ifndef I386_CPU
invlpg((vm_offset_t) p->p_addr + i * PAGE_SIZE);
#endif
vm_page_unwire(m, 0);
vm_page_free(m);
}
#if defined(I386_CPU)
if (cpu_class <= CPUCLASS_386)
invltlb();
#ifdef I386_CPU
invltlb();
#endif
}
@ -2775,15 +2779,12 @@ pmap_copy_page(src, dst)
*(int *) CMAP1 = PG_V | (src & PG_FRAME) | PG_A;
*(int *) CMAP2 = PG_V | PG_RW | (dst & PG_FRAME) | PG_A | PG_M;
#if defined(I386_CPU)
if (cpu_class == CPUCLASS_386) {
invltlb();
} else
#ifdef I386_CPU
invltlb();
#else
invlpg((u_int)CADDR1);
invlpg((u_int)CADDR2);
#endif
{
invlpg((u_int)CADDR1);
invlpg((u_int)CADDR2);
}
bcopy(CADDR1, CADDR2, PAGE_SIZE);

35
sys/i386/i386/support.s
View File

@ -89,7 +89,7 @@ ENTRY(generic_bzero)
popl %edi
ret
#if defined(I486_CPU)
#ifdef I486_CPU
ENTRY(i486_bzero)
movl 4(%esp),%edx
movl 8(%esp),%ecx
@ -703,12 +703,8 @@ ENTRY(generic_copyout)
cmpl $VM_MAXUSER_ADDRESS,%eax
ja copyout_fault
#if defined(I386_CPU)
#ifdef I386_CPU
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 3f
#endif
/*
* We have to check each PTE for user write permission.
* The checking may cause a page fault, so it is important to set
@ -760,7 +756,6 @@ ENTRY(generic_copyout)
#endif /* I386_CPU */
/* bcopy(%esi, %edi, %ebx) */
3:
movl %ebx,%ecx
#if defined(I586_CPU) && NNPX > 0
@ -1207,12 +1202,7 @@ ENTRY(suword)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f /* we only have to set the right segment selector */
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
/* XXX - page boundary crossing is still not handled */
movl %edx,%eax
@ -1240,7 +1230,6 @@ ENTRY(suword)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */
ja fusufault
@ -1259,12 +1248,7 @@ ENTRY(susword)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
/* XXX - page boundary crossing is still not handled */
movl %edx,%eax
@ -1292,7 +1276,6 @@ ENTRY(susword)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-2,%edx /* verify address validity */
ja fusufault
@ -1312,12 +1295,7 @@ ENTRY(subyte)
movl $fusufault,PCB_ONFAULT(%ecx)
movl 4(%esp),%edx
#if defined(I386_CPU)
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
cmpl $CPUCLASS_386,_cpu_class
jne 2f
#endif /* I486_CPU || I586_CPU || I686_CPU */
#ifdef I386_CPU
movl %edx,%eax
shrl $IDXSHIFT,%edx
@ -1344,7 +1322,6 @@ ENTRY(subyte)
movl 4(%esp),%edx
#endif
2:
cmpl $VM_MAXUSER_ADDRESS-1,%edx /* verify address validity */
ja fusufault
@ -1586,7 +1563,7 @@ ENTRY(rcr3)
/* void load_cr3(caddr_t cr3) */
ENTRY(load_cr3)
#if defined(SWTCH_OPTIM_STATS)
#ifdef SWTCH_OPTIM_STATS
incl _tlb_flush_count
#endif
movl 4(%esp),%eax

2
sys/pc98/conf/GENERIC
View File

@ -18,7 +18,7 @@
# $FreeBSD$
machine pc98
cpu I386_CPU
#cpu I386_CPU #Do not enable with other cpu types
cpu I486_CPU
cpu I586_CPU
cpu I686_CPU

5
sys/pc98/i386/machdep.c
View File

@ -1132,10 +1132,9 @@ cpu_setregs(void)
cr0 = rcr0();
cr0 |= CR0_NE; /* Done by npxinit() */
cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
#ifdef I386_CPU
if (cpu_class != CPUCLASS_386)
#ifndef I386_CPU
cr0 |= CR0_WP | CR0_AM;
#endif
cr0 |= CR0_WP | CR0_AM;
load_cr0(cr0);
load_gs(_udatasel);
}

5
sys/pc98/pc98/machdep.c
View File

@ -1132,10 +1132,9 @@ cpu_setregs(void)
cr0 = rcr0();
cr0 |= CR0_NE; /* Done by npxinit() */
cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
#ifdef I386_CPU
if (cpu_class != CPUCLASS_386)
#ifndef I386_CPU
cr0 |= CR0_WP | CR0_AM;
#endif
cr0 |= CR0_WP | CR0_AM;
load_cr0(cr0);
load_gs(_udatasel);
}