[ath_hal] add extra MCI definitions used by the later chips (QCA9565/Aphrodite).
Obtained from: Linux ath9k
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@ -488,6 +488,17 @@ typedef enum mci_state_type {
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#define ATH_MCI_CONFIG_CLK_DIV 0x00003000
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#define ATH_MCI_CONFIG_CLK_DIV_S 12
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#define ATH_MCI_CONFIG_DISABLE_TUNING 0x00004000
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#define ATH_MCI_CONFIG_DISABLE_AIC 0x00008000
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#define ATH_MCI_CONFIG_AIC_CAL_NUM_CHAN 0x007f0000
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#define ATH_MCI_CONFIG_AIC_CAL_NUM_CHAN_S 16
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#define ATH_MCI_CONFIG_NO_QUIET_ACK 0x00800000
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#define ATH_MCI_CONFIG_NO_QUIET_ACK_S 23
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#define ATH_MCI_CONFIG_ANT_ARCH 0x07000000
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#define ATH_MCI_CONFIG_ANT_ARCH_S 24
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#define ATH_MCI_CONFIG_FORCE_QUIET_ACK 0x08000000
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#define ATH_MCI_CONFIG_FORCE_QUIET_ACK_S 27
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#define ATH_MCI_CONFIG_FORCE_2CHAIN_ACK 0x10000000
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#define ATH_MCI_CONFIG_MCI_STAT_DBG 0x20000000
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#define ATH_MCI_CONFIG_MCI_WEIGHT_DBG 0x40000000
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#define ATH_MCI_CONFIG_DISABLE_MCI 0x80000000
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@ -496,6 +507,16 @@ typedef enum mci_state_type {
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ATH_MCI_CONFIG_MCI_OBS_BT )
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#define ATH_MCI_CONFIG_MCI_OBS_GPIO 0x0000002F
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#define ATH_MCI_ANT_ARCH_1_ANT_PA_LNA_NON_SHARED 0x00
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#define ATH_MCI_ANT_ARCH_1_ANT_PA_LNA_SHARED 0x01
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#define ATH_MCI_ANT_ARCH_2_ANT_PA_LNA_NON_SHARED 0x02
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#define ATH_MCI_ANT_ARCH_2_ANT_PA_LNA_SHARED 0x03
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#define ATH_MCI_ANT_ARCH_3_ANT 0x04
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#define MCI_ANT_ARCH_PA_LNA_SHARED(c) \
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((MS(c, ATH_MCI_CONFIG_ANT_ARCH) == ATH_MCI_ANT_ARCH_1_ANT_PA_LNA_SHARED) || \
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(MS(c, ATH_MCI_CONFIG_ANT_ARCH) == ATH_MCI_ANT_ARCH_2_ANT_PA_LNA_SHARED))
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#define ATH_MCI_CONCUR_TX_SHARED_CHN 0x01
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#define ATH_MCI_CONCUR_TX_UNSHARED_CHN 0x02
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#define ATH_MCI_CONCUR_TX_DEBUG 0x03
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