Implement get and set nic state as global functions in mlx5core.
MFC after: 3 days Sponsored by: Mellanox Technologies
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@ -108,4 +108,15 @@ extern struct pci_driver mlx5_core_driver;
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SYSCTL_DECL(_hw_mlx5);
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enum {
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MLX5_NIC_IFC_FULL = 0,
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MLX5_NIC_IFC_DISABLED = 1,
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MLX5_NIC_IFC_NO_DRAM_NIC = 2,
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MLX5_NIC_IFC_INVALID = 3,
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MLX5_NIC_IFC_SW_RESET = 7,
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};
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u8 mlx5_get_nic_state(struct mlx5_core_dev *dev);
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void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state);
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#endif /* __MLX5_CORE_H__ */
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@ -38,13 +38,6 @@
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#define MLX5_HEALTH_POLL_INTERVAL (2 * HZ)
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#define MAX_MISSES 3
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enum {
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MLX5_NIC_IFC_FULL = 0,
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MLX5_NIC_IFC_DISABLED = 1,
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MLX5_NIC_IFC_NO_DRAM_NIC = 2,
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MLX5_NIC_IFC_SW_RESET = 7,
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};
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enum {
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MLX5_DROP_NEW_HEALTH_WORK,
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MLX5_DROP_NEW_RECOVERY_WORK,
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@ -114,11 +107,21 @@ static int unlock_sem_sw_reset(struct mlx5_core_dev *dev)
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return ret;
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}
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static u8 get_nic_mode(struct mlx5_core_dev *dev)
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u8 mlx5_get_nic_state(struct mlx5_core_dev *dev)
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{
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return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 7;
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}
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void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state)
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{
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u32 cur_cmdq_addr_l_sz;
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cur_cmdq_addr_l_sz = ioread32be(&dev->iseg->cmdq_addr_l_sz);
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iowrite32be((cur_cmdq_addr_l_sz & 0xFFFFF000) |
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state << MLX5_NIC_IFC_OFFSET,
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&dev->iseg->cmdq_addr_l_sz);
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}
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static bool sensor_fw_synd_rfr(struct mlx5_core_dev *dev)
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{
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struct mlx5_core_health *health = &dev->priv.health;
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@ -165,12 +168,12 @@ static bool sensor_pci_no_comm(struct mlx5_core_dev *dev)
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static bool sensor_nic_disabled(struct mlx5_core_dev *dev)
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{
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return get_nic_mode(dev) == MLX5_NIC_IFC_DISABLED;
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return mlx5_get_nic_state(dev) == MLX5_NIC_IFC_DISABLED;
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}
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static bool sensor_nic_sw_reset(struct mlx5_core_dev *dev)
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{
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return get_nic_mode(dev) == MLX5_NIC_IFC_SW_RESET;
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return mlx5_get_nic_state(dev) == MLX5_NIC_IFC_SW_RESET;
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}
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static u32 check_fatal_sensors(struct mlx5_core_dev *dev)
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@ -300,7 +303,7 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force)
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if (!sensor_nic_disabled(dev)) {
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dev_err(&dev->pdev->dev, "NIC IFC still %d after %ums.\n",
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get_nic_mode(dev), delay_ms);
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mlx5_get_nic_state(dev), delay_ms);
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}
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/* Release FW semaphore if you are the lock owner */
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@ -316,7 +319,7 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force)
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static void mlx5_handle_bad_state(struct mlx5_core_dev *dev)
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{
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u8 nic_mode = get_nic_mode(dev);
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u8 nic_mode = mlx5_get_nic_state(dev);
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if (nic_mode == MLX5_NIC_IFC_SW_RESET) {
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/* The IFC mode field is 3 bits, so it will read 0x7 in two cases:
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@ -362,11 +365,11 @@ static void health_recover(struct work_struct *work)
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recover = false;
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}
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nic_mode = get_nic_mode(dev);
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nic_mode = mlx5_get_nic_state(dev);
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while (nic_mode != MLX5_NIC_IFC_DISABLED &&
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!time_after(jiffies, end)) {
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msleep(MLX5_NIC_STATE_POLL_MS);
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nic_mode = get_nic_mode(dev);
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nic_mode = mlx5_get_nic_state(dev);
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}
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if (nic_mode != MLX5_NIC_IFC_DISABLED) {
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