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This is the first commit of the Intel gigabit driver for

Browse Source 
PRO/1000 cards.

Submitted by:Prafulla Deuskar
Reviewed by: Paul Saab
MFC after:1 week
This commit is contained in:
pdeuskar 2001-12-02 07:37:17 +00:00
parent e033cad08e
commit e526872768
10 changed files with 7590 additions and 0 deletions
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3
sys/conf/files.i386
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@ -401,3 +401,6 @@ netsmb/smb_smb.c optional netsmb
netsmb/smb_subr.c optional netsmb
netsmb/smb_trantcp.c optional netsmb
netsmb/smb_usr.c optional netsmb
dev/em/if_em.c optional em
dev/em/if_em_fxhw.c optional em
dev/em/if_em_phy.c optional em

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/**************************************************************************
**************************************************************************
Copyright (c) 2001 Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms of the Software, with or
without modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code of the Software may retain the above
copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form of the Software may reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
3. Neither the name of the Intel Corporation nor the names of its
contributors shall be used to endorse or promote products derived from
this Software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGE.
$FreeBSD$
***************************************************************************
***************************************************************************/
#ifndef _EM_H_DEFINED_
#define _EM_H_DEFINED_
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/mbuf.h>
#include <sys/protosw.h>
#include <sys/socket.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <net/if.h>
#include <net/if_dl.h>
#include <net/if_media.h>
#include <net/bpf.h>
#include <net/ethernet.h>
#include <net/if_arp.h>
#include <sys/sockio.h>
#include <netinet/in_systm.h>
#include <netinet/in.h>
#include <netinet/ip.h>
#include <netinet/tcp.h>
#include <netinet/udp.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <machine/clock.h>
#include <pci/pcivar.h>
#include <pci/pcireg.h>
#include <stddef.h>
#include "opt_bdg.h"
#include <dev/em/if_em_fxhw.h>
#include <dev/em/if_em_phy.h>
/* Tunables */
#define MAX_TXD 256
#define MAX_RXD 256
#define TX_CLEANUP_THRESHOLD MAX_TXD / 8
#define TIDV 128
#define RIDV 28
#define DO_AUTO_NEG 1
#define WAIT_FOR_AUTO_NEG_DEFAULT 1
#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
ADVERTISE_1000_FULL)
#define EM_ENABLE_RXCSUM_OFFLOAD 1
#define EM_REPORT_TX_EARLY 2
#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP)
#define EM_MAX_INTR 3
#define EM_TX_TIMEOUT 5 /* set to 5 seconds */
#define EM_JUMBO_ENABLE_DEFAULT 0
#define EM_VENDOR_ID 0x8086
#define EM_MMBA 0x0010 /* Mem base address */
#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
#define EM_JUMBO_PBA 0x00000028
#define EM_DEFAULT_PBA 0x00000030
#define IOCTL_CMD_TYPE u_long
#define ETH_LENGTH_OF_ADDRESS ETHER_ADDR_LEN
#define PCI_COMMAND_REGISTER PCIR_COMMAND
#define MAX_NUM_MULTICAST_ADDRESSES 128
#define PCI_ANY_ID (~0U)
#define ETHER_ALIGN 2
#define CMD_MEM_WRT_INVALIDATE 0x0010
/* Defines for printing debug information */
#define DEBUG_INIT 0
#define DEBUG_IOCTL 0
#define DEBUG_HW 0
#define DEBUG_TXRX 0
#define DEBUG_RXCSUM 0
#define DEBUG_TXCSUM 0
#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
#define TXRX_DEBUGOUT(S) if (DEBUG_TXRX) printf(S "\n")
#define TXRX_DEBUGOUT1(S, A) if (DEBUG_TXRX) printf(S "\n", A)
#define TXRX_DEBUGOUT2(S, A, B) if (DEBUG_TXRX) printf(S "\n", A, B)
#define RXCSUM_DEBUGOUT(S) if (DEBUG_RXCSUM) printf(S "\n")
#define RXCSUM_DEBUGOUT1(S, A) if (DEBUG_RXCSUM) printf(S "\n", A)
#define RXCSUM_DEBUGOUT2(S, A, B) if (DEBUG_RXCSUM) printf(S "\n", A, B)
#define TXCSUM_DEBUGOUT(S) if (DEBUG_TXCSUM) printf(S "\n")
#define TXCSUM_DEBUGOUT1(S, A) if (DEBUG_TXCSUM) printf(S "\n", A)
#define TXCSUM_DEBUGOUT2(S, A, B) if (DEBUG_TXCSUM) printf(S "\n", A, B)
/* Device ID defines */
#define PCI_DEVICE_ID_82542 0x1000
#define PCI_DEVICE_ID_82543GC_FIBER 0x1001
#define PCI_DEVICE_ID_82543GC_COPPER 0x1004
#define PCI_DEVICE_ID_82544EI_FIBER 0x1009
#define PCI_DEVICE_ID_82544EI_COPPER 0x1008
#define PCI_DEVICE_ID_82544GC_STRG 0x100C
#define PCI_DEVICE_ID_82544GC_COPPER 0x100D
/* Supported RX Buffer Sizes */
#define EM_RXBUFFER_2048 2048
#define EM_RXBUFFER_4096 4096
#define EM_RXBUFFER_8192 8192
#define EM_RXBUFFER_16384 16384
/* Jumbo Frame */
#define EM_JSLOTS 384
#define EM_JUMBO_FRAMELEN 9018
#define EM_JUMBO_MTU (EM_JUMBO_FRAMELEN - ETHER_HDR_LEN - ETHER_CRC_LEN)
#define EM_JRAWLEN (EM_JUMBO_FRAMELEN + ETHER_ALIGN + sizeof(u_int64_t))
#define EM_JLEN (EM_JRAWLEN + (sizeof(u_int64_t) - \
(EM_JRAWLEN % sizeof(u_int64_t))))
#define EM_JPAGESZ PAGE_SIZE
#define EM_RESID (EM_JPAGESZ - (EM_JLEN * EM_JSLOTS) % EM_JPAGESZ)
#define EM_JMEM ((EM_JLEN * EM_JSLOTS) + EM_RESID)
struct em_jslot {
caddr_t em_buf;
int em_inuse;
};
struct em_jpool_entry {
int slot;
SLIST_ENTRY(em_jpool_entry) em_jpool_entries;
};
/* ******************************************************************************
* vendor_info_array
*
* This array contains the list of Subvendor/Subdevice IDs on which the driver
* should load.
*
* ******************************************************************************/
typedef struct _em_vendor_info_t
{
unsigned int vendor_id;
unsigned int device_id;
unsigned int subvendor_id;
unsigned int subdevice_id;
unsigned int index;
} em_vendor_info_t;
struct em_tx_buffer {
STAILQ_ENTRY(em_tx_buffer) em_tx_entry;
struct mbuf *Packet;
u_int32_t NumTxDescriptorsUsed;
};
/* ******************************************************************************
* This structure stores information about the 2k aligned receive buffer
* into which the E1000 DMA's frames.
* ******************************************************************************/
struct em_rx_buffer {
STAILQ_ENTRY(em_rx_buffer) em_rx_entry;
struct mbuf *Packet;
u_int32_t LowPhysicalAddress;
u_int32_t HighPhysicalAddress;
};
typedef enum _XSUM_CONTEXT_T {
OFFLOAD_NONE,
OFFLOAD_TCP_IP,
OFFLOAD_UDP_IP
} XSUM_CONTEXT_T;
/* Our adapter structure */
struct adapter {
struct arpcom interface_data;
struct adapter *next;
struct adapter *prev;
/* FreeBSD operating-system-specific structures */
bus_space_tag_t bus_space_tag;
bus_space_handle_t bus_space_handle;
struct device *dev;
struct resource *res_memory;
struct resource *res_interrupt;
void *int_handler_tag;
struct ifmedia media;
struct callout_handle timer_handle;
u_int8_t unit;
/* PCI Info */
u_int16_t VendorId;
u_int16_t DeviceId;
u_int8_t RevId;
u_int16_t SubVendorId;
u_int16_t SubSystemId;
u_int16_t PciCommandWord;
/* PCI Bus Info */
E1000_BUS_TYPE_ENUM BusType;
E1000_BUS_SPEED_ENUM BusSpeed;
E1000_BUS_WIDTH_ENUM BusWidth;
/* Info about the board itself */
u_int8_t MacType;
u_int8_t MediaType;
u_int32_t PhyId;
u_int32_t PhyAddress;
uint8_t CurrentNetAddress[ETH_LENGTH_OF_ADDRESS];
uint8_t PermNetAddress[ETH_LENGTH_OF_ADDRESS];
u_int32_t PartNumber;
u_int8_t AdapterStopped;
u_int8_t DmaFairness;
u_int8_t ReportTxEarly;
u_int32_t MulticastFilterType;
u_int32_t NumberOfMcAddresses;
u_int8_t MulticastAddressList[MAX_NUM_MULTICAST_ADDRESSES][ETH_LENGTH_OF_ADDRESS];
u_int8_t GetLinkStatus;
u_int8_t LinkStatusChanged;
u_int8_t LinkIsActive;
u_int32_t AutoNegFailed;
u_int8_t AutoNeg;
u_int16_t AutoNegAdvertised;
u_int8_t WaitAutoNegComplete;
u_int8_t ForcedSpeedDuplex;
u_int16_t LineSpeed;
u_int16_t FullDuplex;
u_int8_t TbiCompatibilityEnable;
u_int8_t TbiCompatibilityOn;
u_int32_t TxcwRegValue;
u_int32_t OriginalFlowControl;
u_int32_t FlowControl;
u_int16_t FlowControlHighWatermark;
u_int16_t FlowControlLowWatermark;
u_int16_t FlowControlPauseTime;
u_int8_t FlowControlSendXon;
u_int32_t MaxFrameSize;
u_int32_t TxIntDelay;
u_int32_t RxIntDelay;
u_int8_t RxChecksum;
XSUM_CONTEXT_T ActiveChecksumContext;
u_int8_t MdiX;
u_int8_t DisablePolarityCorrection;
/* Transmit definitions */
struct _E1000_TRANSMIT_DESCRIPTOR *FirstTxDescriptor;
struct _E1000_TRANSMIT_DESCRIPTOR *LastTxDescriptor;
struct _E1000_TRANSMIT_DESCRIPTOR *NextAvailTxDescriptor;
struct _E1000_TRANSMIT_DESCRIPTOR *OldestUsedTxDescriptor;
struct _E1000_TRANSMIT_DESCRIPTOR *TxDescBase;
volatile u_int16_t NumTxDescriptorsAvail;
u_int16_t NumTxDescriptors;
u_int32_t TxdCmd;
struct em_tx_buffer *tx_buffer_area;
STAILQ_HEAD(__em_tx_buffer_free, em_tx_buffer) FreeSwTxPacketList;
STAILQ_HEAD(__em_tx_buffer_used, em_tx_buffer) UsedSwTxPacketList;
/* Receive definitions */
struct _E1000_RECEIVE_DESCRIPTOR *FirstRxDescriptor;
struct _E1000_RECEIVE_DESCRIPTOR *LastRxDescriptor;
struct _E1000_RECEIVE_DESCRIPTOR *NextRxDescriptorToCheck;
struct _E1000_RECEIVE_DESCRIPTOR *RxDescBase;
u_int16_t NumRxDescriptors;
u_int16_t NumRxDescriptorsEmpty;
u_int16_t NextRxDescriptorToFill;
u_int32_t RxBufferLen;
struct em_rx_buffer *rx_buffer_area;
STAILQ_HEAD(__em_rx_buffer, em_rx_buffer) RxSwPacketList;
/* Jumbo frame */
u_int8_t JumboEnable;
struct em_jslot em_jslots[EM_JSLOTS];
void *em_jumbo_buf;
SLIST_HEAD(__em_jfreehead, em_jpool_entry) em_jfree_listhead;
SLIST_HEAD(__em_jinusehead, em_jpool_entry) em_jinuse_listhead;
/* Misc stats maintained by the driver */
unsigned long DroppedPackets;
unsigned long NoJumboBufAvail;
unsigned long JumboMbufFailed;
unsigned long JumboClusterFailed;
unsigned long StdMbufFailed;
unsigned long StdClusterFailed;
#ifdef DBG_STATS
unsigned long NoTxDescAvail;
unsigned long NoPacketsAvail;
unsigned long CleanTxInterrupts;
unsigned long NoTxBufferAvail1;
unsigned long NoTxBufferAvail2;
#endif
/* Statistics registers present in the 82542 */
unsigned long Crcerrs;
unsigned long Symerrs;
unsigned long Mpc;
unsigned long Scc;
unsigned long Ecol;
unsigned long Mcc;
unsigned long Latecol;
unsigned long Colc;
unsigned long Dc;
unsigned long Sec;
unsigned long Rlec;
unsigned long Xonrxc;
unsigned long Xontxc;
unsigned long Xoffrxc;
unsigned long Xofftxc;
unsigned long Fcruc;
unsigned long Prc64;
unsigned long Prc127;
unsigned long Prc255;
unsigned long Prc511;
unsigned long Prc1023;
unsigned long Prc1522;
unsigned long Gprc;
unsigned long Bprc;
unsigned long Mprc;
unsigned long Gptc;
unsigned long Gorcl;
unsigned long Gorch;
unsigned long Gotcl;
unsigned long Gotch;
unsigned long Rnbc;
unsigned long Ruc;
unsigned long Rfc;
unsigned long Roc;
unsigned long Rjc;
unsigned long Torcl;
unsigned long Torch;
unsigned long Totcl;
unsigned long Totch;
unsigned long Tpr;
unsigned long Tpt;
unsigned long Ptc64;
unsigned long Ptc127;
unsigned long Ptc255;
unsigned long Ptc511;
unsigned long Ptc1023;
unsigned long Ptc1522;
unsigned long Mptc;
unsigned long Bptc;
/* Statistics registers added in the 82543 */
unsigned long Algnerrc;
unsigned long Rxerrc;
unsigned long Tuc;
unsigned long Tncrs;
unsigned long Cexterr;
unsigned long Rutec;
unsigned long Tsctc;
unsigned long Tsctfc;
};
extern void em_adjust_tbi_accepted_stats(struct adapter * Adapter,
u32 FrameLength, u8 * MacAddress);
#endif /* _EM_H_DEFINED_ */

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/**************************************************************************
**************************************************************************
Copyright (c) 2001 Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms of the Software, with or
without modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code of the Software may retain the above
copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form of the Software may reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
3. Neither the name of the Intel Corporation nor the names of its
contributors shall be used to endorse or promote products derived from
this Software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGE.
$FreeBSD$
***************************************************************************
***************************************************************************/
#ifndef _FREEBSD_OS_H_
#define _FREEBSD_OS_H_
#include <sys/types.h>
#define ASSERT(x) if(!(x)) panic("EM: x")
/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
#define DelayInMicroseconds(x) DELAY(x)
#define DelayInMilliseconds(x) DELAY(1000*(x))
typedef u_int8_t u8;
typedef u_int16_t u16;
typedef u_int32_t u32;
typedef struct _E1000_64_BIT_PHYSICAL_ADDRESS {
u32 Lo32;
u32 Hi32;
} E1000_64_BIT_PHYSICAL_ADDRESS, *PE1000_64_BIT_PHYSICAL_ADDRESS;
#define IN
#define OUT
#define STATIC static
#define MSGOUT(S, A, B) printf(S "\n", A, B)
#define DEBUGFUNC(F) DEBUGOUT(F);
#if DBG
#define DEBUGOUT(S) printf(S "\n")
#define DEBUGOUT1(S,A) printf(S "\n",A)
#define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
#define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
#define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
#else
#define DEBUGOUT(S)
#define DEBUGOUT1(S,A)
#define DEBUGOUT2(S,A,B)
#define DEBUGOUT3(S,A,B,C)
#define DEBUGOUT7(S,A,B,C,D,E,F,G)
#endif
#define E1000_READ_REG(reg) \
bus_space_read_4(Adapter->bus_space_tag, Adapter->bus_space_handle, \
(Adapter->MacType >= MAC_LIVENGOOD)?offsetof(E1000_REGISTERS, reg): \
offsetof(OLD_REGISTERS, reg))
#define E1000_WRITE_REG(reg, value) \
bus_space_write_4(Adapter->bus_space_tag, Adapter->bus_space_handle, \
(Adapter->MacType >= MAC_LIVENGOOD)?offsetof(E1000_REGISTERS, reg): \
offsetof(OLD_REGISTERS, reg), value)
#define WritePciConfigWord(Reg, PValue) pci_write_config(Adapter->dev, Reg, *PValue, 2);
#include <dev/em/if_em.h>
#endif /* _FREEBSD_OS_H_ */

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/*************************************************************************
**************************************************************************
Copyright (c) 2001 Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms of the Software, with or
without modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code of the Software may retain the above
copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form of the Software may reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
3. Neither the name of the Intel Corporation nor the names of its
contributors shall be used to endorse or promote products derived from
this Software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGE.
$FreeBSD$
***************************************************************************
**************************************************************************/
#ifndef _EM_PHY_H_
#define _EM_PHY_H_
/*
* Workfile: phy.h
* Date: 9/25/01 2:40p
* Revision: 9
*/
#define _PHY_
#include <dev/em/if_em_osdep.h>
typedef enum {
PXN_PSSR_CABLE_LENGTH_50 = 0,
PXN_PSSR_CABLE_LENGTH_50_80,
PXN_PSSR_CABLE_LENGTH_80_110,
PXN_PSSR_CABLE_LENGTH_110_140,
PXN_PSSR_CABLE_LENGTH_140,
PXN_PSSR_CABLE_LENGTH_UNDEFINED = 0xFF
} PXN_PSSR_CABLE_LENGTH_ENUM;
typedef enum {
PXN_PSCR_10BT_EXT_DIST_ENABLE_NORMAL = 0,
PXN_PSCR_10BT_EXT_DIST_ENABLE_LOWER,
PXN_PSCR_10BT_EXT_DIST_ENABLE_UNDEFINED = 0xFF
} PXN_PSCR_10BT_EXT_DIST_ENABLE_ENUM;
typedef enum {
PXN_PSSR_REV_POLARITY_NORMAL = 0,
PXN_PSSR_REV_POLARITY_REVERSED,
PXN_PSSR_REV_POLARITY_UNDEFINED = 0xFF
} PXN_PSSR_REV_POLARITY_ENUM;
typedef enum {
PXN_PSCR_POLARITY_REVERSAL_ENABLED = 0,
PXN_PSCR_POLARITY_REVERSAL_DISABLED,
PXN_PSCR_POLARITY_REVERSAL_UNDEFINED = 0xFF
} PXN_PSCR_POLARITY_REVERSAL_ENUM;
typedef enum {
PXN_EPSCR_DOWN_NO_IDLE_NO_DETECT = 0,
PXN_EPSCR_DOWN_NO_IDLE_DETECT,
PXN_EPSCR_DOWN_NO_IDLE_UNDEFINED = 0xFF
} PXN_EPSCR_DOWN_NO_IDLE_ENUM;
typedef enum {
PXN_PSCR_AUTO_X_MODE_MANUAL_MDI = 0,
PXN_PSCR_AUTO_X_MODE_MANUAL_MDIX,
PXN_PSCR_AUTO_X_MODE_AUTO_1,
PXN_PSCR_AUTO_X_MODE_AUTO_2,
PXN_PSCR_AUTO_X_MODE_UNDEFINED = 0xFF
} PXN_PSCR_AUTO_X_MODE_ENUM;
typedef enum {
SR_1000T_RX_STATUS_NOT_OK = 0,
SR_1000T_RX_STATUS_OK,
SR_1000T_RX_STATUS_UNDEFINED = 0xFF
} SR_1000T_RX_STATUS_ENUM;
typedef struct {
PXN_PSSR_CABLE_LENGTH_ENUM CableLength;
PXN_PSCR_10BT_EXT_DIST_ENABLE_ENUM Extended10BTDistance;
PXN_PSSR_REV_POLARITY_ENUM CablePolarity;
PXN_PSCR_POLARITY_REVERSAL_ENUM PolarityCorrection;
PXN_EPSCR_DOWN_NO_IDLE_ENUM LinkReset;
PXN_PSCR_AUTO_X_MODE_ENUM MDIXMode;
SR_1000T_RX_STATUS_ENUM LocalRx;
SR_1000T_RX_STATUS_ENUM RemoteRx;
} phy_status_info_struct;
u16 em_read_phy_register(struct adapter *Adapter,
u32 RegAddress, u32 PhyAddress);
void em_write_phy_register(struct adapter *Adapter,
u32 RegAddress, u32 PhyAddress, u16 Data);
void em_phy_hardware_reset(struct adapter *Adapter);
u8 em_phy_reset(struct adapter *Adapter);
u8 em_phy_setup(struct adapter *Adapter, u32 DeviceControlReg);
void em_configure_mac_to_phy_settings(struct adapter *Adapter,
u16 MiiRegisterData);
void em_configure_collision_distance(struct adapter *Adapter);
void em_display_mii_contents(struct adapter *Adapter, u8 PhyAddress);
u32 em_auto_detect_gigabit_phy(struct adapter *Adapter);
void em_pxn_phy_reset_dsp(struct adapter *Adapter);
void PxnIntegratedPhyLoopback(struct adapter *Adapter, u16 Speed);
void PxnPhyEnableReceiver(struct adapter *Adapter);
void PxnPhyDisableReceiver(struct adapter *Adapter);
u8 em_wait_for_auto_neg(struct adapter *Adapter);
u8 em_phy_get_status_info(struct adapter *Adapter,
phy_status_info_struct * PhyStatusInfo);
#define E1000_CTRL_PHY_RESET_DIR E1000_CTRL_SWDPIO0
#define E1000_CTRL_PHY_RESET E1000_CTRL_SWDPIN0
#define E1000_CTRL_MDIO_DIR E1000_CTRL_SWDPIO2
#define E1000_CTRL_MDIO E1000_CTRL_SWDPIN2
#define E1000_CTRL_MDC_DIR E1000_CTRL_SWDPIO3
#define E1000_CTRL_MDC E1000_CTRL_SWDPIN3
#define E1000_CTRL_PHY_RESET_DIR4 E1000_EXCTRL_SWDPIO4
#define E1000_CTRL_PHY_RESET4 E1000_EXCTRL_SWDPIN4
#define PHY_MII_CTRL_REG 0x00
#define PHY_MII_STATUS_REG 0x01
#define PHY_PHY_ID_REG1 0x02
#define PHY_PHY_ID_REG2 0x03
#define PHY_AUTONEG_ADVERTISEMENT 0x04
#define PHY_AUTONEG_LP_BPA 0x05
#define PHY_AUTONEG_EXPANSION_REG 0x06
#define PHY_AUTONEG_NEXT_PAGE_TX 0x07
#define PHY_AUTONEG_LP_RX_NEXT_PAGE 0x08
#define PHY_1000T_CTRL_REG 0x09
#define PHY_1000T_STATUS_REG 0x0A
#define PHY_IEEE_EXT_STATUS_REG 0x0F
#define PXN_PHY_SPEC_CTRL_REG 0x10
#define PXN_PHY_SPEC_STAT_REG 0x11
#define PXN_INT_ENABLE_REG 0x12
#define PXN_INT_STATUS_REG 0x13
#define PXN_EXT_PHY_SPEC_CTRL_REG 0x14
#define PXN_RX_ERROR_COUNTER 0x15
#define PXN_LED_CTRL_REG 0x18
#define MAX_PHY_REG_ADDRESS 0x1F
#define MII_CR_SPEED_SELECT_MSB 0x0040
#define MII_CR_COLL_TEST_ENABLE 0x0080
#define MII_CR_FULL_DUPLEX 0x0100
#define MII_CR_RESTART_AUTO_NEG 0x0200
#define MII_CR_ISOLATE 0x0400
#define MII_CR_POWER_DOWN 0x0800
#define MII_CR_AUTO_NEG_EN 0x1000
#define MII_CR_SPEED_SELECT_LSB 0x2000
#define MII_CR_LOOPBACK 0x4000
#define MII_CR_RESET 0x8000
#define MII_SR_EXTENDED_CAPS 0x0001
#define MII_SR_JABBER_DETECT 0x0002
#define MII_SR_LINK_STATUS 0x0004
#define MII_SR_AUTONEG_CAPS 0x0008
#define MII_SR_REMOTE_FAULT 0x0010
#define MII_SR_AUTONEG_COMPLETE 0x0020
#define MII_SR_PREAMBLE_SUPPRESS 0x0040
#define MII_SR_EXTENDED_STATUS 0x0100
#define MII_SR_100T2_HD_CAPS 0x0200
#define MII_SR_100T2_FD_CAPS 0x0400
#define MII_SR_10T_HD_CAPS 0x0800
#define MII_SR_10T_FD_CAPS 0x1000
#define MII_SR_100X_HD_CAPS 0x2000
#define MII_SR_100X_FD_CAPS 0x4000
#define MII_SR_100T4_CAPS 0x8000
#define NWAY_AR_SELECTOR_FIELD 0x0001
#define NWAY_AR_10T_HD_CAPS 0x0020
#define NWAY_AR_10T_FD_CAPS 0x0040
#define NWAY_AR_100TX_HD_CAPS 0x0080
#define NWAY_AR_100TX_FD_CAPS 0x0100
#define NWAY_AR_100T4_CAPS 0x0200
#define NWAY_AR_PAUSE 0x0400
#define NWAY_AR_ASM_DIR 0x0800
#define NWAY_AR_REMOTE_FAULT 0x2000
#define NWAY_AR_NEXT_PAGE 0x8000
#define NWAY_LPAR_SELECTOR_FIELD 0x0000
#define NWAY_LPAR_10T_HD_CAPS 0x0020
#define NWAY_LPAR_10T_FD_CAPS 0x0040
#define NWAY_LPAR_100TX_HD_CAPS 0x0080
#define NWAY_LPAR_100TX_FD_CAPS 0x0100
#define NWAY_LPAR_100T4_CAPS 0x0200
#define NWAY_LPAR_PAUSE 0x0400
#define NWAY_LPAR_ASM_DIR 0x0800
#define NWAY_LPAR_REMOTE_FAULT 0x2000
#define NWAY_LPAR_ACKNOWLEDGE 0x4000
#define NWAY_LPAR_NEXT_PAGE 0x8000
#define NWAY_ER_LP_NWAY_CAPS 0x0001
#define NWAY_ER_PAGE_RXD 0x0002
#define NWAY_ER_NEXT_PAGE_CAPS 0x0004
#define NWAY_ER_LP_NEXT_PAGE_CAPS 0x0008
#define NWAY_ER_PAR_DETECT_FAULT 0x0100
#define NPTX_MSG_CODE_FIELD 0x0001
#define NPTX_TOGGLE 0x0800
#define NPTX_ACKNOWLDGE2 0x1000
#define NPTX_MSG_PAGE 0x2000
#define NPTX_NEXT_PAGE 0x8000
#define LP_RNPR_MSG_CODE_FIELD 0x0001
#define LP_RNPR_TOGGLE 0x0800
#define LP_RNPR_ACKNOWLDGE2 0x1000
#define LP_RNPR_MSG_PAGE 0x2000
#define LP_RNPR_ACKNOWLDGE 0x4000
#define LP_RNPR_NEXT_PAGE 0x8000
#define CR_1000T_ASYM_PAUSE 0x0080
#define CR_1000T_HD_CAPS 0x0100
#define CR_1000T_FD_CAPS 0x0200
#define CR_1000T_REPEATER_DTE 0x0400
#define CR_1000T_MS_VALUE 0x0800
#define CR_1000T_MS_ENABLE 0x1000
#define CR_1000T_TEST_MODE_NORMAL 0x0000
#define CR_1000T_TEST_MODE_1 0x2000
#define CR_1000T_TEST_MODE_2 0x4000
#define CR_1000T_TEST_MODE_3 0x6000
#define CR_1000T_TEST_MODE_4 0x8000
#define SR_1000T_IDLE_ERROR_CNT 0x00FF
#define SR_1000T_ASYM_PAUSE_DIR 0x0100
#define SR_1000T_LP_HD_CAPS 0x0400
#define SR_1000T_LP_FD_CAPS 0x0800
#define SR_1000T_REMOTE_RX_STATUS 0x1000
#define SR_1000T_LOCAL_RX_STATUS 0x2000
#define SR_1000T_MS_CONFIG_RES 0x4000
#define SR_1000T_MS_CONFIG_FAULT 0x8000
#define SR_1000T_REMOTE_RX_STATUS_SHIFT 12
#define SR_1000T_LOCAL_RX_STATUS_SHIFT 13
#define IEEE_ESR_1000T_HD_CAPS 0x1000
#define IEEE_ESR_1000T_FD_CAPS 0x2000
#define IEEE_ESR_1000X_HD_CAPS 0x4000
#define IEEE_ESR_1000X_FD_CAPS 0x8000
#define PHY_TX_POLARITY_MASK 0x0100
#define PHY_TX_NORMAL_POLARITY 0
#define AUTO_POLARITY_DISABLE 0x0010
#define PXN_PSCR_JABBER_DISABLE 0x0001
#define PXN_PSCR_POLARITY_REVERSAL 0x0002
#define PXN_PSCR_SQE_TEST 0x0004
#define PXN_PSCR_INT_FIFO_DISABLE 0x0008
#define PXN_PSCR_CLK125_DISABLE 0x0010
#define PXN_PSCR_MDI_MANUAL_MODE 0x0000
#define PXN_PSCR_MDIX_MANUAL_MODE 0x0020
#define PXN_PSCR_AUTO_X_1000T 0x0040
#define PXN_PSCR_AUTO_X_MODE 0x0060
#define PXN_PSCR_10BT_EXT_DIST_ENABLE 0x0080
#define PXN_PSCR_MII_5BIT_ENABLE 0x0100
#define PXN_PSCR_SCRAMBLER_DISABLE 0x0200
#define PXN_PSCR_FORCE_LINK_GOOD 0x0400
#define PXN_PSCR_ASSERT_CRS_ON_TX 0x0800
#define PXN_PSCR_RX_FIFO_DEPTH_6 0x0000
#define PXN_PSCR_RX_FIFO_DEPTH_8 0x1000
#define PXN_PSCR_RX_FIFO_DEPTH_10 0x2000
#define PXN_PSCR_RX_FIFO_DEPTH_12 0x3000
#define PXN_PSCR_TXFR_FIFO_DEPTH_6 0x0000
#define PXN_PSCR_TXFR_FIFO_DEPTH_8 0x4000
#define PXN_PSCR_TXFR_FIFO_DEPTH_10 0x8000
#define PXN_PSCR_TXFR_FIFO_DEPTH_12 0xC000
#define PXN_PSCR_POLARITY_REVERSAL_SHIFT 1
#define PXN_PSCR_AUTO_X_MODE_SHIFT 5
#define PXN_PSCR_10BT_EXT_DIST_ENABLE_SHIFT 7
#define PXN_PSSR_JABBER 0x0001
#define PXN_PSSR_REV_POLARITY 0x0002
#define PXN_PSSR_MDIX 0x0040
#define PXN_PSSR_CABLE_LENGTH 0x0380
#define PXN_PSSR_LINK 0x0400
#define PXN_PSSR_SPD_DPLX_RESOLVED 0x0800
#define PXN_PSSR_PAGE_RCVD 0x1000
#define PXN_PSSR_DPLX 0x2000
#define PXN_PSSR_SPEED 0xC000
#define PXN_PSSR_10MBS 0x0000
#define PXN_PSSR_100MBS 0x4000
#define PXN_PSSR_1000MBS 0x8000
#define PXN_PSSR_REV_POLARITY_SHIFT 1
#define PXN_PSSR_CABLE_LENGTH_SHIFT 7
#define PXN_IER_JABBER 0x0001
#define PXN_IER_POLARITY_CHANGE 0x0002
#define PXN_IER_MDIX_CHANGE 0x0040
#define PXN_IER_FIFO_OVER_UNDERUN 0x0080
#define PXN_IER_FALSE_CARRIER 0x0100
#define PXN_IER_SYMBOL_ERROR 0x0200
#define PXN_IER_LINK_STAT_CHANGE 0x0400
#define PXN_IER_AUTO_NEG_COMPLETE 0x0800
#define PXN_IER_PAGE_RECEIVED 0x1000
#define PXN_IER_DUPLEX_CHANGED 0x2000
#define PXN_IER_SPEED_CHANGED 0x4000
#define PXN_IER_AUTO_NEG_ERR 0x8000
#define PXN_ISR_JABBER 0x0001
#define PXN_ISR_POLARITY_CHANGE 0x0002
#define PXN_ISR_MDIX_CHANGE 0x0040
#define PXN_ISR_FIFO_OVER_UNDERUN 0x0080
#define PXN_ISR_FALSE_CARRIER 0x0100
#define PXN_ISR_SYMBOL_ERROR 0x0200
#define PXN_ISR_LINK_STAT_CHANGE 0x0400
#define PXN_ISR_AUTO_NEG_COMPLETE 0x0800
#define PXN_ISR_PAGE_RECEIVED 0x1000
#define PXN_ISR_DUPLEX_CHANGED 0x2000
#define PXN_ISR_SPEED_CHANGED 0x4000
#define PXN_ISR_AUTO_NEG_ERR 0x8000
#define PXN_EPSCR_FIBER_LOOPBACK 0x4000
#define PXN_EPSCR_DOWN_NO_IDLE 0x8000
#define PXN_EPSCR_TX_CLK_2_5 0x0060
#define PXN_EPSCR_TX_CLK_25 0x0070
#define PXN_EPSCR_TX_CLK_0 0x0000
#define PXN_EPSCR_DOWN_NO_IDLE_SHIFT 15
#define PXN_LCR_LED_TX 0x0001
#define PXN_LCR_LED_RX 0x0002
#define PXN_LCR_LED_DUPLEX 0x0004
#define PXN_LCR_LINK 0x0008
#define PXN_LCR_BLINK_RATE_42MS 0x0000
#define PXN_LCR_BLINK_RATE_84MS 0x0100
#define PXN_LCR_BLINK_RATE_170MS 0x0200
#define PXN_LCR_BLINK_RATE_340MS 0x0300
#define PXN_LCR_BLINK_RATE_670MS 0x0400
#define PXN_LCR_PULSE_STRETCH_OFF 0x0000
#define PXN_LCR_PULSE_STRETCH_21_42MS 0x1000
#define PXN_LCR_PULSE_STRETCH_42_84MS 0x2000
#define PXN_LCR_PULSE_STRETCH_84_170MS 0x3000
#define PXN_LCR_PULSE_STRETCH_170_340MS 0x4000
#define PXN_LCR_PULSE_STRETCH_340_670MS 0x5000
#define PXN_LCR_PULSE_STRETCH_670_13S 0x6000
#define PXN_LCR_PULSE_STRETCH_13_26S 0x7000
#define PHY_PREAMBLE 0xFFFFFFFF
#define PHY_SOF 0x01
#define PHY_OP_READ 0x02
#define PHY_OP_WRITE 0x01
#define PHY_TURNAROUND 0x02
#define PHY_PREAMBLE_SIZE 32
#define MII_CR_SPEED_1000 0x0040
#define MII_CR_SPEED_100 0x2000
#define MII_CR_SPEED_10 0x0000
#define E1000_PHY_ADDRESS 0x01
#define E1000_10MB_PHY_ADDRESS 0x02
#define PHY_AUTO_NEG_TIME 45
#define PAXSON_PHY_88E1000 0x01410C50
#define PAXSON_PHY_88E1000S 0x01410C40
#define PAXSON_PHY_INTEGRATED 0x01410C30
#define PHY_REVISION_MASK 0xFFFFFFF0
#define AUTONEG_ADVERTISE_SPEED_DEFAULT 0x002F
#define DEVICE_SPEED_MASK 0x00000300
#define REG4_SPEED_MASK 0x01E0
#define REG9_SPEED_MASK 0x0300
#define ADVERTISE_10_HALF 0x0001
#define ADVERTISE_10_FULL 0x0002
#define ADVERTISE_100_HALF 0x0004
#define ADVERTISE_100_FULL 0x0008
#define ADVERTISE_1000_HALF 0x0010
#define ADVERTISE_1000_FULL 0x0020
#endif /* _EM_PHY_H_ */

1
sys/modules/Makefile
View File

@ -24,6 +24,7 @@ SUBDIR= 3dfx \
digi \
dummynet \
ed \
em \
fdescfs \
fdc \
fs \

13
sys/modules/em/Makefile Normal file
View File

@ -0,0 +1,13 @@
# $FreeBSD$
.PATH: ${.CURDIR}/../../dev/em
KMOD = if_em
SRCS = device_if.h bus_if.h pci_if.h opt_bdg.h
SRCS += if_em.c if_em_fxhw.c if_em_phy.c
clean:
rm -f opt_bdg.h device_if.h bus_if.h pci_if.h setdef*
rm -f *.o *.kld *.ko
rm -f @ machine
.include <bsd.kmod.mk>