Add driver for PrimeCell Vectored Interrupt Controller (PL190)
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187
sys/arm/arm/pl190.c
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187
sys/arm/arm/pl190.c
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/*-
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* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#ifdef DEBUG
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#define dprintf(fmt, args...) printf(fmt, ##args)
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#else
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#define dprintf(fmt, args...)
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#endif
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#define VICIRQSTATUS 0x000
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#define VICFIQSTATUS 0x004
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#define VICRAWINTR 0x008
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#define VICINTSELECT 0x00C
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#define VICINTENABLE 0x010
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#define VICINTENCLEAR 0x014
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#define VICSOFTINT 0x018
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#define VICSOFTINTCLEAR 0x01C
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#define VICPROTECTION 0x020
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#define VICPERIPHID 0xFE0
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#define VICPRIMECELLID 0xFF0
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#define VIC_NIRQS 32
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struct pl190_intc_softc {
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device_t sc_dev;
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struct resource * intc_res;
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};
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static struct pl190_intc_softc *pl190_intc_sc = NULL;
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#define intc_vic_read_4(reg) \
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bus_read_4(pl190_intc_sc->intc_res, (reg))
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#define intc_vic_write_4(reg, val) \
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bus_write_4(pl190_intc_sc->intc_res, (reg), (val))
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static int
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pl190_intc_probe(device_t dev)
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{
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if (!ofw_bus_is_compatible(dev, "arm,versatile-vic"))
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return (ENXIO);
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device_set_desc(dev, "ARM PL190 VIC");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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pl190_intc_attach(device_t dev)
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{
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struct pl190_intc_softc *sc = device_get_softc(dev);
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uint32_t id;
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int i, rid;
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sc->sc_dev = dev;
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if (pl190_intc_sc)
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return (ENXIO);
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/* Request memory resources */
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rid = 0;
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sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->intc_res == NULL) {
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device_printf(dev, "Error: could not allocate memory resources\n");
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return (ENXIO);
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}
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pl190_intc_sc = sc;
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/*
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* All interrupts should use IRQ line
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*/
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intc_vic_write_4(VICINTSELECT, 0x00000000);
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/* Disable all interrupts */
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intc_vic_write_4(VICINTENCLEAR, 0xffffffff);
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/* Enable INT31, SIC IRQ */
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intc_vic_write_4(VICINTENABLE, (1 << 31));
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id = 0;
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for (i = 3; i >= 0; i--) {
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id = (id << 8) |
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(intc_vic_read_4(VICPERIPHID + i*4) & 0xff);
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}
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device_printf(dev, "Peripheral ID: %08x\n", id);
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id = 0;
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for (i = 3; i >= 0; i--) {
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id = (id << 8) |
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(intc_vic_read_4(VICPRIMECELLID + i*4) & 0xff);
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}
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device_printf(dev, "PrimeCell ID: %08x\n", id);
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return (0);
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}
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static device_method_t pl190_intc_methods[] = {
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DEVMETHOD(device_probe, pl190_intc_probe),
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DEVMETHOD(device_attach, pl190_intc_attach),
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{ 0, 0 }
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};
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static driver_t pl190_intc_driver = {
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"intc",
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pl190_intc_methods,
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sizeof(struct pl190_intc_softc),
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};
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static devclass_t pl190_intc_devclass;
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DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass, 0, 0);
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int
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arm_get_next_irq(int last_irq)
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{
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uint32_t pending;
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int32_t irq = last_irq + 1;
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/* Sanity check */
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if (irq < 0)
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irq = 0;
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pending = intc_vic_read_4(VICIRQSTATUS);
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while (irq < VIC_NIRQS) {
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if (pending & (1 << irq))
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return (irq);
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irq++;
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}
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return (-1);
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}
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void
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arm_mask_irq(uintptr_t nb)
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{
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dprintf("%s: %d\n", __func__, nb);
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intc_vic_write_4(VICINTENCLEAR, (1 << nb));
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}
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void
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arm_unmask_irq(uintptr_t nb)
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{
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dprintf("%s: %d\n", __func__, nb);
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intc_vic_write_4(VICINTENABLE, (1 << nb));
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}
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@ -32,6 +32,7 @@ arm/arm/mem.c optional mem
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arm/arm/minidump_machdep.c optional mem
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arm/arm/mp_machdep.c optional smp
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arm/arm/nexus.c standard
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arm/arm/pl190.c optional pl190
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arm/arm/pl310.c optional pl310
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arm/arm/pmap.c optional cpu_arm9 | cpu_arm9e | cpu_fa526 | cpu_sa1100 | cpu_sa1110 | cpu_xscale_80219 | cpu_xscale_80321 | cpu_xscale_81342 | cpu_xscale_ixp425 | cpu_xscale_ixp435 | cpu_xscale_pxa2x0
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arm/arm/pmap-v6.c optional cpu_arm11 | cpu_cortexa | cpu_mv_pj4b
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