arm64: Add support for bcm2838 RNG
The hardware random number generator of the RPi4 differs slightly from the version found on the RPi3. This commit extends the existing bcm2835_rng driver to function on the RPi4. Submitted by: James Mintram <me at jamesrm dot com> Reviewed by: markm, cem, delphij Approved by: csprng(cem, markm) MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D22493
This commit is contained in:
Gordon Bergling
parent
c743a6bd4f
commit
e797dc58bd
@ -69,21 +69,26 @@ static device_probe_t bcm2835_rng_probe;
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#define RNG_RBG2X 0x00000002 /* RBG 2X SPEED */
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#define RNG_RBGEN_BIT 0x00000001 /* Enable RNG bit */
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#define RNG_STATUS 0x04 /* RNG status register */
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#define RND_VAL_SHIFT 24 /* Shift for valid words */
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#define RND_VAL_MASK 0x000000ff /* Number valid words mask */
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#define RND_VAL_WARM_CNT 0x40000 /* RNG Warm Up count */
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#define RND_WARM_CNT 0xfffff /* RNG Warm Up Count mask */
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#define BCM2835_RNG_STATUS 0x04 /* BCM2835 RNG status register */
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#define BCM2838_RNG_STATUS 0x18 /* BCM2838 RNG status register */
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#define RNG_DATA 0x08 /* RNG Data Register */
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#define BCM2838_RNG_COUNT 0x24 /* How many values available */
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#define BCM2838_COUNT_VAL_MASK 0x000000ff
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#define BCM2835_RND_VAL_SHIFT 24 /* Shift for valid words */
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#define BCM2835_RND_VAL_MASK 0x000000ff /* Number valid words mask */
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#define BCM2835_RND_VAL_WARM_CNT 0x40000 /* RNG Warm Up count */
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#define BCM2835_RND_WARM_CNT 0xfffff /* RNG Warm Up Count mask */
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#define BCM2835_RNG_DATA 0x08 /* RNG Data Register */
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#define BCM2838_RNG_DATA 0x20
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#define RNG_FF_THRES 0x0c
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#define RNG_FF_THRES_MASK 0x0000001f
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#define RNG_INT_MASK 0x10
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#define RNG_INT_OFF_BIT 0x00000001
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#define BCM2835_RNG_INT_MASK 0x10
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#define BCM2835_RNG_INT_OFF_BIT 0x00000001
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#define RNG_FF_DEFAULT 0x10 /* FIFO threshold default */
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#define RNG_FIFO_WORDS (RNG_FF_DEFAULT / sizeof(uint32_t))
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#define RNG_NUM_OSCILLATORS 6
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@ -91,11 +96,55 @@ static device_probe_t bcm2835_rng_probe;
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#define RNG_CALLOUT_TICKS (hz * 4)
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struct bcm_rng_conf {
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bus_size_t control_reg;
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bus_size_t status_reg;
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bus_size_t count_reg;
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bus_size_t data_reg;
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bus_size_t intr_mask_reg;
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uint32_t intr_disable_bit;
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uint32_t count_value_shift;
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uint32_t count_value_mask;
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uint32_t warmup_count;
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bool allow_2x_mode;
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bool can_diagnose;
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/* XXX diag regs */
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};
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static const struct bcm_rng_conf bcm2835_rng_conf = {
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.control_reg = RNG_CTRL,
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.status_reg = BCM2835_RNG_STATUS,
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.count_reg = BCM2835_RNG_STATUS, /* Same register */
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.data_reg = BCM2835_RNG_DATA,
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.intr_mask_reg = BCM2835_RNG_INT_MASK,
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.intr_disable_bit = BCM2835_RNG_INT_OFF_BIT,
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.count_value_shift = BCM2835_RND_VAL_SHIFT,
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.count_value_mask = BCM2835_RND_VAL_MASK,
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.warmup_count = BCM2835_RND_VAL_WARM_CNT,
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.allow_2x_mode = true,
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.can_diagnose = true
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};
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static const struct bcm_rng_conf bcm2838_rng_conf = {
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.control_reg = RNG_CTRL,
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.status_reg = BCM2838_RNG_STATUS,
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.count_reg = BCM2838_RNG_COUNT,
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.data_reg = BCM2838_RNG_DATA,
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.intr_mask_reg = 0,
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.intr_disable_bit = 0,
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.count_value_shift = 0,
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.count_value_mask = BCM2838_COUNT_VAL_MASK,
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.warmup_count = 0,
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.allow_2x_mode = false,
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.can_diagnose = false
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};
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struct bcm2835_rng_softc {
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device_t sc_dev;
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struct resource * sc_mem_res;
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struct resource * sc_irq_res;
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void * sc_intr_hdl;
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struct bcm_rng_conf const* conf;
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uint32_t sc_buf[RNG_FIFO_WORDS];
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struct callout sc_rngto;
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int sc_stall_count;
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@ -104,8 +153,15 @@ struct bcm2835_rng_softc {
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};
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static struct ofw_compat_data compat_data[] = {
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{"broadcom,bcm2835-rng", 1},
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{"brcm,bcm2835-rng", 1},
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{"broadcom,bcm2835-rng", (uintptr_t)&bcm2835_rng_conf},
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{"brcm,bcm2835-rng", (uintptr_t)&bcm2835_rng_conf},
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{"brcm,bcm2711-rng200", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,bcm2838-rng", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,bcm2838-rng200", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,bcm7211-rng", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,bcm7278-rng", (uintptr_t)&bcm2838_rng_conf},
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{"brcm,iproc-rng200", (uintptr_t)&bcm2838_rng_conf},
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{NULL, 0}
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};
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@ -144,8 +200,12 @@ bcm2835_rng_dump_registers(struct bcm2835_rng_softc *sc, struct sbuf *sbp)
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uint32_t comblk2_osc, comblk1_osc, jclk_byp_div, val;
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int i;
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if (!sc->conf->can_diagnose)
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/* Not implemented. */
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return;
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/* Display RNG control register contents */
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val = bcm2835_rng_read4(sc, RNG_CTRL);
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val = bcm2835_rng_read4(sc, sc->conf->control_reg);
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sbuf_printf(sbp, "RNG_CTRL (%08x)\n", val);
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comblk2_osc = (val & RNG_COMBLK2_OSC) >> RNG_COMBLK2_OSC_SHIFT;
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@ -181,20 +241,20 @@ bcm2835_rng_dump_registers(struct bcm2835_rng_softc *sc, struct sbuf *sbp)
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sbuf_cat(sbp, " RNG_RBGEN_BIT: RBG enabled\n");
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/* Display RNG status register contents */
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val = bcm2835_rng_read4(sc, RNG_STATUS);
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val = bcm2835_rng_read4(sc, sc->conf->status_reg);
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sbuf_printf(sbp, "RNG_CTRL (%08x)\n", val);
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sbuf_printf(sbp, " RND_VAL: %02x\n",
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(val >> RND_VAL_SHIFT) & RND_VAL_MASK);
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sbuf_printf(sbp, " RND_WARM_CNT: %05x\n", val & RND_WARM_CNT);
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(val >> sc->conf->count_value_shift) & sc->conf->count_value_mask);
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sbuf_printf(sbp, " RND_WARM_CNT: %05x\n", val & sc->conf->warmup_count);
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/* Display FIFO threshold register contents */
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val = bcm2835_rng_read4(sc, RNG_FF_THRES);
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sbuf_printf(sbp, "RNG_FF_THRES: %05x\n", val & RNG_FF_THRES_MASK);
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/* Display interrupt mask register contents */
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val = bcm2835_rng_read4(sc, RNG_INT_MASK);
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val = bcm2835_rng_read4(sc, sc->conf->intr_mask_reg);
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sbuf_printf(sbp, "RNG_INT_MASK: interrupt %s\n",
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((val & RNG_INT_OFF_BIT) != 0) ? "disabled" : "enabled");
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((val & sc->conf->intr_disable_bit) != 0) ? "disabled" : "enabled");
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}
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static void
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@ -203,9 +263,9 @@ bcm2835_rng_disable_intr(struct bcm2835_rng_softc *sc)
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uint32_t mask;
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/* Set the interrupt off bit in the interrupt mask register */
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mask = bcm2835_rng_read4(sc, RNG_INT_MASK);
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mask |= RNG_INT_OFF_BIT;
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bcm2835_rng_write4(sc, RNG_INT_MASK, mask);
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mask = bcm2835_rng_read4(sc, sc->conf->intr_mask_reg);
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mask |= sc->conf->intr_disable_bit;
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bcm2835_rng_write4(sc, sc->conf->intr_mask_reg, mask);
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}
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static void
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@ -214,17 +274,20 @@ bcm2835_rng_start(struct bcm2835_rng_softc *sc)
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uint32_t ctrl;
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/* Disable the interrupt */
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if (sc->conf->intr_mask_reg)
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bcm2835_rng_disable_intr(sc);
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/* Set the warmup count */
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bcm2835_rng_write4(sc, RNG_STATUS, RND_VAL_WARM_CNT);
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if (sc->conf->warmup_count > 0)
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bcm2835_rng_write4(sc, sc->conf->status_reg,
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sc->conf->warmup_count);
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/* Enable the RNG */
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ctrl = bcm2835_rng_read4(sc, RNG_CTRL);
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ctrl = bcm2835_rng_read4(sc, sc->conf->control_reg);
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ctrl |= RNG_RBGEN_BIT;
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if (sc->sc_rbg2x)
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if (sc->sc_rbg2x && sc->conf->allow_2x_mode)
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ctrl |= RNG_RBG2X;
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bcm2835_rng_write4(sc, RNG_CTRL, ctrl);
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bcm2835_rng_write4(sc, sc->conf->control_reg, ctrl);
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}
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static void
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@ -233,16 +296,39 @@ bcm2835_rng_stop(struct bcm2835_rng_softc *sc)
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uint32_t ctrl;
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/* Disable the RNG */
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ctrl = bcm2835_rng_read4(sc, RNG_CTRL);
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ctrl = bcm2835_rng_read4(sc, sc->conf->control_reg);
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ctrl &= ~RNG_RBGEN_BIT;
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bcm2835_rng_write4(sc, RNG_CTRL, ctrl);
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bcm2835_rng_write4(sc, sc->conf->control_reg, ctrl);
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}
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static void
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bcm2835_rng_enqueue_harvest(struct bcm2835_rng_softc *sc, uint32_t nread)
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{
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char *sc_buf_chunk;
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uint32_t chunk_size;
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uint32_t cnt;
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chunk_size = sizeof(((struct harvest_event *)0)->he_entropy);
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cnt = nread * sizeof(uint32_t);
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sc_buf_chunk = (void*)sc->sc_buf;
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while (cnt > 0) {
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uint32_t size;
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size = MIN(cnt, chunk_size);
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random_harvest_queue(sc_buf_chunk, size, RANDOM_PURE_BROADCOM);
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sc_buf_chunk += size;
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cnt -= size;
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}
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}
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static void
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bcm2835_rng_harvest(void *arg)
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{
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uint32_t *dest;
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uint32_t status;
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uint32_t hwcount;
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u_int cnt, nread, num_avail, num_words;
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int seen_underrun, num_stalls;
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struct bcm2835_rng_softc *sc = arg;
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@ -250,11 +336,13 @@ bcm2835_rng_harvest(void *arg)
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dest = sc->sc_buf;
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nread = num_words = 0;
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seen_underrun = num_stalls = 0;
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for (cnt = sizeof(sc->sc_buf) / sizeof(uint32_t); cnt > 0;
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cnt -= num_words) {
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/* Read status register to find out how many words available */
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status = bcm2835_rng_read4(sc, RNG_STATUS);
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num_avail = (status >> RND_VAL_SHIFT) & RND_VAL_MASK;
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/* Read count register to find out how many words available */
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hwcount = bcm2835_rng_read4(sc, sc->conf->count_reg);
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num_avail = (hwcount >> sc->conf->count_value_shift) &
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sc->conf->count_value_mask;
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/* If we have none... */
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if (num_avail == 0) {
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@ -282,15 +370,13 @@ bcm2835_rng_harvest(void *arg)
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/* Pull MIN(num_avail, cnt) words from the FIFO */
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num_words = (num_avail > cnt) ? cnt : num_avail;
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bcm2835_rng_read_multi4(sc, RNG_DATA, dest,
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bcm2835_rng_read_multi4(sc, sc->conf->data_reg, dest,
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num_words);
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dest += num_words;
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nread += num_words;
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}
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cnt = nread * sizeof(uint32_t);
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if (cnt > 0)
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random_harvest_queue(sc->sc_buf, cnt, RANDOM_PURE_BROADCOM);
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bcm2835_rng_enqueue_harvest(sc, nread);
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callout_reset(&sc->sc_rngto, RNG_CALLOUT_TICKS, bcm2835_rng_harvest, sc);
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}
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@ -347,7 +433,7 @@ bcm2835_rng_probe(device_t dev)
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Broadcom BCM2835 RNG");
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device_set_desc(dev, "Broadcom BCM2835/BCM2838 RNG");
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return (BUS_PROBE_DEFAULT);
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}
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@ -363,13 +449,18 @@ bcm2835_rng_attach(device_t dev)
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error = 0;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->conf = (void const*)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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KASSERT(sc->conf != NULL, ("bcm2835_rng_attach: sc->conf == NULL"));
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sc->sc_stall_count = RNG_STALL_COUNT_DEFAULT;
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/* Initialize callout */
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callout_init(&sc->sc_rngto, CALLOUT_MPSAFE);
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TUNABLE_INT_FETCH("bcmrng.2xspeed", &sc->sc_rbg2x);
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TUNABLE_INT_FETCH("bcmrng.stall_count", &sc->sc_stall_count);
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if (sc->conf->allow_2x_mode)
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TUNABLE_INT_FETCH("bcmrng.2xspeed", &sc->sc_rbg2x);
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/* Allocate memory resources */
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rid = 0;
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@ -402,6 +493,7 @@ bcm2835_rng_attach(device_t dev)
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SYSCTL_ADD_LONG(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
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"underrun", CTLFLAG_RD, &sc->sc_underrun,
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"Number of FIFO underruns");
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if (sc->conf->allow_2x_mode)
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SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
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"2xspeed", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
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sysctl_bcm2835_rng_2xspeed, "I", "Enable RBG 2X SPEED");
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