FCP-101: Remove vx(4).
Relnotes: yes FCP: https://github.com/freebsd/fcp/blob/master/fcp-0101.md Reviewed by: jhb, imp Differential Revision: https://reviews.freebsd.org/D20230
This commit is contained in:
parent
be345ff023
commit
e8504bf9e7
@ -60,6 +60,7 @@ OLD_FILES+=usr/share/man/man4/tx.4
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OLD_FILES+=usr/share/man/man4/if_tx.4
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OLD_FILES+=usr/share/man/man4/txp.4
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OLD_FILES+=usr/share/man/man4/if_txp.4
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OLD_FILES+=usr/share/man/man4/vx.4
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# 20190513: libcap_sysctl interface change
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OLD_FILES+=lib/casper/libcap_sysctl.1
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# 20190509: tests/sys/opencrypto requires the net/py-dpkt package.
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@ -19,8 +19,7 @@ MAN= apm.4 \
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pnpbios.4 \
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sbni.4 \
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smapi.4 \
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vpd.4 \
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vx.4
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vpd.4
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MLINKS= CPU_ELAN.4 CPU_SOEKRIS.4
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MLINKS+=pae.4 PAE.4
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@ -1,136 +0,0 @@
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.\"
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.\" Copyright (c) 1996, Fred Gray
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\" 3. All advertising materials mentioning features or use of this software
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.\" must display the following acknowledgement:
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.\" This product includes software developed by David Greenman.
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.\" 4. The name of the author may not be used to endorse or promote products
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.\" derived from this software without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd October 24, 2018
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.Dt VX 4 i386
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.Os
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.Sh NAME
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.Nm vx
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.Nd "3Com EtherLink III / Fast EtherLink III (3c59x) Ethernet driver"
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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place the following line in your
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kernel configuration file:
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.Bd -ragged -offset indent
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.Cd "device vx"
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.Ed
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.Pp
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Alternatively, to load the driver as a
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module at boot time, place the following line in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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if_vx_load="YES"
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.Ed
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.Sh DEPRECATION NOTICE
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The
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.Nm
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driver is not present in
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.Fx 13.0
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and later.
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See https://github.com/freebsd/fcp/blob/master/fcp-0101.md for more
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information.
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for the 3Com
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.Dq Vortex
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chipset.
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.Pp
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The medium selection
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can be influenced by the following link flags to the
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.Xr ifconfig 8
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command:
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.Pp
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.Bl -tag -width LINK0X -compact
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.It Em link0
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Use the AUI port.
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.It Em link1
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Use the BNC port.
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.It Em link2
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Use the UTP port.
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.El
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.Sh HARDWARE
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The
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.Nm
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driver supports the following cards:
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.Pp
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.Bl -bullet -compact
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.It
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3Com 3c590 EtherLink III PCI
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.It
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3Com 3c595 Fast EtherLink III PCI in 10 Mbps mode
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.El
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.Sh DIAGNOSTICS
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All other diagnostics indicate either a hardware problem or a bug in the
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driver.
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.Sh SEE ALSO
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.Xr arp 4 ,
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.Xr netintro 4 ,
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.Xr ng_ether 4 ,
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.Xr ifconfig 8
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.Sh HISTORY
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The
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.Nm
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device driver first appeared in
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.Fx 2.1 .
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It was derived from the
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.Nm ep
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driver, from which it inherits most of its limitations.
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.Sh AUTHORS
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.An -nosplit
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The
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.Nm
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device driver and this manual page were written by
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.An Fred Gray Aq Mt fgray@rice.edu ,
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based on the work of
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.An Herb Peyerl
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and with the assistance of numerous others.
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.Sh CAVEATS
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Some early-revision 3c590 cards are defective and suffer from many receive
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overruns, which cause lost packets.
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The author has attempted to implement
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a test for it based on the information supplied by 3Com, but the test resulted
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mostly in spurious warnings.
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.Pp
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The performance of this driver is somewhat limited by the fact that it uses
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only polled-mode I/O and does not make use of the bus-mastering capability
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of the cards.
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.Sh BUGS
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The
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.Nm
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driver is known not to reset the adapter correctly following a warm boot
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on some systems.
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.Pp
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The
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.Nm
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driver has not been exhaustively tested with all the models of cards that it
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claims to support.
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@ -247,7 +247,6 @@ device vmx # VMware VMXNET3 Ethernet
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device bxe # Broadcom NetXtreme II BCM5771X/BCM578XX 10GbE
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device le # AMD Am7900 LANCE and Am79C9xx PCnet
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device ti # Alteon Networks Tigon I/II gigabit Ethernet
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device vx # 3Com 3c590, 3c595 (``Vortex'')
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# PCI Ethernet NICs that use the common MII bus controller code.
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# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs!
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@ -2000,7 +2000,6 @@ device xmphy # XaQti XMAC II
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# including the D-Link DFE520TX and D-Link DFE530TX (see 'rl' for
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# DFE530TX+), the Hawking Technologies PN102TX, and the AOpen/Acer ALN-320.
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# vte: DM&P Vortex86 RDC R6040 Fast Ethernet
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# vx: 3Com 3C590 and 3C595
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# wb: Support for fast ethernet adapters based on the Winbond W89C840F chip.
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# Note: this is not the same as the Winbond W89C940F, which is a
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# NE2000 clone.
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@ -2073,7 +2072,6 @@ device le # AMD Am7900 LANCE and Am79C9xx PCnet
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device mxge # Myricom Myri-10G 10GbE NIC
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device oce # Emulex 10 GbE (OneConnect Ethernet)
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device ti # Alteon Networks Tigon I/II gigabit Ethernet
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device vx # 3Com 3c590, 3c595 (``Vortex'')
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# PCI IEEE 802.11 Wireless NICs
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device ath # Atheros pci/cardbus NIC's
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1081
sys/dev/vx/if_vx.c
1081
sys/dev/vx/if_vx.c
File diff suppressed because it is too large
Load Diff
@ -1,186 +0,0 @@
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/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (C) 1996 Naoki Hamada <nao@tom-yam.or.jp>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/socket.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_arp.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/vx/if_vxreg.h>
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#include <dev/vx/if_vxvar.h>
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static int vx_pci_shutdown(device_t);
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static int vx_pci_probe(device_t);
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static int vx_pci_attach(device_t);
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static device_method_t vx_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, vx_pci_probe),
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DEVMETHOD(device_attach, vx_pci_attach),
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DEVMETHOD(device_shutdown, vx_pci_shutdown),
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DEVMETHOD_END
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};
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static driver_t vx_driver = {
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"vx",
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vx_methods,
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sizeof(struct vx_softc)
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};
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static devclass_t vx_devclass;
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DRIVER_MODULE(vx, pci, vx_driver, vx_devclass, 0, 0);
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MODULE_DEPEND(vx, pci, 1, 1, 1);
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MODULE_DEPEND(vx, ether, 1, 1, 1);
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static int
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vx_pci_shutdown(device_t dev)
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{
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struct vx_softc *sc;
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sc = device_get_softc(dev);
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VX_LOCK(sc);
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vx_stop(sc);
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VX_UNLOCK(sc);
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return (0);
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}
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static int
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vx_pci_probe(device_t dev)
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{
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u_int32_t device_id;
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device_id = pci_read_config(dev, PCIR_DEVVENDOR, 4);
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if (device_id == 0x590010b7ul) {
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device_set_desc(dev, "3COM 3C590 Etherlink III PCI");
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return (BUS_PROBE_DEFAULT);
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}
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if (device_id == 0x595010b7ul || device_id == 0x595110b7ul ||
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device_id == 0x595210b7ul) {
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device_set_desc(dev, "3COM 3C595 Etherlink III PCI");
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return (BUS_PROBE_DEFAULT);
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}
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/*
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* The (Fast) Etherlink XL adapters are now supported by
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* the xl driver, which uses bus master DMA and is much
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* faster. (And which also supports the 3c905B.
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*/
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if (device_id == 0x900010b7ul || device_id == 0x900110b7ul) {
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device_set_desc(dev, "3COM 3C900 Etherlink XL PCI");
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return (BUS_PROBE_LOW_PRIORITY);
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}
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if (device_id == 0x905010b7ul || device_id == 0x905110b7ul) {
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device_set_desc(dev, "3COM 3C905 Etherlink XL PCI");
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return (BUS_PROBE_LOW_PRIORITY);
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}
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return (ENXIO);
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}
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static int
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vx_pci_attach(device_t dev)
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{
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struct vx_softc *sc;
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int rid;
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sc = device_get_softc(dev);
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rid = PCIR_BAR(0);
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sc->vx_res =
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bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
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if (sc->vx_res == NULL)
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goto bad;
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sc->vx_bst = rman_get_bustag(sc->vx_res);
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sc->vx_bsh = rman_get_bushandle(sc->vx_res);
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rid = 0;
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sc->vx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_SHAREABLE | RF_ACTIVE);
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if (sc->vx_irq == NULL)
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goto bad;
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if (vx_attach(dev) == 0)
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goto bad;
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if (bus_setup_intr(dev, sc->vx_irq, INTR_TYPE_NET | INTR_MPSAFE,
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NULL, vx_intr, sc, &sc->vx_intrhand))
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goto bad_mtx;
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/* defect check for 3C590 */
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if ((pci_read_config(dev, PCIR_DEVVENDOR, 4) >> 16) == 0x5900) {
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GO_WINDOW(0);
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if (vx_busy_eeprom(sc))
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goto bad_mtx;
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CSR_WRITE_2(sc, VX_W0_EEPROM_COMMAND,
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EEPROM_CMD_RD | EEPROM_SOFTINFO2);
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if (vx_busy_eeprom(sc))
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goto bad_mtx;
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if (!(CSR_READ_2(sc, VX_W0_EEPROM_DATA) & NO_RX_OVN_ANOMALY))
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device_printf(dev,
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"Warning! Defective early revision adapter!\n");
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}
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return (0);
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bad_mtx:
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mtx_destroy(&sc->vx_mtx);
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ether_ifdetach(sc->vx_ifp);
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if_free(sc->vx_ifp);
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bad:
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if (sc->vx_intrhand != NULL)
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bus_teardown_intr(dev, sc->vx_irq, sc->vx_intrhand);
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if (sc->vx_res != NULL)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->vx_res);
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if (sc->vx_irq != NULL)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vx_irq);
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return (ENXIO);
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}
|
@ -1,422 +0,0 @@
|
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/*-
|
||||
* Copyright (c) 1993 Herb Peyerl (hpeyerl@novatel.ca) All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer. 2. The name
|
||||
* of the author may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
|
||||
* EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/*
|
||||
* Created from if_epreg.h by Fred Gray (fgray@rice.edu) to support the
|
||||
* 3c590 family.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Some global constants
|
||||
*/
|
||||
|
||||
#define TX_INIT_RATE 16
|
||||
#define TX_INIT_MAX_RATE 64
|
||||
#define RX_INIT_LATENCY 64
|
||||
#define RX_INIT_EARLY_THRESH 64
|
||||
#define MIN_RX_EARLY_THRESHF 16 /* not less than ether_header */
|
||||
#define MIN_RX_EARLY_THRESHL 4
|
||||
|
||||
#define EEPROMSIZE 0x40
|
||||
#define MAX_EEPROMBUSY 1000
|
||||
#define VX_LAST_TAG 0xd7
|
||||
#define VX_MAX_BOARDS 16
|
||||
|
||||
/*
|
||||
* Commands to read/write EEPROM trough EEPROM command register (Window 0,
|
||||
* Offset 0xa)
|
||||
*/
|
||||
#define EEPROM_CMD_RD 0x0080 /* Read: Address required (5 bits) */
|
||||
#define EEPROM_CMD_WR 0x0040 /* Write: Address required (5 bits) */
|
||||
#define EEPROM_CMD_ERASE 0x00c0 /* Erase: Address required (5 bits) */
|
||||
#define EEPROM_CMD_EWEN 0x0030 /* Erase/Write Enable: No data required */
|
||||
|
||||
#define EEPROM_BUSY (1<<15)
|
||||
#define EEPROM_TST_MODE (1<<14)
|
||||
|
||||
/*
|
||||
* Some short functions, worth to let them be a macro
|
||||
*/
|
||||
#define GO_WINDOW(x) CSR_WRITE_2(sc, VX_COMMAND, WINDOW_SELECT|(x))
|
||||
|
||||
/**************************************************************************
|
||||
* *
|
||||
* These define the EEPROM data structure. They are used in the probe
|
||||
* function to verify the existence of the adapter after having sent
|
||||
* the ID_Sequence.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#define EEPROM_NODE_ADDR_0 0x0 /* Word */
|
||||
#define EEPROM_NODE_ADDR_1 0x1 /* Word */
|
||||
#define EEPROM_NODE_ADDR_2 0x2 /* Word */
|
||||
#define EEPROM_PROD_ID 0x3 /* 0x9[0-f]50 */
|
||||
#define EEPROM_MFG_DATE 0x4 /* Manufacturing date */
|
||||
#define EEPROM_MFG_DIVSION 0x5 /* Manufacturing division */
|
||||
#define EEPROM_MFG_PRODUCT 0x6 /* Product code */
|
||||
#define EEPROM_MFG_ID 0x7 /* 0x6d50 */
|
||||
#define EEPROM_ADDR_CFG 0x8 /* Base addr */
|
||||
#define EEPROM_RESOURCE_CFG 0x9 /* IRQ. Bits 12-15 */
|
||||
#define EEPROM_OEM_ADDR0 0xa
|
||||
#define EEPROM_OEM_ADDR1 0xb
|
||||
#define EEPROM_OEM_ADDR2 0xc
|
||||
#define EEPROM_SOFTINFO 0xd
|
||||
#define EEPROM_COMPAT 0xe
|
||||
#define EEPROM_SOFTINFO2 0xf
|
||||
#define EEPROM_CAP 0x10
|
||||
#define EEPROM_INT_CONFIG_0 0x12
|
||||
#define EEPROM_INT_CONFIG_1 0x13
|
||||
/* RAM Partition TX FIFO/RX FIFO */
|
||||
#define ICW1_RAM_PART_MASK 0x03
|
||||
#define ICW1_RAM_PART_35 0x00 /* 2:5 (only legal if RAM size == 000b
|
||||
* default power-up/reset */
|
||||
#define ICW1_RAM_PART_13 0x01 /* 1:3 (only legal if RAM size ==
|
||||
* 000b) */
|
||||
#define ICW1_RAM_PART_11 0x10 /* 1:1 */
|
||||
#define ICW1_RAM_PART_RESV 0x11 /* Reserved */
|
||||
/* ISA Adapter Selection */
|
||||
#define ICW1_IAS_MASK 0x0c
|
||||
#define ICW1_IAS_DIS 0x00 /* Both mechanisms disabled (default) */
|
||||
#define ICW1_IAS_ISA 0x04 /* ISA contention only */
|
||||
#define ICW1_IAS_PNP 0x08 /* ISA Plug and Play only */
|
||||
#define ICW1_IAS_BOTH 0x0c /* Both mechanisms enabled */
|
||||
|
||||
#define EEPROM_CHECKSUM_EL3 0x17
|
||||
|
||||
#define NO_RX_OVN_ANOMALY (1<<5)
|
||||
|
||||
/**************************************************************************
|
||||
* These are the registers for the 3Com 3c509 and their bit patterns when *
|
||||
* applicable. They have been taken out the "EtherLink III Parallel *
|
||||
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual *
|
||||
* from 3com. *
|
||||
**************************************************************************/
|
||||
#define VX_COMMAND 0x0e /* Write. BASE+0x0e is always a
|
||||
* command reg. */
|
||||
#define VX_STATUS 0x0e /* Read. BASE+0x0e is always status
|
||||
* reg. */
|
||||
#define VX_WINDOW 0x0f /* Read. BASE+0x0f is always window
|
||||
* reg. */
|
||||
/*
|
||||
* Window 0 registers. Setup.
|
||||
*/
|
||||
/* Write */
|
||||
#define VX_W0_EEPROM_DATA 0x0c
|
||||
#define VX_W0_EEPROM_COMMAND 0x0a
|
||||
#define VX_W0_RESOURCE_CFG 0x08
|
||||
#define VX_W0_ADDRESS_CFG 0x06
|
||||
#define VX_W0_CONFIG_CTRL 0x04
|
||||
/* Read */
|
||||
#define VX_W0_PRODUCT_ID 0x02
|
||||
#define VX_W0_MFG_ID 0x00
|
||||
|
||||
/*
|
||||
* Window 1 registers. Operating Set.
|
||||
*/
|
||||
/* Write */
|
||||
#define VX_W1_TX_PIO_WR_2 0x02
|
||||
#define VX_W1_TX_PIO_WR_1 0x00
|
||||
/* Read */
|
||||
#define VX_W1_FREE_TX 0x0c
|
||||
#define VX_W1_TX_STATUS 0x0b /* byte */
|
||||
#define VX_W1_TIMER 0x0a /* byte */
|
||||
#define VX_W1_RX_STATUS 0x08
|
||||
#define VX_W1_RX_PIO_RD_2 0x02
|
||||
#define VX_W1_RX_PIO_RD_1 0x00
|
||||
|
||||
/*
|
||||
* Window 2 registers. Station Address Setup/Read
|
||||
*/
|
||||
/* Read/Write */
|
||||
#define VX_W2_ADDR_5 0x05
|
||||
#define VX_W2_ADDR_4 0x04
|
||||
#define VX_W2_ADDR_3 0x03
|
||||
#define VX_W2_ADDR_2 0x02
|
||||
#define VX_W2_ADDR_1 0x01
|
||||
#define VX_W2_ADDR_0 0x00
|
||||
|
||||
/*
|
||||
* Window 3 registers. FIFO Management.
|
||||
*/
|
||||
/* Read */
|
||||
#define VX_W3_INTERNAL_CFG 0x00
|
||||
#define VX_W3_RESET_OPT 0x08
|
||||
#define VX_W3_FREE_TX 0x0c
|
||||
#define VX_W3_FREE_RX 0x0a
|
||||
|
||||
/*
|
||||
* Window 4 registers. Diagnostics.
|
||||
*/
|
||||
/* Read/Write */
|
||||
#define VX_W4_MEDIA_TYPE 0x0a
|
||||
#define VX_W4_CTRLR_STATUS 0x08
|
||||
#define VX_W4_NET_DIAG 0x06
|
||||
#define VX_W4_FIFO_DIAG 0x04
|
||||
#define VX_W4_HOST_DIAG 0x02
|
||||
#define VX_W4_TX_DIAG 0x00
|
||||
|
||||
/*
|
||||
* Window 5 Registers. Results and Internal status.
|
||||
*/
|
||||
/* Read */
|
||||
#define VX_W5_READ_0_MASK 0x0c
|
||||
#define VX_W5_INTR_MASK 0x0a
|
||||
#define VX_W5_RX_FILTER 0x08
|
||||
#define VX_W5_RX_EARLY_THRESH 0x06
|
||||
#define VX_W5_TX_AVAIL_THRESH 0x02
|
||||
#define VX_W5_TX_START_THRESH 0x00
|
||||
|
||||
/*
|
||||
* Window 6 registers. Statistics.
|
||||
*/
|
||||
/* Read/Write */
|
||||
#define TX_TOTAL_OK 0x0c
|
||||
#define RX_TOTAL_OK 0x0a
|
||||
#define TX_DEFERRALS 0x08
|
||||
#define RX_FRAMES_OK 0x07
|
||||
#define TX_FRAMES_OK 0x06
|
||||
#define RX_OVERRUNS 0x05
|
||||
#define TX_COLLISIONS 0x04
|
||||
#define TX_AFTER_1_COLLISION 0x03
|
||||
#define TX_AFTER_X_COLLISIONS 0x02
|
||||
#define TX_NO_SQE 0x01
|
||||
#define TX_CD_LOST 0x00
|
||||
|
||||
/****************************************
|
||||
*
|
||||
* Register definitions.
|
||||
*
|
||||
****************************************/
|
||||
|
||||
/*
|
||||
* Command register. All windows.
|
||||
*
|
||||
* 16 bit register.
|
||||
* 15-11: 5-bit code for command to be executed.
|
||||
* 10-0: 11-bit arg if any. For commands with no args;
|
||||
* this can be set to anything.
|
||||
*/
|
||||
#define GLOBAL_RESET (u_short) 0x0000 /* Wait at least 1ms
|
||||
* after issuing */
|
||||
#define WINDOW_SELECT (u_short) (0x1<<11)
|
||||
#define START_TRANSCEIVER (u_short) (0x2<<11) /* Read ADDR_CFG reg to
|
||||
* determine whether
|
||||
* this is needed. If
|
||||
* so; wait 800 uSec
|
||||
* before using trans-
|
||||
* ceiver. */
|
||||
#define RX_DISABLE (u_short) (0x3<<11) /* state disabled on
|
||||
* power-up */
|
||||
#define RX_ENABLE (u_short) (0x4<<11)
|
||||
#define RX_RESET (u_short) (0x5<<11)
|
||||
#define RX_DISCARD_TOP_PACK (u_short) (0x8<<11)
|
||||
#define TX_ENABLE (u_short) (0x9<<11)
|
||||
#define TX_DISABLE (u_short) (0xa<<11)
|
||||
#define TX_RESET (u_short) (0xb<<11)
|
||||
#define REQ_INTR (u_short) (0xc<<11)
|
||||
/*
|
||||
* The following C_* acknowledge the various interrupts.
|
||||
* Some of them don't do anything. See the manual.
|
||||
*/
|
||||
#define ACK_INTR (u_short) (0x6800)
|
||||
#define C_INTR_LATCH (u_short) (ACK_INTR|0x1)
|
||||
#define C_CARD_FAILURE (u_short) (ACK_INTR|0x2)
|
||||
#define C_TX_COMPLETE (u_short) (ACK_INTR|0x4)
|
||||
#define C_TX_AVAIL (u_short) (ACK_INTR|0x8)
|
||||
#define C_RX_COMPLETE (u_short) (ACK_INTR|0x10)
|
||||
#define C_RX_EARLY (u_short) (ACK_INTR|0x20)
|
||||
#define C_INT_RQD (u_short) (ACK_INTR|0x40)
|
||||
#define C_UPD_STATS (u_short) (ACK_INTR|0x80)
|
||||
#define SET_INTR_MASK (u_short) (0xe<<11)
|
||||
#define SET_RD_0_MASK (u_short) (0xf<<11)
|
||||
#define SET_RX_FILTER (u_short) (0x10<<11)
|
||||
#define FIL_INDIVIDUAL (u_short) (0x1)
|
||||
#define FIL_MULTICAST (u_short) (0x02)
|
||||
#define FIL_BRDCST (u_short) (0x04)
|
||||
#define FIL_PROMISC (u_short) (0x08)
|
||||
#define SET_RX_EARLY_THRESH (u_short) (0x11<<11)
|
||||
#define SET_TX_AVAIL_THRESH (u_short) (0x12<<11)
|
||||
#define SET_TX_START_THRESH (u_short) (0x13<<11)
|
||||
#define STATS_ENABLE (u_short) (0x15<<11)
|
||||
#define STATS_DISABLE (u_short) (0x16<<11)
|
||||
#define STOP_TRANSCEIVER (u_short) (0x17<<11)
|
||||
|
||||
/*
|
||||
* Status register. All windows.
|
||||
*
|
||||
* 15-13: Window number(0-7).
|
||||
* 12: Command_in_progress.
|
||||
* 11: reserved.
|
||||
* 10: reserved.
|
||||
* 9: reserved.
|
||||
* 8: reserved.
|
||||
* 7: Update Statistics.
|
||||
* 6: Interrupt Requested.
|
||||
* 5: RX Early.
|
||||
* 4: RX Complete.
|
||||
* 3: TX Available.
|
||||
* 2: TX Complete.
|
||||
* 1: Adapter Failure.
|
||||
* 0: Interrupt Latch.
|
||||
*/
|
||||
#define S_INTR_LATCH (u_short) (0x1)
|
||||
#define S_CARD_FAILURE (u_short) (0x2)
|
||||
#define S_TX_COMPLETE (u_short) (0x4)
|
||||
#define S_TX_AVAIL (u_short) (0x8)
|
||||
#define S_RX_COMPLETE (u_short) (0x10)
|
||||
#define S_RX_EARLY (u_short) (0x20)
|
||||
#define S_INT_RQD (u_short) (0x40)
|
||||
#define S_UPD_STATS (u_short) (0x80)
|
||||
#define S_COMMAND_IN_PROGRESS (u_short) (0x1000)
|
||||
|
||||
#define VX_BUSY_WAIT while (CSR_READ_2(sc, VX_STATUS) & S_COMMAND_IN_PROGRESS)
|
||||
|
||||
/* Address Config. Register.
|
||||
* Window 0/Port 06
|
||||
*/
|
||||
|
||||
#define ACF_CONNECTOR_BITS 14
|
||||
#define ACF_CONNECTOR_UTP 0
|
||||
#define ACF_CONNECTOR_AUI 1
|
||||
#define ACF_CONNECTOR_BNC 3
|
||||
|
||||
#define INTERNAL_CONNECTOR_BITS 20
|
||||
#define INTERNAL_CONNECTOR_MASK 0x01700000
|
||||
|
||||
/*
|
||||
* FIFO Registers. RX Status.
|
||||
*
|
||||
* 15: Incomplete or FIFO empty.
|
||||
* 14: 1: Error in RX Packet 0: Incomplete or no error.
|
||||
* 13-11: Type of error.
|
||||
* 1000 = Overrun.
|
||||
* 1011 = Run Packet Error.
|
||||
* 1100 = Alignment Error.
|
||||
* 1101 = CRC Error.
|
||||
* 1001 = Oversize Packet Error (>1514 bytes)
|
||||
* 0010 = Dribble Bits.
|
||||
* (all other error codes, no errors.)
|
||||
*
|
||||
* 10-0: RX Bytes (0-1514)
|
||||
*/
|
||||
#define ERR_INCOMPLETE (u_short) (0x8000)
|
||||
#define ERR_RX (u_short) (0x4000)
|
||||
#define ERR_MASK (u_short) (0x7800)
|
||||
#define ERR_OVERRUN (u_short) (0x4000)
|
||||
#define ERR_RUNT (u_short) (0x5800)
|
||||
#define ERR_ALIGNMENT (u_short) (0x6000)
|
||||
#define ERR_CRC (u_short) (0x6800)
|
||||
#define ERR_OVERSIZE (u_short) (0x4800)
|
||||
#define ERR_DRIBBLE (u_short) (0x1000)
|
||||
|
||||
/*
|
||||
* TX Status.
|
||||
*
|
||||
* Reports the transmit status of a completed transmission. Writing this
|
||||
* register pops the transmit completion stack.
|
||||
*
|
||||
* Window 1/Port 0x0b.
|
||||
*
|
||||
* 7: Complete
|
||||
* 6: Interrupt on successful transmission requested.
|
||||
* 5: Jabber Error (TP Only, TX Reset required. )
|
||||
* 4: Underrun (TX Reset required. )
|
||||
* 3: Maximum Collisions.
|
||||
* 2: TX Status Overflow.
|
||||
* 1-0: Undefined.
|
||||
*
|
||||
*/
|
||||
#define TXS_COMPLETE 0x80
|
||||
#define TXS_INTR_REQ 0x40
|
||||
#define TXS_JABBER 0x20
|
||||
#define TXS_UNDERRUN 0x10
|
||||
#define TXS_MAX_COLLISION 0x8
|
||||
#define TXS_STATUS_OVERFLOW 0x4
|
||||
|
||||
#define RS_AUI (1<<5)
|
||||
#define RS_BNC (1<<4)
|
||||
#define RS_UTP (1<<3)
|
||||
#define RS_T4 (1<<0)
|
||||
#define RS_TX (1<<1)
|
||||
#define RS_FX (1<<2)
|
||||
#define RS_MII (1<<6)
|
||||
|
||||
|
||||
/*
|
||||
* FIFO Status (Window 4)
|
||||
*
|
||||
* Supports FIFO diagnostics
|
||||
*
|
||||
* Window 4/Port 0x04.1
|
||||
*
|
||||
* 15: 1=RX receiving (RO). Set when a packet is being received
|
||||
* into the RX FIFO.
|
||||
* 14: Reserved
|
||||
* 13: 1=RX underrun (RO). Generates Adapter Failure interrupt.
|
||||
* Requires RX Reset or Global Reset command to recover.
|
||||
* It is generated when you read past the end of a packet -
|
||||
* reading past what has been received so far will give bad
|
||||
* data.
|
||||
* 12: 1=RX status overrun (RO). Set when there are already 8
|
||||
* packets in the RX FIFO. While this bit is set, no additional
|
||||
* packets are received. Requires no action on the part of
|
||||
* the host. The condition is cleared once a packet has been
|
||||
* read out of the RX FIFO.
|
||||
* 11: 1=RX overrun (RO). Set when the RX FIFO is full (there
|
||||
* may not be an overrun packet yet). While this bit is set,
|
||||
* no additional packets will be received (some additional
|
||||
* bytes can still be pending between the wire and the RX
|
||||
* FIFO). Requires no action on the part of the host. The
|
||||
* condition is cleared once a few bytes have been read out
|
||||
* from the RX FIFO.
|
||||
* 10: 1=TX overrun (RO). Generates adapter failure interrupt.
|
||||
* Requires TX Reset or Global Reset command to recover.
|
||||
* Disables Transmitter.
|
||||
* 9-8: Unassigned.
|
||||
* 7-0: Built in self test bits for the RX and TX FIFO's.
|
||||
*/
|
||||
#define FIFOS_RX_RECEIVING (u_short) 0x8000
|
||||
#define FIFOS_RX_UNDERRUN (u_short) 0x2000
|
||||
#define FIFOS_RX_STATUS_OVERRUN (u_short) 0x1000
|
||||
#define FIFOS_RX_OVERRUN (u_short) 0x0800
|
||||
#define FIFOS_TX_OVERRUN (u_short) 0x0400
|
||||
|
||||
/*
|
||||
* Misc defines for various things.
|
||||
*/
|
||||
#define TAG_ADAPTER 0xd0
|
||||
#define ACTIVATE_ADAPTER_TO_CONFIG 0xff
|
||||
#define ENABLE_DRQ_IRQ 0x0001
|
||||
#define MFG_ID 0x506d /* `TCM' */
|
||||
#define PROD_ID 0x5090
|
||||
#define JABBER_GUARD_ENABLE 0x40
|
||||
#define LINKBEAT_ENABLE 0x80
|
||||
#define ENABLE_UTP (JABBER_GUARD_ENABLE | LINKBEAT_ENABLE)
|
||||
#define DISABLE_UTP 0x0
|
||||
#define RX_BYTES_MASK (u_short) (0x07ff)
|
||||
#define TX_INDICATE (1<<15)
|
||||
|
||||
#define VX_IOSIZE 0x20
|
||||
|
||||
#define VX_CONNECTORS 8
|
@ -1,81 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 1993 Herb Peyerl (hpeyerl@novatel.ca) All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer. 2. The name
|
||||
* of the author may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
|
||||
* EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*
|
||||
October 2, 1994
|
||||
|
||||
Modified by: Andres Vega Garcia
|
||||
|
||||
INRIA - Sophia Antipolis, France
|
||||
e-mail: avega@sophia.inria.fr
|
||||
finger: avega@pax.inria.fr
|
||||
|
||||
*/
|
||||
|
||||
/*
|
||||
* Ethernet software status per interface.
|
||||
*/
|
||||
struct vx_softc {
|
||||
struct ifnet *vx_ifp;
|
||||
bus_space_tag_t vx_bst;
|
||||
bus_space_handle_t vx_bsh;
|
||||
void *vx_intrhand;
|
||||
struct resource *vx_irq;
|
||||
struct resource *vx_res;
|
||||
#define MAX_MBS 8 /* # of mbufs we keep around */
|
||||
struct mbuf *vx_mb[MAX_MBS]; /* spare mbuf storage. */
|
||||
int vx_next_mb; /* Which mbuf to use next. */
|
||||
int vx_last_mb; /* Last mbuf. */
|
||||
char vx_connectors; /* Connectors on this card. */
|
||||
char vx_connector; /* Connector to use. */
|
||||
short vx_tx_start_thresh; /* Current TX_start_thresh. */
|
||||
int vx_tx_succ_ok; /* # packets sent in sequence */
|
||||
/* w/o underrun */
|
||||
struct callout vx_callout; /* Callout for timeouts */
|
||||
struct callout vx_watchdog;
|
||||
struct mtx vx_mtx;
|
||||
int vx_buffill_pending;
|
||||
int vx_timer;
|
||||
};
|
||||
|
||||
#define CSR_WRITE_4(sc, reg, val) \
|
||||
bus_space_write_4(sc->vx_bst, sc->vx_bsh, reg, val)
|
||||
#define CSR_WRITE_2(sc, reg, val) \
|
||||
bus_space_write_2(sc->vx_bst, sc->vx_bsh, reg, val)
|
||||
#define CSR_WRITE_1(sc, reg, val) \
|
||||
bus_space_write_1(sc->vx_bst, sc->vx_bsh, reg, val)
|
||||
|
||||
#define CSR_READ_4(sc, reg) \
|
||||
bus_space_read_4(sc->vx_bst, sc->vx_bsh, reg)
|
||||
#define CSR_READ_2(sc, reg) \
|
||||
bus_space_read_2(sc->vx_bst, sc->vx_bsh, reg)
|
||||
#define CSR_READ_1(sc, reg) \
|
||||
bus_space_read_1(sc->vx_bst, sc->vx_bsh, reg)
|
||||
|
||||
#define VX_LOCK(sc) mtx_lock(&(sc)->vx_mtx)
|
||||
#define VX_UNLOCK(sc) mtx_unlock(&(sc)->vx_mtx)
|
||||
#define VX_LOCK_ASSERT(sc) mtx_assert(&(sc)->vx_mtx, MA_OWNED)
|
||||
|
||||
int vx_attach(device_t);
|
||||
void vx_stop(struct vx_softc *);
|
||||
void vx_intr(void *);
|
||||
int vx_busy_eeprom(struct vx_softc *);
|
@ -229,7 +229,6 @@ device vmx # VMware VMXNET3 Ethernet
|
||||
device bxe # Broadcom NetXtreme II BCM5771X/BCM578XX 10GbE
|
||||
device le # AMD Am7900 LANCE and Am79C9xx PCnet
|
||||
device ti # Alteon Networks Tigon I/II gigabit Ethernet
|
||||
device vx # 3Com 3c590, 3c595 (``Vortex'')
|
||||
|
||||
# PCI Ethernet NICs that use the common MII bus controller code.
|
||||
# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs!
|
||||
|
@ -374,7 +374,6 @@ SUBDIR= \
|
||||
${_vpo} \
|
||||
vr \
|
||||
vte \
|
||||
vx \
|
||||
wb \
|
||||
${_wbwd} \
|
||||
${_wi} \
|
||||
|
@ -1,12 +0,0 @@
|
||||
# $FreeBSD$
|
||||
|
||||
SYSDIR?=${SRCTOP}/sys
|
||||
.include "${SYSDIR}/conf/kern.opts.mk"
|
||||
|
||||
.PATH: ${SYSDIR}/dev/vx
|
||||
|
||||
KMOD= if_vx
|
||||
SRCS= if_vx.c if_vx_pci.c
|
||||
SRCS+= device_if.h bus_if.h pci_if.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
@ -187,7 +187,6 @@ device iflib
|
||||
device em # Intel PRO/1000 adapter Gigabit Ethernet Card
|
||||
device le # AMD Am7900 LANCE and Am79C9xx PCnet
|
||||
device ti # Alteon Networks Tigon I/II gigabit Ethernet
|
||||
#device vx # 3Com 3c590, 3c595 (``Vortex'')
|
||||
|
||||
# PCI Ethernet NICs that use the common MII bus controller code.
|
||||
# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs!
|
||||
|
Loading…
Reference in New Issue
Block a user