NTB: Add device introspection sysctl hierarchy
This should export all of the same information as the Linux ntb_hw_intel debugfs info file, but with a bit more structure, in the sysctl tree rooted at 'dev.ntb_hw.<N>.debug_info'. Raw registers are marked as OPAQUE because reading them on some hardware revisions may cause a hard lockup (NTB errata). They can be read with 'sysctl -x dev.ntb_hw.<N>.debug_info.registers'. On Xeon platforms, some additional registers are available under 'registers.xeon_stats' and 'registers.xeon_hw_err'. They are exported as big-endian values so that the 'sysctl -x' output is legible. Shrink the feature mask to 32 bits so we can use the %b formatter in 'debug_info.features'. Sponsored by: EMC / Isilon Storage Division
This commit is contained in:
cem
parent
51e3af66cf
commit
e85fe86fde
@ -32,10 +32,12 @@ __FBSDID("$FreeBSD$");
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/queue.h>
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#include <sys/rman.h>
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#include <sys/sbuf.h>
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#include <sys/sysctl.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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@ -168,7 +170,7 @@ struct ntb_b2b_addr {
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struct ntb_softc {
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device_t device;
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enum ntb_device_type type;
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uint64_t features;
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uint32_t features;
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struct ntb_pci_bar_info bar_info[NTB_MAX_BARS];
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struct ntb_int_info int_info[MAX_MSIX_INTERRUPTS];
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@ -309,6 +311,10 @@ static void ntb_db_event(struct ntb_softc *ntb, uint32_t vec);
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static void recover_atom_link(void *arg);
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static bool ntb_poll_link(struct ntb_softc *ntb);
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static void save_bar_parameters(struct ntb_pci_bar_info *bar);
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static void ntb_sysctl_init(struct ntb_softc *);
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static int sysctl_handle_features(SYSCTL_HANDLER_ARGS);
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static int sysctl_handle_link_status(SYSCTL_HANDLER_ARGS);
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static int sysctl_handle_register(SYSCTL_HANDLER_ARGS);
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static struct ntb_hw_info pci_ids[] = {
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/* XXX: PS/SS IDs left out until they are supported. */
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@ -528,6 +534,7 @@ ntb_attach(device_t device)
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error = ntb_init_isr(ntb);
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if (error)
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goto out;
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ntb_sysctl_init(ntb);
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pci_enable_busmaster(ntb->device);
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@ -1897,6 +1904,355 @@ ntb_link_sta_width(struct ntb_softc *ntb)
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return (NTB_LNK_STA_WIDTH(ntb->lnk_sta));
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}
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SYSCTL_NODE(_hw_ntb, OID_AUTO, debug_info, CTLFLAG_RW, 0,
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"Driver state, statistics, and HW registers");
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#define NTB_REGSZ_MASK (3ul << 30)
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#define NTB_REG_64 (1ul << 30)
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#define NTB_REG_32 (2ul << 30)
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#define NTB_REG_16 (3ul << 30)
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#define NTB_REG_8 (0ul << 30)
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#define NTB_DB_READ (1ul << 29)
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#define NTB_PCI_REG (1ul << 28)
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#define NTB_REGFLAGS_MASK (NTB_REGSZ_MASK | NTB_DB_READ | NTB_PCI_REG)
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static void
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ntb_sysctl_init(struct ntb_softc *ntb)
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{
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struct sysctl_oid_list *tree_par, *regpar, *statpar, *errpar;
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree, *tmptree;
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ctx = device_get_sysctl_ctx(ntb->device);
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tree = SYSCTL_ADD_NODE(ctx,
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SYSCTL_CHILDREN(device_get_sysctl_tree(ntb->device)), OID_AUTO,
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"debug_info", CTLFLAG_RD, NULL,
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"Driver state, statistics, and HW registers");
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tree_par = SYSCTL_CHILDREN(tree);
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SYSCTL_ADD_UINT(ctx, tree_par, OID_AUTO, "conn_type", CTLFLAG_RD,
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&ntb->conn_type, 0, "0 - Transparent; 1 - B2B; 2 - Root Port");
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SYSCTL_ADD_UINT(ctx, tree_par, OID_AUTO, "dev_type", CTLFLAG_RD,
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&ntb->dev_type, 0, "0 - USD; 1 - DSD");
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if (ntb->b2b_mw_idx != B2B_MW_DISABLED) {
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SYSCTL_ADD_U8(ctx, tree_par, OID_AUTO, "b2b_idx", CTLFLAG_RD,
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&ntb->b2b_mw_idx, 0,
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"Index of the MW used for B2B remote register access");
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SYSCTL_ADD_UQUAD(ctx, tree_par, OID_AUTO, "b2b_off",
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CTLFLAG_RD, &ntb->b2b_off,
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"If non-zero, offset of B2B register region in shared MW");
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}
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SYSCTL_ADD_PROC(ctx, tree_par, OID_AUTO, "features",
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CTLFLAG_RD | CTLTYPE_STRING, ntb, 0, sysctl_handle_features, "A",
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"Features/errata of this NTB device");
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SYSCTL_ADD_UINT(ctx, tree_par, OID_AUTO, "ntb_ctl", CTLFLAG_RD,
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&ntb->ntb_ctl, 0, "NTB CTL register (cached)");
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SYSCTL_ADD_UINT(ctx, tree_par, OID_AUTO, "lnk_sta", CTLFLAG_RD,
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&ntb->lnk_sta, 0, "LNK STA register (cached)");
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SYSCTL_ADD_PROC(ctx, tree_par, OID_AUTO, "link_status",
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CTLFLAG_RD | CTLTYPE_STRING, ntb, 0, sysctl_handle_link_status,
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"A", "Link status");
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SYSCTL_ADD_U8(ctx, tree_par, OID_AUTO, "mw_count", CTLFLAG_RD,
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&ntb->mw_count, 0, "MW count (excl. non-shared B2B register BAR)");
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SYSCTL_ADD_U8(ctx, tree_par, OID_AUTO, "spad_count", CTLFLAG_RD,
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&ntb->spad_count, 0, "Scratchpad count");
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SYSCTL_ADD_U8(ctx, tree_par, OID_AUTO, "db_count", CTLFLAG_RD,
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&ntb->db_count, 0, "Doorbell count");
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SYSCTL_ADD_U8(ctx, tree_par, OID_AUTO, "db_vec_count", CTLFLAG_RD,
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&ntb->db_vec_count, 0, "Doorbell vector count");
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SYSCTL_ADD_U8(ctx, tree_par, OID_AUTO, "db_vec_shift", CTLFLAG_RD,
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&ntb->db_vec_shift, 0, "Doorbell vector shift");
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SYSCTL_ADD_UQUAD(ctx, tree_par, OID_AUTO, "db_valid_mask", CTLFLAG_RD,
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&ntb->db_valid_mask, "Doorbell valid mask");
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SYSCTL_ADD_UQUAD(ctx, tree_par, OID_AUTO, "db_link_mask", CTLFLAG_RD,
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&ntb->db_link_mask, "Doorbell link mask");
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SYSCTL_ADD_UQUAD(ctx, tree_par, OID_AUTO, "db_mask", CTLFLAG_RD,
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&ntb->db_mask, "Doorbell mask (cached)");
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tmptree = SYSCTL_ADD_NODE(ctx, tree_par, OID_AUTO, "registers",
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CTLFLAG_RD, NULL, "Raw HW registers (big-endian)");
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regpar = SYSCTL_CHILDREN(tmptree);
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "db_mask",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | NTB_DB_READ | ntb->self_reg->db_mask,
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sysctl_handle_register, "QU", "Doorbell mask register");
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "db_bell",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | NTB_DB_READ | ntb->self_reg->db_bell,
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sysctl_handle_register, "QU", "Doorbell register");
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "incoming_xlat23",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->xlat_reg->bar2_xlat,
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sysctl_handle_register, "QU", "Incoming XLAT23 register");
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if (HAS_FEATURE(NTB_SPLIT_BAR)) {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "incoming_xlat4",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | ntb->xlat_reg->bar4_xlat,
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sysctl_handle_register, "IU", "Incoming XLAT4 register");
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "incoming_xlat5",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | ntb->xlat_reg->bar5_xlat,
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sysctl_handle_register, "IU", "Incoming XLAT5 register");
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} else {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "incoming_xlat45",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->xlat_reg->bar4_xlat,
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sysctl_handle_register, "QU", "Incoming XLAT45 register");
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}
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "incoming_lmt23",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->xlat_reg->bar2_limit,
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sysctl_handle_register, "QU", "Incoming LMT23 register");
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if (HAS_FEATURE(NTB_SPLIT_BAR)) {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "incoming_lmt4",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | ntb->xlat_reg->bar4_limit,
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sysctl_handle_register, "IU", "Incoming LMT4 register");
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "incoming_lmt5",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | ntb->xlat_reg->bar5_limit,
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sysctl_handle_register, "IU", "Incoming LMT5 register");
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} else {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "incoming_lmt45",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->xlat_reg->bar4_limit,
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sysctl_handle_register, "QU", "Incoming LMT45 register");
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}
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if (ntb->type == NTB_ATOM)
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return;
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tmptree = SYSCTL_ADD_NODE(ctx, regpar, OID_AUTO, "xeon_stats",
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CTLFLAG_RD, NULL, "Xeon HW statistics");
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statpar = SYSCTL_CHILDREN(tmptree);
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SYSCTL_ADD_PROC(ctx, statpar, OID_AUTO, "upstream_mem_miss",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_16 | XEON_USMEMMISS_OFFSET,
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sysctl_handle_register, "SU", "Upstream Memory Miss");
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tmptree = SYSCTL_ADD_NODE(ctx, regpar, OID_AUTO, "xeon_hw_err",
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CTLFLAG_RD, NULL, "Xeon HW errors");
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errpar = SYSCTL_CHILDREN(tmptree);
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SYSCTL_ADD_PROC(ctx, errpar, OID_AUTO, "devsts",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_16 | NTB_PCI_REG | XEON_DEVSTS_OFFSET,
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sysctl_handle_register, "SU", "DEVSTS");
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SYSCTL_ADD_PROC(ctx, errpar, OID_AUTO, "lnksts",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_16 | NTB_PCI_REG | XEON_LINK_STATUS_OFFSET,
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sysctl_handle_register, "SU", "LNKSTS");
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SYSCTL_ADD_PROC(ctx, errpar, OID_AUTO, "uncerrsts",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | NTB_PCI_REG | XEON_UNCERRSTS_OFFSET,
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sysctl_handle_register, "IU", "UNCERRSTS");
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SYSCTL_ADD_PROC(ctx, errpar, OID_AUTO, "corerrsts",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | NTB_PCI_REG | XEON_CORERRSTS_OFFSET,
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sysctl_handle_register, "IU", "CORERRSTS");
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if (ntb->conn_type != NTB_CONN_B2B)
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return;
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "outgoing_xlat23",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->bar_info[NTB_B2B_BAR_1].pbarxlat_off,
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sysctl_handle_register, "QU", "Outgoing XLAT23 register");
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if (HAS_FEATURE(NTB_SPLIT_BAR)) {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "outgoing_xlat4",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | ntb->bar_info[NTB_B2B_BAR_2].pbarxlat_off,
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sysctl_handle_register, "IU", "Outgoing XLAT4 register");
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "outgoing_xlat5",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | ntb->bar_info[NTB_B2B_BAR_3].pbarxlat_off,
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sysctl_handle_register, "IU", "Outgoing XLAT5 register");
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} else {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "outgoing_xlat45",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->bar_info[NTB_B2B_BAR_2].pbarxlat_off,
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sysctl_handle_register, "QU", "Outgoing XLAT45 register");
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}
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "outgoing_lmt23",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | XEON_PBAR2LMT_OFFSET,
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sysctl_handle_register, "QU", "Outgoing LMT23 register");
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if (HAS_FEATURE(NTB_SPLIT_BAR)) {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "outgoing_lmt4",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | XEON_PBAR4LMT_OFFSET,
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sysctl_handle_register, "IU", "Outgoing LMT4 register");
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "outgoing_lmt5",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | XEON_PBAR5LMT_OFFSET,
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sysctl_handle_register, "IU", "Outgoing LMT5 register");
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} else {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "outgoing_lmt45",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | XEON_PBAR4LMT_OFFSET,
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sysctl_handle_register, "QU", "Outgoing LMT45 register");
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}
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "sbar01_base",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->xlat_reg->bar0_base,
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sysctl_handle_register, "QU", "Secondary BAR01 base register");
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "sbar23_base",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->xlat_reg->bar2_base,
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sysctl_handle_register, "QU", "Secondary BAR23 base register");
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if (HAS_FEATURE(NTB_SPLIT_BAR)) {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "sbar4_base",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | ntb->xlat_reg->bar4_base,
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sysctl_handle_register, "IU",
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"Secondary BAR4 base register");
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "sbar5_base",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_32 | ntb->xlat_reg->bar5_base,
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sysctl_handle_register, "IU",
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"Secondary BAR5 base register");
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} else {
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SYSCTL_ADD_PROC(ctx, regpar, OID_AUTO, "sbar45_base",
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CTLFLAG_RD | CTLTYPE_OPAQUE, ntb,
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NTB_REG_64 | ntb->xlat_reg->bar4_base,
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sysctl_handle_register, "QU",
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"Secondary BAR45 base register");
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}
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}
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static int
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sysctl_handle_features(SYSCTL_HANDLER_ARGS)
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{
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struct ntb_softc *ntb;
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struct sbuf sb;
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int error;
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error = 0;
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ntb = arg1;
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sbuf_new_for_sysctl(&sb, NULL, 256, req);
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sbuf_printf(&sb, "%b", ntb->features, NTB_FEATURES_STR);
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error = sbuf_finish(&sb);
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sbuf_delete(&sb);
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if (error || !req->newptr)
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return (error);
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return (EINVAL);
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}
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static int
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sysctl_handle_link_status(SYSCTL_HANDLER_ARGS)
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{
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struct ntb_softc *ntb;
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struct sbuf sb;
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enum ntb_speed speed;
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enum ntb_width width;
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int error;
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error = 0;
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ntb = arg1;
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sbuf_new_for_sysctl(&sb, NULL, 32, req);
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if (ntb_link_is_up(ntb, &speed, &width))
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sbuf_printf(&sb, "up / PCIe Gen %u / Width x%u",
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(unsigned)speed, (unsigned)width);
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else
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sbuf_printf(&sb, "down");
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error = sbuf_finish(&sb);
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sbuf_delete(&sb);
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if (error || !req->newptr)
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return (error);
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return (EINVAL);
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}
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static int
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sysctl_handle_register(SYSCTL_HANDLER_ARGS)
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{
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struct ntb_softc *ntb;
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const void *outp;
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uintptr_t sz;
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uint64_t umv;
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char be[sizeof(umv)];
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size_t outsz;
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uint32_t reg;
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bool db, pci;
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int error;
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ntb = arg1;
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reg = arg2 & ~NTB_REGFLAGS_MASK;
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sz = arg2 & NTB_REGSZ_MASK;
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db = (arg2 & NTB_DB_READ) != 0;
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pci = (arg2 & NTB_PCI_REG) != 0;
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KASSERT(!(db && pci), ("bogus"));
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if (db) {
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KASSERT(sz == NTB_REG_64, ("bogus"));
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umv = db_ioread(ntb, reg);
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outsz = sizeof(uint64_t);
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} else {
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switch (sz) {
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case NTB_REG_64:
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if (pci)
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umv = pci_read_config(ntb->device, reg, 8);
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else
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umv = ntb_reg_read(8, reg);
|
||||
outsz = sizeof(uint64_t);
|
||||
break;
|
||||
case NTB_REG_32:
|
||||
if (pci)
|
||||
umv = pci_read_config(ntb->device, reg, 4);
|
||||
else
|
||||
umv = ntb_reg_read(4, reg);
|
||||
outsz = sizeof(uint32_t);
|
||||
break;
|
||||
case NTB_REG_16:
|
||||
if (pci)
|
||||
umv = pci_read_config(ntb->device, reg, 2);
|
||||
else
|
||||
umv = ntb_reg_read(2, reg);
|
||||
outsz = sizeof(uint16_t);
|
||||
break;
|
||||
case NTB_REG_8:
|
||||
if (pci)
|
||||
umv = pci_read_config(ntb->device, reg, 1);
|
||||
else
|
||||
umv = ntb_reg_read(1, reg);
|
||||
outsz = sizeof(uint8_t);
|
||||
break;
|
||||
default:
|
||||
panic("bogus");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Encode bigendian so that sysctl -x is legible. */
|
||||
be64enc(be, umv);
|
||||
outp = ((char *)be) + sizeof(umv) - outsz;
|
||||
|
||||
error = SYSCTL_OUT(req, outp, outsz);
|
||||
if (error || !req->newptr)
|
||||
return (error);
|
||||
return (EINVAL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Public API to the rest of the OS
|
||||
*/
|
||||
@ -2319,7 +2675,7 @@ ntb_get_device(struct ntb_softc *ntb)
|
||||
|
||||
/* Export HW-specific errata information. */
|
||||
bool
|
||||
ntb_has_feature(struct ntb_softc *ntb, uint64_t feature)
|
||||
ntb_has_feature(struct ntb_softc *ntb, uint32_t feature)
|
||||
{
|
||||
|
||||
return (HAS_FEATURE(feature));
|
||||
|
||||
@ -99,13 +99,18 @@ uint64_t ntb_db_read(struct ntb_softc *);
|
||||
void ntb_db_set_mask(struct ntb_softc *, uint64_t bits);
|
||||
void ntb_peer_db_set(struct ntb_softc *, uint64_t bits);
|
||||
|
||||
/* Hardware owns the low 32 bits of features. */
|
||||
/* Hardware owns the low 16 bits of features. */
|
||||
#define NTB_BAR_SIZE_4K (1 << 0)
|
||||
#define NTB_SDOORBELL_LOCKUP (1 << 1)
|
||||
#define NTB_SB01BASE_LOCKUP (1 << 2)
|
||||
#define NTB_B2BDOORBELL_BIT14 (1 << 3)
|
||||
/* Software/configuration owns the top 32 bits. */
|
||||
#define NTB_SPLIT_BAR (1ull << 32)
|
||||
bool ntb_has_feature(struct ntb_softc *, uint64_t);
|
||||
/* Software/configuration owns the top 16 bits. */
|
||||
#define NTB_SPLIT_BAR (1ull << 16)
|
||||
|
||||
#define NTB_FEATURES_STR \
|
||||
"\20\21SPLIT_BAR4\04B2B_DOORBELL_BIT14\03SB01BASE_LOCKUP" \
|
||||
"\02SDOORBELL_LOCKUP\01BAR_SIZE_4K"
|
||||
|
||||
bool ntb_has_feature(struct ntb_softc *, uint32_t);
|
||||
|
||||
#endif /* _NTB_HW_H_ */
|
||||
|
||||
@ -47,6 +47,7 @@
|
||||
|
||||
#define XEON_PCICMD_OFFSET 0x0504
|
||||
#define XEON_DEVCTRL_OFFSET 0x0598
|
||||
#define XEON_DEVSTS_OFFSET 0x059a
|
||||
#define XEON_LINK_STATUS_OFFSET 0x01a2
|
||||
#define XEON_SLINK_STATUS_OFFSET 0x05a2
|
||||
|
||||
@ -72,10 +73,12 @@
|
||||
#define XEON_PDBMSK_OFFSET 0x0062
|
||||
#define XEON_SDOORBELL_OFFSET 0x0064
|
||||
#define XEON_SDBMSK_OFFSET 0x0066
|
||||
#define XEON_USMEMMISS 0x0070
|
||||
#define XEON_USMEMMISS_OFFSET 0x0070
|
||||
#define XEON_SPAD_OFFSET 0x0080
|
||||
#define XEON_SPADSEMA4_OFFSET 0x00c0
|
||||
#define XEON_WCCNTRL_OFFSET 0x00e0
|
||||
#define XEON_UNCERRSTS_OFFSET 0x014c
|
||||
#define XEON_CORERRSTS_OFFSET 0x0158
|
||||
#define XEON_B2B_SPAD_OFFSET 0x0100
|
||||
#define XEON_B2B_DOORBELL_OFFSET 0x0140
|
||||
#define XEON_B2B_XLAT_OFFSETL 0x0144
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user