From e8cf387c51310834ff6fc5014d39caf5af5311f4 Mon Sep 17 00:00:00 2001 From: Ruslan Bukin Date: Tue, 25 Nov 2014 16:06:19 +0000 Subject: [PATCH] o Add PIO and vtblk mmio device info to the tree o Add FPGA memory window to static dev mappings o Fix whitespace --- sys/arm/altera/socfpga/socfpga_machdep.c | 3 ++ sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts | 35 +++++++++++++++++--- sys/dev/beri/virtio/virtio.h | 2 +- 3 files changed, 35 insertions(+), 5 deletions(-) diff --git a/sys/arm/altera/socfpga/socfpga_machdep.c b/sys/arm/altera/socfpga/socfpga_machdep.c index 428a9985d5de..988e5ad21fff 100644 --- a/sys/arm/altera/socfpga/socfpga_machdep.c +++ b/sys/arm/altera/socfpga/socfpga_machdep.c @@ -95,6 +95,9 @@ platform_devmap_init(void) /* scu */ arm_devmap_add_entry(0xfff00000, 0x100000); + /* FPGA memory window, 256MB */ + arm_devmap_add_entry(0xd0000000, 0x10000000); + return (0); } diff --git a/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts b/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts index 793365a24df4..50167385911f 100644 --- a/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts +++ b/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts @@ -38,8 +38,8 @@ model = "Terasic SoCKit"; compatible = "altr,socfpga-cyclone5", "altr,socfpga"; - /* Reserve first page for secondary CPU trampoline code */ - memreserve = < 0x00000000 0x1000 >; + memreserve = < 0x00000000 0x1000 >, /* SMP trampoline */ + < 0x00001000 0x1000 >; /* virtio block */ memory { device_type = "memory"; @@ -69,6 +69,8 @@ }; mmc: dwmmc@ff704000 { + #address-cells = <1>; + #size-cells = <0>; status = "okay"; num-slots = <1>; supports-highspeed; @@ -81,9 +83,34 @@ }; }; - beri_mem: mem@d0000000 { + beri_mem0: mem@d0000000 { compatible = "sri-cambridge,beri-mem"; - reg = <0xd0000000 0x10000000>; + reg = <0xd0000000 0x10000000>; /* 256mb */ + status = "okay"; + }; + + pio0: pio@c0020000 { + compatible = "altr,pio"; + reg = <0xc0020000 0x1000>; /* recv */ + interrupts = < 76 >; + interrupt-parent = <&GIC>; + status = "okay"; + }; + + pio1: pio@c0021000 { + compatible = "altr,pio"; + reg = <0xc0021000 0x1000>; /* send */ + interrupts = < 82 >; /* not in use on arm side */ + interrupt-parent = <&GIC>; + status = "okay"; + }; + + beri_vtblk: vtblk@00001000 { + compatible = "sri-cambridge,beri-vtblk"; + reg = <0x00001000 0x1000>; + pio-recv = <&pio0>; + pio-send = <&pio1>; + beri-mem = <&beri_mem0>; status = "okay"; }; diff --git a/sys/dev/beri/virtio/virtio.h b/sys/dev/beri/virtio/virtio.h index 9f30da9d0dc2..a3461ad72eea 100644 --- a/sys/dev/beri/virtio/virtio.h +++ b/sys/dev/beri/virtio/virtio.h @@ -39,7 +39,7 @@ #define WRITE4(_sc, _reg, _val) \ bus_write_4((_sc)->res[0], _reg, _val) -#define PAGE_SHIFT 12 +#define PAGE_SHIFT 12 #define VRING_ALIGN 4096 #define NUM_QUEUES 1