diff --git a/lib/libpmc/libpmc.c b/lib/libpmc/libpmc.c index c598d9e17847..555b2be9fc4a 100644 --- a/lib/libpmc/libpmc.c +++ b/lib/libpmc/libpmc.c @@ -48,29 +48,9 @@ __FBSDID("$FreeBSD$"); #include "libpmcinternal.h" /* Function prototypes */ -#if defined(__i386__) -static int k7_allocate_pmc(enum pmc_event _pe, char *_ctrspec, - struct pmc_op_pmcallocate *_pmc_config); -#endif #if defined(__amd64__) || defined(__i386__) -static int iaf_allocate_pmc(enum pmc_event _pe, char *_ctrspec, - struct pmc_op_pmcallocate *_pmc_config); -static int iap_allocate_pmc(enum pmc_event _pe, char *_ctrspec, - struct pmc_op_pmcallocate *_pmc_config); -static int ucf_allocate_pmc(enum pmc_event _pe, char *_ctrspec, - struct pmc_op_pmcallocate *_pmc_config); -static int ucp_allocate_pmc(enum pmc_event _pe, char *_ctrspec, - struct pmc_op_pmcallocate *_pmc_config); static int k8_allocate_pmc(enum pmc_event _pe, char *_ctrspec, struct pmc_op_pmcallocate *_pmc_config); -static int p4_allocate_pmc(enum pmc_event _pe, char *_ctrspec, - struct pmc_op_pmcallocate *_pmc_config); -#endif -#if defined(__i386__) -static int p5_allocate_pmc(enum pmc_event _pe, char *_ctrspec, - struct pmc_op_pmcallocate *_pmc_config); -static int p6_allocate_pmc(enum pmc_event _pe, char *_ctrspec, - struct pmc_op_pmcallocate *_pmc_config); #endif #if defined(__amd64__) || defined(__i386__) static int tsc_allocate_pmc(enum pmc_event _pe, char *_ctrspec, @@ -157,18 +137,13 @@ struct pmc_class_descr { } PMC_CLASSDEP_TABLE(iaf, IAF); -PMC_CLASSDEP_TABLE(k7, K7); PMC_CLASSDEP_TABLE(k8, K8); -PMC_CLASSDEP_TABLE(p4, P4); -PMC_CLASSDEP_TABLE(p5, P5); -PMC_CLASSDEP_TABLE(p6, P6); PMC_CLASSDEP_TABLE(xscale, XSCALE); PMC_CLASSDEP_TABLE(armv7, ARMV7); PMC_CLASSDEP_TABLE(armv8, ARMV8); PMC_CLASSDEP_TABLE(mips24k, MIPS24K); PMC_CLASSDEP_TABLE(mips74k, MIPS74K); PMC_CLASSDEP_TABLE(octeon, OCTEON); -PMC_CLASSDEP_TABLE(ucf, UCF); PMC_CLASSDEP_TABLE(ppc7450, PPC7450); PMC_CLASSDEP_TABLE(ppc970, PPC970); PMC_CLASSDEP_TABLE(e500, E500); @@ -178,122 +153,6 @@ static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT]; #undef __PMC_EV_ALIAS #define __PMC_EV_ALIAS(N,CODE) { N, PMC_EV_##CODE }, -static const struct pmc_event_descr atom_event_table[] = -{ - __PMC_EV_ALIAS_ATOM() -}; - -static const struct pmc_event_descr atom_silvermont_event_table[] = -{ - __PMC_EV_ALIAS_ATOM_SILVERMONT() -}; - -static const struct pmc_event_descr core_event_table[] = -{ - __PMC_EV_ALIAS_CORE() -}; - - -static const struct pmc_event_descr core2_event_table[] = -{ - __PMC_EV_ALIAS_CORE2() -}; - -static const struct pmc_event_descr corei7_event_table[] = -{ - __PMC_EV_ALIAS_COREI7() -}; - -static const struct pmc_event_descr nehalem_ex_event_table[] = -{ - __PMC_EV_ALIAS_COREI7() -}; - -static const struct pmc_event_descr haswell_event_table[] = -{ - __PMC_EV_ALIAS_HASWELL() -}; - -static const struct pmc_event_descr haswell_xeon_event_table[] = -{ - __PMC_EV_ALIAS_HASWELL_XEON() -}; - -static const struct pmc_event_descr broadwell_event_table[] = -{ - __PMC_EV_ALIAS_BROADWELL() -}; - -static const struct pmc_event_descr broadwell_xeon_event_table[] = -{ - __PMC_EV_ALIAS_BROADWELL_XEON() -}; - -static const struct pmc_event_descr skylake_event_table[] = -{ - __PMC_EV_ALIAS_SKYLAKE() -}; - -static const struct pmc_event_descr skylake_xeon_event_table[] = -{ - __PMC_EV_ALIAS_SKYLAKE_XEON() -}; - -static const struct pmc_event_descr ivybridge_event_table[] = -{ - __PMC_EV_ALIAS_IVYBRIDGE() -}; - -static const struct pmc_event_descr ivybridge_xeon_event_table[] = -{ - __PMC_EV_ALIAS_IVYBRIDGE_XEON() -}; - -static const struct pmc_event_descr sandybridge_event_table[] = -{ - __PMC_EV_ALIAS_SANDYBRIDGE() -}; - -static const struct pmc_event_descr sandybridge_xeon_event_table[] = -{ - __PMC_EV_ALIAS_SANDYBRIDGE_XEON() -}; - -static const struct pmc_event_descr westmere_event_table[] = -{ - __PMC_EV_ALIAS_WESTMERE() -}; - -static const struct pmc_event_descr westmere_ex_event_table[] = -{ - __PMC_EV_ALIAS_WESTMERE() -}; - -static const struct pmc_event_descr corei7uc_event_table[] = -{ - __PMC_EV_ALIAS_COREI7UC() -}; - -static const struct pmc_event_descr haswelluc_event_table[] = -{ - __PMC_EV_ALIAS_HASWELLUC() -}; - -static const struct pmc_event_descr broadwelluc_event_table[] = -{ - __PMC_EV_ALIAS_BROADWELLUC() -}; - -static const struct pmc_event_descr sandybridgeuc_event_table[] = -{ - __PMC_EV_ALIAS_SANDYBRIDGEUC() -}; - -static const struct pmc_event_descr westmereuc_event_table[] = -{ - __PMC_EV_ALIAS_WESTMEREUC() -}; - static const struct pmc_event_descr cortex_a8_event_table[] = { __PMC_EV_ALIAS_ARMV7_CORTEX_A8() @@ -324,29 +183,7 @@ static const struct pmc_event_descr cortex_a57_event_table[] = PMC_CLASS_##C, __VA_ARGS__ \ } -PMC_MDEP_TABLE(atom, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(atom_silvermont, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(core, IAP, PMC_CLASS_SOFT, PMC_CLASS_TSC); -PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); -PMC_MDEP_TABLE(nehalem_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(haswell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); -PMC_MDEP_TABLE(haswell_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); -PMC_MDEP_TABLE(broadwell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); -PMC_MDEP_TABLE(broadwell_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); -PMC_MDEP_TABLE(skylake, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); -PMC_MDEP_TABLE(skylake_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(ivybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(ivybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(sandybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); -PMC_MDEP_TABLE(sandybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); -PMC_MDEP_TABLE(westmere_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); -PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC); PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC); -PMC_MDEP_TABLE(p4, P4, PMC_CLASS_SOFT, PMC_CLASS_TSC); -PMC_MDEP_TABLE(p5, P5, PMC_CLASS_SOFT, PMC_CLASS_TSC); -PMC_MDEP_TABLE(p6, P6, PMC_CLASS_SOFT, PMC_CLASS_TSC); PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_SOFT, PMC_CLASS_XSCALE); PMC_MDEP_TABLE(cortex_a8, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7); PMC_MDEP_TABLE(cortex_a9, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7); @@ -378,43 +215,8 @@ static const struct pmc_class_descr NAME##_class_table_descr = \ .pm_evc_allocate_pmc = ALLOCATOR##_allocate_pmc \ } -#if defined(__i386__) || defined(__amd64__) -PMC_CLASS_TABLE_DESC(iaf, IAF, iaf, iaf); -PMC_CLASS_TABLE_DESC(atom, IAP, atom, iap); -PMC_CLASS_TABLE_DESC(atom_silvermont, IAP, atom_silvermont, iap); -PMC_CLASS_TABLE_DESC(core, IAP, core, iap); -PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap); -PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap); -PMC_CLASS_TABLE_DESC(nehalem_ex, IAP, nehalem_ex, iap); -PMC_CLASS_TABLE_DESC(haswell, IAP, haswell, iap); -PMC_CLASS_TABLE_DESC(haswell_xeon, IAP, haswell_xeon, iap); -PMC_CLASS_TABLE_DESC(broadwell, IAP, broadwell, iap); -PMC_CLASS_TABLE_DESC(broadwell_xeon, IAP, broadwell_xeon, iap); -PMC_CLASS_TABLE_DESC(skylake, IAP, skylake, iap); -PMC_CLASS_TABLE_DESC(skylake_xeon, IAP, skylake_xeon, iap); -PMC_CLASS_TABLE_DESC(ivybridge, IAP, ivybridge, iap); -PMC_CLASS_TABLE_DESC(ivybridge_xeon, IAP, ivybridge_xeon, iap); -PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap); -PMC_CLASS_TABLE_DESC(sandybridge_xeon, IAP, sandybridge_xeon, iap); -PMC_CLASS_TABLE_DESC(westmere, IAP, westmere, iap); -PMC_CLASS_TABLE_DESC(westmere_ex, IAP, westmere_ex, iap); -PMC_CLASS_TABLE_DESC(ucf, UCF, ucf, ucf); -PMC_CLASS_TABLE_DESC(corei7uc, UCP, corei7uc, ucp); -PMC_CLASS_TABLE_DESC(haswelluc, UCP, haswelluc, ucp); -PMC_CLASS_TABLE_DESC(broadwelluc, UCP, broadwelluc, ucp); -PMC_CLASS_TABLE_DESC(sandybridgeuc, UCP, sandybridgeuc, ucp); -PMC_CLASS_TABLE_DESC(westmereuc, UCP, westmereuc, ucp); -#endif -#if defined(__i386__) -PMC_CLASS_TABLE_DESC(k7, K7, k7, k7); -#endif #if defined(__i386__) || defined(__amd64__) PMC_CLASS_TABLE_DESC(k8, K8, k8, k8); -PMC_CLASS_TABLE_DESC(p4, P4, p4, p4); -#endif -#if defined(__i386__) -PMC_CLASS_TABLE_DESC(p5, P5, p5, p5); -PMC_CLASS_TABLE_DESC(p6, P6, p6, p6); #endif #if defined(__i386__) || defined(__amd64__) PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc); @@ -556,616 +358,10 @@ pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint64_t *evmask) #define KWPREFIXMATCH(p,kw) (strncasecmp((p), (kw), sizeof((kw)) - 1) == 0) #define EV_ALIAS(N,S) { .pm_alias = N, .pm_spec = S } -#if defined(__i386__) - -/* - * AMD K7 (Athlon) CPUs. - */ - -static struct pmc_event_alias k7_aliases[] = { - EV_ALIAS("branches", "k7-retired-branches"), - EV_ALIAS("branch-mispredicts", "k7-retired-branches-mispredicted"), - EV_ALIAS("cycles", "tsc"), - EV_ALIAS("dc-misses", "k7-dc-misses"), - EV_ALIAS("ic-misses", "k7-ic-misses"), - EV_ALIAS("instructions", "k7-retired-instructions"), - EV_ALIAS("interrupts", "k7-hardware-interrupts"), - EV_ALIAS(NULL, NULL) -}; - -#define K7_KW_COUNT "count" -#define K7_KW_EDGE "edge" -#define K7_KW_INV "inv" -#define K7_KW_OS "os" -#define K7_KW_UNITMASK "unitmask" -#define K7_KW_USR "usr" - -static int -k7_allocate_pmc(enum pmc_event pe, char *ctrspec, - struct pmc_op_pmcallocate *pmc_config) -{ - char *e, *p, *q; - int c, has_unitmask; - uint32_t count, unitmask; - - pmc_config->pm_md.pm_amd.pm_amd_config = 0; - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); - - if (pe == PMC_EV_K7_DC_REFILLS_FROM_L2 || - pe == PMC_EV_K7_DC_REFILLS_FROM_SYSTEM || - pe == PMC_EV_K7_DC_WRITEBACKS) { - has_unitmask = 1; - unitmask = AMD_PMC_UNITMASK_MOESI; - } else - unitmask = has_unitmask = 0; - - while ((p = strsep(&ctrspec, ",")) != NULL) { - if (KWPREFIXMATCH(p, K7_KW_COUNT "=")) { - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - - count = strtol(q, &e, 0); - if (e == q || *e != '\0') - return (-1); - - pmc_config->pm_caps |= PMC_CAP_THRESHOLD; - pmc_config->pm_md.pm_amd.pm_amd_config |= - AMD_PMC_TO_COUNTER(count); - - } else if (KWMATCH(p, K7_KW_EDGE)) { - pmc_config->pm_caps |= PMC_CAP_EDGE; - } else if (KWMATCH(p, K7_KW_INV)) { - pmc_config->pm_caps |= PMC_CAP_INVERT; - } else if (KWMATCH(p, K7_KW_OS)) { - pmc_config->pm_caps |= PMC_CAP_SYSTEM; - } else if (KWPREFIXMATCH(p, K7_KW_UNITMASK "=")) { - if (has_unitmask == 0) - return (-1); - unitmask = 0; - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - - while ((c = tolower(*q++)) != 0) - if (c == 'm') - unitmask |= AMD_PMC_UNITMASK_M; - else if (c == 'o') - unitmask |= AMD_PMC_UNITMASK_O; - else if (c == 'e') - unitmask |= AMD_PMC_UNITMASK_E; - else if (c == 's') - unitmask |= AMD_PMC_UNITMASK_S; - else if (c == 'i') - unitmask |= AMD_PMC_UNITMASK_I; - else if (c == '+') - continue; - else - return (-1); - - if (unitmask == 0) - return (-1); - - } else if (KWMATCH(p, K7_KW_USR)) { - pmc_config->pm_caps |= PMC_CAP_USER; - } else - return (-1); - } - - if (has_unitmask) { - pmc_config->pm_caps |= PMC_CAP_QUALIFIER; - pmc_config->pm_md.pm_amd.pm_amd_config |= - AMD_PMC_TO_UNITMASK(unitmask); - } - - return (0); - -} - -#endif - #if defined(__amd64__) || defined(__i386__) - -/* - * Intel Core (Family 6, Model E) PMCs. - */ - -static struct pmc_event_alias core_aliases[] = { - EV_ALIAS("branches", "iap-br-instr-ret"), - EV_ALIAS("branch-mispredicts", "iap-br-mispred-ret"), - EV_ALIAS("cycles", "tsc-tsc"), - EV_ALIAS("ic-misses", "iap-icache-misses"), - EV_ALIAS("instructions", "iap-instr-ret"), - EV_ALIAS("interrupts", "iap-core-hw-int-rx"), - EV_ALIAS("unhalted-cycles", "iap-unhalted-core-cycles"), - EV_ALIAS(NULL, NULL) -}; - -/* - * Intel Core2 (Family 6, Model F), Core2Extreme (Family 6, Model 17H) - * and Atom (Family 6, model 1CH) PMCs. - * - * We map aliases to events on the fixed-function counters if these - * are present. Note that not all CPUs in this family contain fixed-function - * counters. - */ - -static struct pmc_event_alias core2_aliases[] = { - EV_ALIAS("branches", "iap-br-inst-retired.any"), - EV_ALIAS("branch-mispredicts", "iap-br-inst-retired.mispred"), - EV_ALIAS("cycles", "tsc-tsc"), - EV_ALIAS("ic-misses", "iap-l1i-misses"), - EV_ALIAS("instructions", "iaf-instr-retired.any"), - EV_ALIAS("interrupts", "iap-hw-int-rcv"), - EV_ALIAS("unhalted-cycles", "iaf-cpu-clk-unhalted.core"), - EV_ALIAS(NULL, NULL) -}; - -static struct pmc_event_alias core2_aliases_without_iaf[] = { - EV_ALIAS("branches", "iap-br-inst-retired.any"), - EV_ALIAS("branch-mispredicts", "iap-br-inst-retired.mispred"), - EV_ALIAS("cycles", "tsc-tsc"), - EV_ALIAS("ic-misses", "iap-l1i-misses"), - EV_ALIAS("instructions", "iap-inst-retired.any_p"), - EV_ALIAS("interrupts", "iap-hw-int-rcv"), - EV_ALIAS("unhalted-cycles", "iap-cpu-clk-unhalted.core_p"), - EV_ALIAS(NULL, NULL) -}; - -#define atom_aliases core2_aliases -#define atom_aliases_without_iaf core2_aliases_without_iaf -#define atom_silvermont_aliases core2_aliases -#define atom_silvermont_aliases_without_iaf core2_aliases_without_iaf -#define corei7_aliases core2_aliases -#define corei7_aliases_without_iaf core2_aliases_without_iaf -#define nehalem_ex_aliases core2_aliases -#define nehalem_ex_aliases_without_iaf core2_aliases_without_iaf -#define haswell_aliases core2_aliases -#define haswell_aliases_without_iaf core2_aliases_without_iaf -#define haswell_xeon_aliases core2_aliases -#define haswell_xeon_aliases_without_iaf core2_aliases_without_iaf -#define broadwell_aliases core2_aliases -#define broadwell_aliases_without_iaf core2_aliases_without_iaf -#define broadwell_xeon_aliases core2_aliases -#define broadwell_xeon_aliases_without_iaf core2_aliases_without_iaf -#define skylake_aliases core2_aliases -#define skylake_aliases_without_iaf core2_aliases_without_iaf -#define skylake_xeon_aliases core2_aliases -#define skylake_xeon_aliases_without_iaf core2_aliases_without_iaf -#define ivybridge_aliases core2_aliases -#define ivybridge_aliases_without_iaf core2_aliases_without_iaf -#define ivybridge_xeon_aliases core2_aliases -#define ivybridge_xeon_aliases_without_iaf core2_aliases_without_iaf -#define sandybridge_aliases core2_aliases -#define sandybridge_aliases_without_iaf core2_aliases_without_iaf -#define sandybridge_xeon_aliases core2_aliases -#define sandybridge_xeon_aliases_without_iaf core2_aliases_without_iaf -#define westmere_aliases core2_aliases -#define westmere_aliases_without_iaf core2_aliases_without_iaf -#define westmere_ex_aliases core2_aliases -#define westmere_ex_aliases_without_iaf core2_aliases_without_iaf - -#define IAF_KW_OS "os" -#define IAF_KW_USR "usr" -#define IAF_KW_ANYTHREAD "anythread" - -/* - * Parse an event specifier for Intel fixed function counters. - */ -static int -iaf_allocate_pmc(enum pmc_event pe, char *ctrspec, - struct pmc_op_pmcallocate *pmc_config) -{ - char *p; - - (void) pe; - - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); - pmc_config->pm_md.pm_iaf.pm_iaf_flags = 0; - - while ((p = strsep(&ctrspec, ",")) != NULL) { - if (KWMATCH(p, IAF_KW_OS)) - pmc_config->pm_caps |= PMC_CAP_SYSTEM; - else if (KWMATCH(p, IAF_KW_USR)) - pmc_config->pm_caps |= PMC_CAP_USER; - else if (KWMATCH(p, IAF_KW_ANYTHREAD)) - pmc_config->pm_md.pm_iaf.pm_iaf_flags |= IAF_ANY; - else - return (-1); - } - - return (0); -} - -/* - * Core/Core2 support. - */ - -#define IAP_KW_AGENT "agent" -#define IAP_KW_ANYTHREAD "anythread" -#define IAP_KW_CACHESTATE "cachestate" -#define IAP_KW_CMASK "cmask" -#define IAP_KW_CORE "core" -#define IAP_KW_EDGE "edge" -#define IAP_KW_INV "inv" -#define IAP_KW_OS "os" -#define IAP_KW_PREFETCH "prefetch" -#define IAP_KW_SNOOPRESPONSE "snoopresponse" -#define IAP_KW_SNOOPTYPE "snooptype" -#define IAP_KW_TRANSITION "trans" -#define IAP_KW_USR "usr" -#define IAP_KW_RSP "rsp" - -static struct pmc_masks iap_core_mask[] = { - PMCMASK(all, (0x3 << 14)), - PMCMASK(this, (0x1 << 14)), - NULLMASK -}; - -static struct pmc_masks iap_agent_mask[] = { - PMCMASK(this, 0), - PMCMASK(any, (0x1 << 13)), - NULLMASK -}; - -static struct pmc_masks iap_prefetch_mask[] = { - PMCMASK(both, (0x3 << 12)), - PMCMASK(only, (0x1 << 12)), - PMCMASK(exclude, 0), - NULLMASK -}; - -static struct pmc_masks iap_cachestate_mask[] = { - PMCMASK(i, (1 << 8)), - PMCMASK(s, (1 << 9)), - PMCMASK(e, (1 << 10)), - PMCMASK(m, (1 << 11)), - NULLMASK -}; - -static struct pmc_masks iap_snoopresponse_mask[] = { - PMCMASK(clean, (1 << 8)), - PMCMASK(hit, (1 << 9)), - PMCMASK(hitm, (1 << 11)), - NULLMASK -}; - -static struct pmc_masks iap_snooptype_mask[] = { - PMCMASK(cmp2s, (1 << 8)), - PMCMASK(cmp2i, (1 << 9)), - NULLMASK -}; - -static struct pmc_masks iap_transition_mask[] = { - PMCMASK(any, 0x00), - PMCMASK(frequency, 0x10), - NULLMASK -}; - -static struct pmc_masks iap_rsp_mask_i7_wm[] = { - PMCMASK(DMND_DATA_RD, (1 << 0)), - PMCMASK(DMND_RFO, (1 << 1)), - PMCMASK(DMND_IFETCH, (1 << 2)), - PMCMASK(WB, (1 << 3)), - PMCMASK(PF_DATA_RD, (1 << 4)), - PMCMASK(PF_RFO, (1 << 5)), - PMCMASK(PF_IFETCH, (1 << 6)), - PMCMASK(OTHER, (1 << 7)), - PMCMASK(UNCORE_HIT, (1 << 8)), - PMCMASK(OTHER_CORE_HIT_SNP, (1 << 9)), - PMCMASK(OTHER_CORE_HITM, (1 << 10)), - PMCMASK(REMOTE_CACHE_FWD, (1 << 12)), - PMCMASK(REMOTE_DRAM, (1 << 13)), - PMCMASK(LOCAL_DRAM, (1 << 14)), - PMCMASK(NON_DRAM, (1 << 15)), - NULLMASK -}; - -static struct pmc_masks iap_rsp_mask_sb_sbx_ib[] = { - PMCMASK(REQ_DMND_DATA_RD, (1ULL << 0)), - PMCMASK(REQ_DMND_RFO, (1ULL << 1)), - PMCMASK(REQ_DMND_IFETCH, (1ULL << 2)), - PMCMASK(REQ_WB, (1ULL << 3)), - PMCMASK(REQ_PF_DATA_RD, (1ULL << 4)), - PMCMASK(REQ_PF_RFO, (1ULL << 5)), - PMCMASK(REQ_PF_IFETCH, (1ULL << 6)), - PMCMASK(REQ_PF_LLC_DATA_RD, (1ULL << 7)), - PMCMASK(REQ_PF_LLC_RFO, (1ULL << 8)), - PMCMASK(REQ_PF_LLC_IFETCH, (1ULL << 9)), - PMCMASK(REQ_BUS_LOCKS, (1ULL << 10)), - PMCMASK(REQ_STRM_ST, (1ULL << 11)), - PMCMASK(REQ_OTHER, (1ULL << 15)), - PMCMASK(RES_ANY, (1ULL << 16)), - PMCMASK(RES_SUPPLIER_SUPP, (1ULL << 17)), - PMCMASK(RES_SUPPLIER_LLC_HITM, (1ULL << 18)), - PMCMASK(RES_SUPPLIER_LLC_HITE, (1ULL << 19)), - PMCMASK(RES_SUPPLIER_LLC_HITS, (1ULL << 20)), - PMCMASK(RES_SUPPLIER_LLC_HITF, (1ULL << 21)), - PMCMASK(RES_SUPPLIER_LOCAL, (1ULL << 22)), - PMCMASK(RES_SNOOP_SNP_NONE, (1ULL << 31)), - PMCMASK(RES_SNOOP_SNP_NO_NEEDED,(1ULL << 32)), - PMCMASK(RES_SNOOP_SNP_MISS, (1ULL << 33)), - PMCMASK(RES_SNOOP_HIT_NO_FWD, (1ULL << 34)), - PMCMASK(RES_SNOOP_HIT_FWD, (1ULL << 35)), - PMCMASK(RES_SNOOP_HITM, (1ULL << 36)), - PMCMASK(RES_NON_DRAM, (1ULL << 37)), - NULLMASK -}; - -/* Broadwell is defined to use the same mask as Haswell */ -static struct pmc_masks iap_rsp_mask_haswell[] = { - PMCMASK(REQ_DMND_DATA_RD, (1ULL << 0)), - PMCMASK(REQ_DMND_RFO, (1ULL << 1)), - PMCMASK(REQ_DMND_IFETCH, (1ULL << 2)), - PMCMASK(REQ_PF_DATA_RD, (1ULL << 4)), - PMCMASK(REQ_PF_RFO, (1ULL << 5)), - PMCMASK(REQ_PF_IFETCH, (1ULL << 6)), - PMCMASK(REQ_OTHER, (1ULL << 15)), - PMCMASK(RES_ANY, (1ULL << 16)), - PMCMASK(RES_SUPPLIER_SUPP, (1ULL << 17)), - PMCMASK(RES_SUPPLIER_LLC_HITM, (1ULL << 18)), - PMCMASK(RES_SUPPLIER_LLC_HITE, (1ULL << 19)), - PMCMASK(RES_SUPPLIER_LLC_HITS, (1ULL << 20)), - PMCMASK(RES_SUPPLIER_LLC_HITF, (1ULL << 21)), - PMCMASK(RES_SUPPLIER_LOCAL, (1ULL << 22)), - /* - * For processor type 06_45H 22 is L4_HIT_LOCAL_L4 - * and 23, 24 and 25 are also defined. - */ - PMCMASK(RES_SNOOP_SNP_NONE, (1ULL << 31)), - PMCMASK(RES_SNOOP_SNP_NO_NEEDED,(1ULL << 32)), - PMCMASK(RES_SNOOP_SNP_MISS, (1ULL << 33)), - PMCMASK(RES_SNOOP_HIT_NO_FWD, (1ULL << 34)), - PMCMASK(RES_SNOOP_HIT_FWD, (1ULL << 35)), - PMCMASK(RES_SNOOP_HITM, (1ULL << 36)), - PMCMASK(RES_NON_DRAM, (1ULL << 37)), - NULLMASK -}; - -static struct pmc_masks iap_rsp_mask_skylake[] = { - PMCMASK(REQ_DMND_DATA_RD, (1ULL << 0)), - PMCMASK(REQ_DMND_RFO, (1ULL << 1)), - PMCMASK(REQ_DMND_IFETCH, (1ULL << 2)), - PMCMASK(REQ_PF_DATA_RD, (1ULL << 7)), - PMCMASK(REQ_PF_RFO, (1ULL << 8)), - PMCMASK(REQ_STRM_ST, (1ULL << 11)), - PMCMASK(REQ_OTHER, (1ULL << 15)), - PMCMASK(RES_ANY, (1ULL << 16)), - PMCMASK(RES_SUPPLIER_SUPP, (1ULL << 17)), - PMCMASK(RES_SUPPLIER_LLC_HITM, (1ULL << 18)), - PMCMASK(RES_SUPPLIER_LLC_HITE, (1ULL << 19)), - PMCMASK(RES_SUPPLIER_LLC_HITS, (1ULL << 20)), - PMCMASK(RES_SUPPLIER_L4_HIT, (1ULL << 22)), - PMCMASK(RES_SUPPLIER_DRAM, (1ULL << 26)), - PMCMASK(RES_SUPPLIER_SPL_HIT, (1ULL << 30)), - PMCMASK(RES_SNOOP_SNP_NONE, (1ULL << 31)), - PMCMASK(RES_SNOOP_SNP_NO_NEEDED,(1ULL << 32)), - PMCMASK(RES_SNOOP_SNP_MISS, (1ULL << 33)), - PMCMASK(RES_SNOOP_HIT_NO_FWD, (1ULL << 34)), - PMCMASK(RES_SNOOP_HIT_FWD, (1ULL << 35)), - PMCMASK(RES_SNOOP_HITM, (1ULL << 36)), - PMCMASK(RES_NON_DRAM, (1ULL << 37)), - NULLMASK -}; - - -static int -iap_allocate_pmc(enum pmc_event pe, char *ctrspec, - struct pmc_op_pmcallocate *pmc_config) -{ - char *e, *p, *q; - uint64_t cachestate, evmask, rsp; - int count, n; - - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE | - PMC_CAP_QUALIFIER); - pmc_config->pm_md.pm_iap.pm_iap_config = 0; - - cachestate = evmask = rsp = 0; - - /* Parse additional modifiers if present */ - while ((p = strsep(&ctrspec, ",")) != NULL) { - - n = 0; - if (KWPREFIXMATCH(p, IAP_KW_CMASK "=")) { - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - count = strtol(q, &e, 0); - if (e == q || *e != '\0') - return (-1); - pmc_config->pm_caps |= PMC_CAP_THRESHOLD; - pmc_config->pm_md.pm_iap.pm_iap_config |= - IAP_CMASK(count); - } else if (KWMATCH(p, IAP_KW_EDGE)) { - pmc_config->pm_caps |= PMC_CAP_EDGE; - } else if (KWMATCH(p, IAP_KW_INV)) { - pmc_config->pm_caps |= PMC_CAP_INVERT; - } else if (KWMATCH(p, IAP_KW_OS)) { - pmc_config->pm_caps |= PMC_CAP_SYSTEM; - } else if (KWMATCH(p, IAP_KW_USR)) { - pmc_config->pm_caps |= PMC_CAP_USER; - } else if (KWMATCH(p, IAP_KW_ANYTHREAD)) { - pmc_config->pm_md.pm_iap.pm_iap_config |= IAP_ANY; - } else if (KWPREFIXMATCH(p, IAP_KW_CORE "=")) { - n = pmc_parse_mask(iap_core_mask, p, &evmask); - if (n != 1) - return (-1); - } else if (KWPREFIXMATCH(p, IAP_KW_AGENT "=")) { - n = pmc_parse_mask(iap_agent_mask, p, &evmask); - if (n != 1) - return (-1); - } else if (KWPREFIXMATCH(p, IAP_KW_PREFETCH "=")) { - n = pmc_parse_mask(iap_prefetch_mask, p, &evmask); - if (n != 1) - return (-1); - } else if (KWPREFIXMATCH(p, IAP_KW_CACHESTATE "=")) { - n = pmc_parse_mask(iap_cachestate_mask, p, &cachestate); - } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_CORE && - KWPREFIXMATCH(p, IAP_KW_TRANSITION "=")) { - n = pmc_parse_mask(iap_transition_mask, p, &evmask); - if (n != 1) - return (-1); - } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM || - cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM_SILVERMONT || - cpu_info.pm_cputype == PMC_CPU_INTEL_CORE2 || - cpu_info.pm_cputype == PMC_CPU_INTEL_CORE2EXTREME) { - if (KWPREFIXMATCH(p, IAP_KW_SNOOPRESPONSE "=")) { - n = pmc_parse_mask(iap_snoopresponse_mask, p, - &evmask); - } else if (KWPREFIXMATCH(p, IAP_KW_SNOOPTYPE "=")) { - n = pmc_parse_mask(iap_snooptype_mask, p, - &evmask); - } else - return (-1); - } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_COREI7 || - cpu_info.pm_cputype == PMC_CPU_INTEL_WESTMERE || - cpu_info.pm_cputype == PMC_CPU_INTEL_NEHALEM_EX || - cpu_info.pm_cputype == PMC_CPU_INTEL_WESTMERE_EX) { - if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { - n = pmc_parse_mask(iap_rsp_mask_i7_wm, p, &rsp); - } else - return (-1); - } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_SANDYBRIDGE || - cpu_info.pm_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON || - cpu_info.pm_cputype == PMC_CPU_INTEL_IVYBRIDGE || - cpu_info.pm_cputype == PMC_CPU_INTEL_IVYBRIDGE_XEON ) { - if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { - n = pmc_parse_mask(iap_rsp_mask_sb_sbx_ib, p, &rsp); - } else - return (-1); - } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_HASWELL || - cpu_info.pm_cputype == PMC_CPU_INTEL_HASWELL_XEON) { - if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { - n = pmc_parse_mask(iap_rsp_mask_haswell, p, &rsp); - } else - return (-1); - } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_BROADWELL || - cpu_info.pm_cputype == PMC_CPU_INTEL_BROADWELL_XEON) { - /* Broadwell is defined to use same mask as haswell */ - if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { - n = pmc_parse_mask(iap_rsp_mask_haswell, p, &rsp); - } else - return (-1); - - } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_SKYLAKE || - cpu_info.pm_cputype == PMC_CPU_INTEL_SKYLAKE_XEON) { - if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { - n = pmc_parse_mask(iap_rsp_mask_skylake, p, &rsp); - } else - return (-1); - - } else - return (-1); - - if (n < 0) /* Parsing failed. */ - return (-1); - } - - pmc_config->pm_md.pm_iap.pm_iap_config |= evmask; - - /* - * If the event requires a 'cachestate' qualifier but was not - * specified by the user, use a sensible default. - */ - switch (pe) { - case PMC_EV_IAP_EVENT_28H: /* Core, Core2, Atom */ - case PMC_EV_IAP_EVENT_29H: /* Core, Core2, Atom */ - case PMC_EV_IAP_EVENT_2AH: /* Core, Core2, Atom */ - case PMC_EV_IAP_EVENT_2BH: /* Atom, Core2 */ - case PMC_EV_IAP_EVENT_2EH: /* Core, Core2, Atom */ - case PMC_EV_IAP_EVENT_30H: /* Core, Core2, Atom */ - case PMC_EV_IAP_EVENT_32H: /* Core */ - case PMC_EV_IAP_EVENT_40H: /* Core */ - case PMC_EV_IAP_EVENT_41H: /* Core */ - case PMC_EV_IAP_EVENT_42H: /* Core, Core2, Atom */ - if (cachestate == 0) - cachestate = (0xF << 8); - break; - case PMC_EV_IAP_EVENT_77H: /* Atom */ - /* IAP_EVENT_77H only accepts a cachestate qualifier on the - * Atom processor - */ - if(cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM && cachestate == 0) - cachestate = (0xF << 8); - break; - default: - break; - } - - pmc_config->pm_md.pm_iap.pm_iap_config |= cachestate; - pmc_config->pm_md.pm_iap.pm_iap_rsp = rsp; - - return (0); -} - -/* - * Intel Uncore. - */ - -static int -ucf_allocate_pmc(enum pmc_event pe, char *ctrspec, - struct pmc_op_pmcallocate *pmc_config) -{ - (void) pe; - (void) ctrspec; - - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); - pmc_config->pm_md.pm_ucf.pm_ucf_flags = 0; - - return (0); -} - -#define UCP_KW_CMASK "cmask" -#define UCP_KW_EDGE "edge" -#define UCP_KW_INV "inv" - -static int -ucp_allocate_pmc(enum pmc_event pe, char *ctrspec, - struct pmc_op_pmcallocate *pmc_config) -{ - char *e, *p, *q; - int count, n; - - (void) pe; - - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE | - PMC_CAP_QUALIFIER); - pmc_config->pm_md.pm_ucp.pm_ucp_config = 0; - - /* Parse additional modifiers if present */ - while ((p = strsep(&ctrspec, ",")) != NULL) { - - n = 0; - if (KWPREFIXMATCH(p, UCP_KW_CMASK "=")) { - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - count = strtol(q, &e, 0); - if (e == q || *e != '\0') - return (-1); - pmc_config->pm_caps |= PMC_CAP_THRESHOLD; - pmc_config->pm_md.pm_ucp.pm_ucp_config |= - UCP_CMASK(count); - } else if (KWMATCH(p, UCP_KW_EDGE)) { - pmc_config->pm_caps |= PMC_CAP_EDGE; - } else if (KWMATCH(p, UCP_KW_INV)) { - pmc_config->pm_caps |= PMC_CAP_INVERT; - } else - return (-1); - - if (n < 0) /* Parsing failed. */ - return (-1); - } - - return (0); -} - /* * AMD K8 PMCs. * - * These are very similar to AMD K7 PMCs, but support more kinds of - * events. */ static struct pmc_event_alias k8_aliases[] = { @@ -1520,962 +716,6 @@ k8_allocate_pmc(enum pmc_event pe, char *ctrspec, #endif -#if defined(__amd64__) || defined(__i386__) - -/* - * Intel P4 PMCs - */ - -static struct pmc_event_alias p4_aliases[] = { - EV_ALIAS("branches", "p4-branch-retired,mask=mmtp+mmtm"), - EV_ALIAS("branch-mispredicts", "p4-mispred-branch-retired"), - EV_ALIAS("cycles", "tsc"), - EV_ALIAS("instructions", - "p4-instr-retired,mask=nbogusntag+nbogustag"), - EV_ALIAS("unhalted-cycles", "p4-global-power-events"), - EV_ALIAS(NULL, NULL) -}; - -#define P4_KW_ACTIVE "active" -#define P4_KW_ACTIVE_ANY "any" -#define P4_KW_ACTIVE_BOTH "both" -#define P4_KW_ACTIVE_NONE "none" -#define P4_KW_ACTIVE_SINGLE "single" -#define P4_KW_BUSREQTYPE "busreqtype" -#define P4_KW_CASCADE "cascade" -#define P4_KW_EDGE "edge" -#define P4_KW_INV "complement" -#define P4_KW_OS "os" -#define P4_KW_MASK "mask" -#define P4_KW_PRECISE "precise" -#define P4_KW_TAG "tag" -#define P4_KW_THRESHOLD "threshold" -#define P4_KW_USR "usr" - -#define __P4MASK(N,V) PMCMASK(N, (1 << (V))) - -static const struct pmc_masks p4_mask_tcdm[] = { /* tc deliver mode */ - __P4MASK(dd, 0), - __P4MASK(db, 1), - __P4MASK(di, 2), - __P4MASK(bd, 3), - __P4MASK(bb, 4), - __P4MASK(bi, 5), - __P4MASK(id, 6), - __P4MASK(ib, 7), - NULLMASK -}; - -static const struct pmc_masks p4_mask_bfr[] = { /* bpu fetch request */ - __P4MASK(tcmiss, 0), - NULLMASK, -}; - -static const struct pmc_masks p4_mask_ir[] = { /* itlb reference */ - __P4MASK(hit, 0), - __P4MASK(miss, 1), - __P4MASK(hit-uc, 2), - NULLMASK -}; - -static const struct pmc_masks p4_mask_memcan[] = { /* memory cancel */ - __P4MASK(st-rb-full, 2), - __P4MASK(64k-conf, 3), - NULLMASK -}; - -static const struct pmc_masks p4_mask_memcomp[] = { /* memory complete */ - __P4MASK(lsc, 0), - __P4MASK(ssc, 1), - NULLMASK -}; - -static const struct pmc_masks p4_mask_lpr[] = { /* load port replay */ - __P4MASK(split-ld, 1), - NULLMASK -}; - -static const struct pmc_masks p4_mask_spr[] = { /* store port replay */ - __P4MASK(split-st, 1), - NULLMASK -}; - -static const struct pmc_masks p4_mask_mlr[] = { /* mob load replay */ - __P4MASK(no-sta, 1), - __P4MASK(no-std, 3), - __P4MASK(partial-data, 4), - __P4MASK(unalgn-addr, 5), - NULLMASK -}; - -static const struct pmc_masks p4_mask_pwt[] = { /* page walk type */ - __P4MASK(dtmiss, 0), - __P4MASK(itmiss, 1), - NULLMASK -}; - -static const struct pmc_masks p4_mask_bcr[] = { /* bsq cache reference */ - __P4MASK(rd-2ndl-hits, 0), - __P4MASK(rd-2ndl-hite, 1), - __P4MASK(rd-2ndl-hitm, 2), - __P4MASK(rd-3rdl-hits, 3), - __P4MASK(rd-3rdl-hite, 4), - __P4MASK(rd-3rdl-hitm, 5), - __P4MASK(rd-2ndl-miss, 8), - __P4MASK(rd-3rdl-miss, 9), - __P4MASK(wr-2ndl-miss, 10), - NULLMASK -}; - -static const struct pmc_masks p4_mask_ia[] = { /* ioq allocation */ - __P4MASK(all-read, 5), - __P4MASK(all-write, 6), - __P4MASK(mem-uc, 7), - __P4MASK(mem-wc, 8), - __P4MASK(mem-wt, 9), - __P4MASK(mem-wp, 10), - __P4MASK(mem-wb, 11), - __P4MASK(own, 13), - __P4MASK(other, 14), - __P4MASK(prefetch, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_iae[] = { /* ioq active entries */ - __P4MASK(all-read, 5), - __P4MASK(all-write, 6), - __P4MASK(mem-uc, 7), - __P4MASK(mem-wc, 8), - __P4MASK(mem-wt, 9), - __P4MASK(mem-wp, 10), - __P4MASK(mem-wb, 11), - __P4MASK(own, 13), - __P4MASK(other, 14), - __P4MASK(prefetch, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_fda[] = { /* fsb data activity */ - __P4MASK(drdy-drv, 0), - __P4MASK(drdy-own, 1), - __P4MASK(drdy-other, 2), - __P4MASK(dbsy-drv, 3), - __P4MASK(dbsy-own, 4), - __P4MASK(dbsy-other, 5), - NULLMASK -}; - -static const struct pmc_masks p4_mask_ba[] = { /* bsq allocation */ - __P4MASK(req-type0, 0), - __P4MASK(req-type1, 1), - __P4MASK(req-len0, 2), - __P4MASK(req-len1, 3), - __P4MASK(req-io-type, 5), - __P4MASK(req-lock-type, 6), - __P4MASK(req-cache-type, 7), - __P4MASK(req-split-type, 8), - __P4MASK(req-dem-type, 9), - __P4MASK(req-ord-type, 10), - __P4MASK(mem-type0, 11), - __P4MASK(mem-type1, 12), - __P4MASK(mem-type2, 13), - NULLMASK -}; - -static const struct pmc_masks p4_mask_sia[] = { /* sse input assist */ - __P4MASK(all, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_psu[] = { /* packed sp uop */ - __P4MASK(all, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_pdu[] = { /* packed dp uop */ - __P4MASK(all, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_ssu[] = { /* scalar sp uop */ - __P4MASK(all, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_sdu[] = { /* scalar dp uop */ - __P4MASK(all, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_64bmu[] = { /* 64 bit mmx uop */ - __P4MASK(all, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_128bmu[] = { /* 128 bit mmx uop */ - __P4MASK(all, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_xfu[] = { /* X87 fp uop */ - __P4MASK(all, 15), - NULLMASK -}; - -static const struct pmc_masks p4_mask_xsmu[] = { /* x87 simd moves uop */ - __P4MASK(allp0, 3), - __P4MASK(allp2, 4), - NULLMASK -}; - -static const struct pmc_masks p4_mask_gpe[] = { /* global power events */ - __P4MASK(running, 0), - NULLMASK -}; - -static const struct pmc_masks p4_mask_tmx[] = { /* TC ms xfer */ - __P4MASK(cisc, 0), - NULLMASK -}; - -static const struct pmc_masks p4_mask_uqw[] = { /* uop queue writes */ - __P4MASK(from-tc-build, 0), - __P4MASK(from-tc-deliver, 1), - __P4MASK(from-rom, 2), - NULLMASK -}; - -static const struct pmc_masks p4_mask_rmbt[] = { - /* retired mispred branch type */ - __P4MASK(conditional, 1), - __P4MASK(call, 2), - __P4MASK(return, 3), - __P4MASK(indirect, 4), - NULLMASK -}; - -static const struct pmc_masks p4_mask_rbt[] = { /* retired branch type */ - __P4MASK(conditional, 1), - __P4MASK(call, 2), - __P4MASK(retired, 3), - __P4MASK(indirect, 4), - NULLMASK -}; - -static const struct pmc_masks p4_mask_rs[] = { /* resource stall */ - __P4MASK(sbfull, 5), - NULLMASK -}; - -static const struct pmc_masks p4_mask_wb[] = { /* WC buffer */ - __P4MASK(wcb-evicts, 0), - __P4MASK(wcb-full-evict, 1), - NULLMASK -}; - -static const struct pmc_masks p4_mask_fee[] = { /* front end event */ - __P4MASK(nbogus, 0), - __P4MASK(bogus, 1), - NULLMASK -}; - -static const struct pmc_masks p4_mask_ee[] = { /* execution event */ - __P4MASK(nbogus0, 0), - __P4MASK(nbogus1, 1), - __P4MASK(nbogus2, 2), - __P4MASK(nbogus3, 3), - __P4MASK(bogus0, 4), - __P4MASK(bogus1, 5), - __P4MASK(bogus2, 6), - __P4MASK(bogus3, 7), - NULLMASK -}; - -static const struct pmc_masks p4_mask_re[] = { /* replay event */ - __P4MASK(nbogus, 0), - __P4MASK(bogus, 1), - NULLMASK -}; - -static const struct pmc_masks p4_mask_insret[] = { /* instr retired */ - __P4MASK(nbogusntag, 0), - __P4MASK(nbogustag, 1), - __P4MASK(bogusntag, 2), - __P4MASK(bogustag, 3), - NULLMASK -}; - -static const struct pmc_masks p4_mask_ur[] = { /* uops retired */ - __P4MASK(nbogus, 0), - __P4MASK(bogus, 1), - NULLMASK -}; - -static const struct pmc_masks p4_mask_ut[] = { /* uop type */ - __P4MASK(tagloads, 1), - __P4MASK(tagstores, 2), - NULLMASK -}; - -static const struct pmc_masks p4_mask_br[] = { /* branch retired */ - __P4MASK(mmnp, 0), - __P4MASK(mmnm, 1), - __P4MASK(mmtp, 2), - __P4MASK(mmtm, 3), - NULLMASK -}; - -static const struct pmc_masks p4_mask_mbr[] = { /* mispred branch retired */ - __P4MASK(nbogus, 0), - NULLMASK -}; - -static const struct pmc_masks p4_mask_xa[] = { /* x87 assist */ - __P4MASK(fpsu, 0), - __P4MASK(fpso, 1), - __P4MASK(poao, 2), - __P4MASK(poau, 3), - __P4MASK(prea, 4), - NULLMASK -}; - -static const struct pmc_masks p4_mask_machclr[] = { /* machine clear */ - __P4MASK(clear, 0), - __P4MASK(moclear, 2), - __P4MASK(smclear, 3), - NULLMASK -}; - -/* P4 event parser */ -static int -p4_allocate_pmc(enum pmc_event pe, char *ctrspec, - struct pmc_op_pmcallocate *pmc_config) -{ - - char *e, *p, *q; - int count, has_tag, has_busreqtype, n; - uint32_t cccractivemask; - uint64_t evmask; - const struct pmc_masks *pm, *pmask; - - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); - pmc_config->pm_md.pm_p4.pm_p4_cccrconfig = - pmc_config->pm_md.pm_p4.pm_p4_escrconfig = 0; - - pmask = NULL; - evmask = 0; - cccractivemask = 0x3; - has_tag = has_busreqtype = 0; - -#define __P4SETMASK(M) do { \ - pmask = p4_mask_##M; \ -} while (0) - - switch (pe) { - case PMC_EV_P4_TC_DELIVER_MODE: - __P4SETMASK(tcdm); - break; - case PMC_EV_P4_BPU_FETCH_REQUEST: - __P4SETMASK(bfr); - break; - case PMC_EV_P4_ITLB_REFERENCE: - __P4SETMASK(ir); - break; - case PMC_EV_P4_MEMORY_CANCEL: - __P4SETMASK(memcan); - break; - case PMC_EV_P4_MEMORY_COMPLETE: - __P4SETMASK(memcomp); - break; - case PMC_EV_P4_LOAD_PORT_REPLAY: - __P4SETMASK(lpr); - break; - case PMC_EV_P4_STORE_PORT_REPLAY: - __P4SETMASK(spr); - break; - case PMC_EV_P4_MOB_LOAD_REPLAY: - __P4SETMASK(mlr); - break; - case PMC_EV_P4_PAGE_WALK_TYPE: - __P4SETMASK(pwt); - break; - case PMC_EV_P4_BSQ_CACHE_REFERENCE: - __P4SETMASK(bcr); - break; - case PMC_EV_P4_IOQ_ALLOCATION: - __P4SETMASK(ia); - has_busreqtype = 1; - break; - case PMC_EV_P4_IOQ_ACTIVE_ENTRIES: - __P4SETMASK(iae); - has_busreqtype = 1; - break; - case PMC_EV_P4_FSB_DATA_ACTIVITY: - __P4SETMASK(fda); - break; - case PMC_EV_P4_BSQ_ALLOCATION: - __P4SETMASK(ba); - break; - case PMC_EV_P4_SSE_INPUT_ASSIST: - __P4SETMASK(sia); - break; - case PMC_EV_P4_PACKED_SP_UOP: - __P4SETMASK(psu); - break; - case PMC_EV_P4_PACKED_DP_UOP: - __P4SETMASK(pdu); - break; - case PMC_EV_P4_SCALAR_SP_UOP: - __P4SETMASK(ssu); - break; - case PMC_EV_P4_SCALAR_DP_UOP: - __P4SETMASK(sdu); - break; - case PMC_EV_P4_64BIT_MMX_UOP: - __P4SETMASK(64bmu); - break; - case PMC_EV_P4_128BIT_MMX_UOP: - __P4SETMASK(128bmu); - break; - case PMC_EV_P4_X87_FP_UOP: - __P4SETMASK(xfu); - break; - case PMC_EV_P4_X87_SIMD_MOVES_UOP: - __P4SETMASK(xsmu); - break; - case PMC_EV_P4_GLOBAL_POWER_EVENTS: - __P4SETMASK(gpe); - break; - case PMC_EV_P4_TC_MS_XFER: - __P4SETMASK(tmx); - break; - case PMC_EV_P4_UOP_QUEUE_WRITES: - __P4SETMASK(uqw); - break; - case PMC_EV_P4_RETIRED_MISPRED_BRANCH_TYPE: - __P4SETMASK(rmbt); - break; - case PMC_EV_P4_RETIRED_BRANCH_TYPE: - __P4SETMASK(rbt); - break; - case PMC_EV_P4_RESOURCE_STALL: - __P4SETMASK(rs); - break; - case PMC_EV_P4_WC_BUFFER: - __P4SETMASK(wb); - break; - case PMC_EV_P4_BSQ_ACTIVE_ENTRIES: - case PMC_EV_P4_B2B_CYCLES: - case PMC_EV_P4_BNR: - case PMC_EV_P4_SNOOP: - case PMC_EV_P4_RESPONSE: - break; - case PMC_EV_P4_FRONT_END_EVENT: - __P4SETMASK(fee); - break; - case PMC_EV_P4_EXECUTION_EVENT: - __P4SETMASK(ee); - break; - case PMC_EV_P4_REPLAY_EVENT: - __P4SETMASK(re); - break; - case PMC_EV_P4_INSTR_RETIRED: - __P4SETMASK(insret); - break; - case PMC_EV_P4_UOPS_RETIRED: - __P4SETMASK(ur); - break; - case PMC_EV_P4_UOP_TYPE: - __P4SETMASK(ut); - break; - case PMC_EV_P4_BRANCH_RETIRED: - __P4SETMASK(br); - break; - case PMC_EV_P4_MISPRED_BRANCH_RETIRED: - __P4SETMASK(mbr); - break; - case PMC_EV_P4_X87_ASSIST: - __P4SETMASK(xa); - break; - case PMC_EV_P4_MACHINE_CLEAR: - __P4SETMASK(machclr); - break; - default: - return (-1); - } - - /* process additional flags */ - while ((p = strsep(&ctrspec, ",")) != NULL) { - if (KWPREFIXMATCH(p, P4_KW_ACTIVE)) { - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - - if (strcasecmp(q, P4_KW_ACTIVE_NONE) == 0) - cccractivemask = 0x0; - else if (strcasecmp(q, P4_KW_ACTIVE_SINGLE) == 0) - cccractivemask = 0x1; - else if (strcasecmp(q, P4_KW_ACTIVE_BOTH) == 0) - cccractivemask = 0x2; - else if (strcasecmp(q, P4_KW_ACTIVE_ANY) == 0) - cccractivemask = 0x3; - else - return (-1); - - } else if (KWPREFIXMATCH(p, P4_KW_BUSREQTYPE)) { - if (has_busreqtype == 0) - return (-1); - - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - - count = strtol(q, &e, 0); - if (e == q || *e != '\0') - return (-1); - evmask = (evmask & ~0x1F) | (count & 0x1F); - } else if (KWMATCH(p, P4_KW_CASCADE)) - pmc_config->pm_caps |= PMC_CAP_CASCADE; - else if (KWMATCH(p, P4_KW_EDGE)) - pmc_config->pm_caps |= PMC_CAP_EDGE; - else if (KWMATCH(p, P4_KW_INV)) - pmc_config->pm_caps |= PMC_CAP_INVERT; - else if (KWPREFIXMATCH(p, P4_KW_MASK "=")) { - if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0) - return (-1); - pmc_config->pm_caps |= PMC_CAP_QUALIFIER; - } else if (KWMATCH(p, P4_KW_OS)) - pmc_config->pm_caps |= PMC_CAP_SYSTEM; - else if (KWMATCH(p, P4_KW_PRECISE)) - pmc_config->pm_caps |= PMC_CAP_PRECISE; - else if (KWPREFIXMATCH(p, P4_KW_TAG "=")) { - if (has_tag == 0) - return (-1); - - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - - count = strtol(q, &e, 0); - if (e == q || *e != '\0') - return (-1); - - pmc_config->pm_caps |= PMC_CAP_TAGGING; - pmc_config->pm_md.pm_p4.pm_p4_escrconfig |= - P4_ESCR_TO_TAG_VALUE(count); - } else if (KWPREFIXMATCH(p, P4_KW_THRESHOLD "=")) { - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - - count = strtol(q, &e, 0); - if (e == q || *e != '\0') - return (-1); - - pmc_config->pm_caps |= PMC_CAP_THRESHOLD; - pmc_config->pm_md.pm_p4.pm_p4_cccrconfig &= - ~P4_CCCR_THRESHOLD_MASK; - pmc_config->pm_md.pm_p4.pm_p4_cccrconfig |= - P4_CCCR_TO_THRESHOLD(count); - } else if (KWMATCH(p, P4_KW_USR)) - pmc_config->pm_caps |= PMC_CAP_USER; - else - return (-1); - } - - /* other post processing */ - if (pe == PMC_EV_P4_IOQ_ALLOCATION || - pe == PMC_EV_P4_FSB_DATA_ACTIVITY || - pe == PMC_EV_P4_BSQ_ALLOCATION) - pmc_config->pm_caps |= PMC_CAP_EDGE; - - /* fill in thread activity mask */ - pmc_config->pm_md.pm_p4.pm_p4_cccrconfig |= - P4_CCCR_TO_ACTIVE_THREAD(cccractivemask); - - if (evmask) - pmc_config->pm_caps |= PMC_CAP_QUALIFIER; - - switch (pe) { - case PMC_EV_P4_FSB_DATA_ACTIVITY: - if ((evmask & 0x06) == 0x06 || - (evmask & 0x18) == 0x18) - return (-1); /* can't have own+other bits together */ - if (evmask == 0) /* default:drdy-{drv,own}+dbsy{drv,own} */ - evmask = 0x1D; - break; - case PMC_EV_P4_MACHINE_CLEAR: - /* only one bit is allowed to be set */ - if ((evmask & (evmask - 1)) != 0) - return (-1); - if (evmask == 0) { - evmask = 0x1; /* 'CLEAR' */ - pmc_config->pm_caps |= PMC_CAP_QUALIFIER; - } - break; - default: - if (evmask == 0 && pmask) { - for (pm = pmask; pm->pm_name; pm++) - evmask |= pm->pm_value; - pmc_config->pm_caps |= PMC_CAP_QUALIFIER; - } - } - - pmc_config->pm_md.pm_p4.pm_p4_escrconfig = - P4_ESCR_TO_EVENT_MASK(evmask); - - return (0); -} - -#endif - -#if defined(__i386__) - -/* - * Pentium style PMCs - */ - -static struct pmc_event_alias p5_aliases[] = { - EV_ALIAS("branches", "p5-taken-branches"), - EV_ALIAS("cycles", "tsc"), - EV_ALIAS("dc-misses", "p5-data-read-miss-or-write-miss"), - EV_ALIAS("ic-misses", "p5-code-cache-miss"), - EV_ALIAS("instructions", "p5-instructions-executed"), - EV_ALIAS("interrupts", "p5-hardware-interrupts"), - EV_ALIAS("unhalted-cycles", - "p5-number-of-cycles-not-in-halt-state"), - EV_ALIAS(NULL, NULL) -}; - -static int -p5_allocate_pmc(enum pmc_event pe, char *ctrspec, - struct pmc_op_pmcallocate *pmc_config) -{ - return (-1 || pe || ctrspec || pmc_config); /* shut up gcc */ -} - -/* - * Pentium Pro style PMCs. These PMCs are found in Pentium II, Pentium III, - * and Pentium M CPUs. - */ - -static struct pmc_event_alias p6_aliases[] = { - EV_ALIAS("branches", "p6-br-inst-retired"), - EV_ALIAS("branch-mispredicts", "p6-br-miss-pred-retired"), - EV_ALIAS("cycles", "tsc"), - EV_ALIAS("dc-misses", "p6-dcu-lines-in"), - EV_ALIAS("ic-misses", "p6-ifu-fetch-miss"), - EV_ALIAS("instructions", "p6-inst-retired"), - EV_ALIAS("interrupts", "p6-hw-int-rx"), - EV_ALIAS("unhalted-cycles", "p6-cpu-clk-unhalted"), - EV_ALIAS(NULL, NULL) -}; - -#define P6_KW_CMASK "cmask" -#define P6_KW_EDGE "edge" -#define P6_KW_INV "inv" -#define P6_KW_OS "os" -#define P6_KW_UMASK "umask" -#define P6_KW_USR "usr" - -static struct pmc_masks p6_mask_mesi[] = { - PMCMASK(m, 0x01), - PMCMASK(e, 0x02), - PMCMASK(s, 0x04), - PMCMASK(i, 0x08), - NULLMASK -}; - -static struct pmc_masks p6_mask_mesihw[] = { - PMCMASK(m, 0x01), - PMCMASK(e, 0x02), - PMCMASK(s, 0x04), - PMCMASK(i, 0x08), - PMCMASK(nonhw, 0x00), - PMCMASK(hw, 0x10), - PMCMASK(both, 0x30), - NULLMASK -}; - -static struct pmc_masks p6_mask_hw[] = { - PMCMASK(nonhw, 0x00), - PMCMASK(hw, 0x10), - PMCMASK(both, 0x30), - NULLMASK -}; - -static struct pmc_masks p6_mask_any[] = { - PMCMASK(self, 0x00), - PMCMASK(any, 0x20), - NULLMASK -}; - -static struct pmc_masks p6_mask_ekp[] = { - PMCMASK(nta, 0x00), - PMCMASK(t1, 0x01), - PMCMASK(t2, 0x02), - PMCMASK(wos, 0x03), - NULLMASK -}; - -static struct pmc_masks p6_mask_pps[] = { - PMCMASK(packed-and-scalar, 0x00), - PMCMASK(scalar, 0x01), - NULLMASK -}; - -static struct pmc_masks p6_mask_mite[] = { - PMCMASK(packed-multiply, 0x01), - PMCMASK(packed-shift, 0x02), - PMCMASK(pack, 0x04), - PMCMASK(unpack, 0x08), - PMCMASK(packed-logical, 0x10), - PMCMASK(packed-arithmetic, 0x20), - NULLMASK -}; - -static struct pmc_masks p6_mask_fmt[] = { - PMCMASK(mmxtofp, 0x00), - PMCMASK(fptommx, 0x01), - NULLMASK -}; - -static struct pmc_masks p6_mask_sr[] = { - PMCMASK(es, 0x01), - PMCMASK(ds, 0x02), - PMCMASK(fs, 0x04), - PMCMASK(gs, 0x08), - NULLMASK -}; - -static struct pmc_masks p6_mask_eet[] = { - PMCMASK(all, 0x00), - PMCMASK(freq, 0x02), - NULLMASK -}; - -static struct pmc_masks p6_mask_efur[] = { - PMCMASK(all, 0x00), - PMCMASK(loadop, 0x01), - PMCMASK(stdsta, 0x02), - NULLMASK -}; - -static struct pmc_masks p6_mask_essir[] = { - PMCMASK(sse-packed-single, 0x00), - PMCMASK(sse-packed-single-scalar-single, 0x01), - PMCMASK(sse2-packed-double, 0x02), - PMCMASK(sse2-scalar-double, 0x03), - NULLMASK -}; - -static struct pmc_masks p6_mask_esscir[] = { - PMCMASK(sse-packed-single, 0x00), - PMCMASK(sse-scalar-single, 0x01), - PMCMASK(sse2-packed-double, 0x02), - PMCMASK(sse2-scalar-double, 0x03), - NULLMASK -}; - -/* P6 event parser */ -static int -p6_allocate_pmc(enum pmc_event pe, char *ctrspec, - struct pmc_op_pmcallocate *pmc_config) -{ - char *e, *p, *q; - uint64_t evmask; - int count, n; - const struct pmc_masks *pm, *pmask; - - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); - pmc_config->pm_md.pm_ppro.pm_ppro_config = 0; - - evmask = 0; - -#define P6MASKSET(M) pmask = p6_mask_ ## M - - switch(pe) { - case PMC_EV_P6_L2_IFETCH: P6MASKSET(mesi); break; - case PMC_EV_P6_L2_LD: P6MASKSET(mesi); break; - case PMC_EV_P6_L2_ST: P6MASKSET(mesi); break; - case PMC_EV_P6_L2_RQSTS: P6MASKSET(mesi); break; - case PMC_EV_P6_BUS_DRDY_CLOCKS: - case PMC_EV_P6_BUS_LOCK_CLOCKS: - case PMC_EV_P6_BUS_TRAN_BRD: - case PMC_EV_P6_BUS_TRAN_RFO: - case PMC_EV_P6_BUS_TRANS_WB: - case PMC_EV_P6_BUS_TRAN_IFETCH: - case PMC_EV_P6_BUS_TRAN_INVAL: - case PMC_EV_P6_BUS_TRAN_PWR: - case PMC_EV_P6_BUS_TRANS_P: - case PMC_EV_P6_BUS_TRANS_IO: - case PMC_EV_P6_BUS_TRAN_DEF: - case PMC_EV_P6_BUS_TRAN_BURST: - case PMC_EV_P6_BUS_TRAN_ANY: - case PMC_EV_P6_BUS_TRAN_MEM: - P6MASKSET(any); break; - case PMC_EV_P6_EMON_KNI_PREF_DISPATCHED: - case PMC_EV_P6_EMON_KNI_PREF_MISS: - P6MASKSET(ekp); break; - case PMC_EV_P6_EMON_KNI_INST_RETIRED: - case PMC_EV_P6_EMON_KNI_COMP_INST_RET: - P6MASKSET(pps); break; - case PMC_EV_P6_MMX_INSTR_TYPE_EXEC: - P6MASKSET(mite); break; - case PMC_EV_P6_FP_MMX_TRANS: - P6MASKSET(fmt); break; - case PMC_EV_P6_SEG_RENAME_STALLS: - case PMC_EV_P6_SEG_REG_RENAMES: - P6MASKSET(sr); break; - case PMC_EV_P6_EMON_EST_TRANS: - P6MASKSET(eet); break; - case PMC_EV_P6_EMON_FUSED_UOPS_RET: - P6MASKSET(efur); break; - case PMC_EV_P6_EMON_SSE_SSE2_INST_RETIRED: - P6MASKSET(essir); break; - case PMC_EV_P6_EMON_SSE_SSE2_COMP_INST_RETIRED: - P6MASKSET(esscir); break; - default: - pmask = NULL; - break; - } - - /* Pentium M PMCs have a few events with different semantics */ - if (cpu_info.pm_cputype == PMC_CPU_INTEL_PM) { - if (pe == PMC_EV_P6_L2_LD || - pe == PMC_EV_P6_L2_LINES_IN || - pe == PMC_EV_P6_L2_LINES_OUT) - P6MASKSET(mesihw); - else if (pe == PMC_EV_P6_L2_M_LINES_OUTM) - P6MASKSET(hw); - } - - /* Parse additional modifiers if present */ - while ((p = strsep(&ctrspec, ",")) != NULL) { - if (KWPREFIXMATCH(p, P6_KW_CMASK "=")) { - q = strchr(p, '='); - if (*++q == '\0') /* skip '=' */ - return (-1); - count = strtol(q, &e, 0); - if (e == q || *e != '\0') - return (-1); - pmc_config->pm_caps |= PMC_CAP_THRESHOLD; - pmc_config->pm_md.pm_ppro.pm_ppro_config |= - P6_EVSEL_TO_CMASK(count); - } else if (KWMATCH(p, P6_KW_EDGE)) { - pmc_config->pm_caps |= PMC_CAP_EDGE; - } else if (KWMATCH(p, P6_KW_INV)) { - pmc_config->pm_caps |= PMC_CAP_INVERT; - } else if (KWMATCH(p, P6_KW_OS)) { - pmc_config->pm_caps |= PMC_CAP_SYSTEM; - } else if (KWPREFIXMATCH(p, P6_KW_UMASK "=")) { - evmask = 0; - if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0) - return (-1); - if ((pe == PMC_EV_P6_BUS_DRDY_CLOCKS || - pe == PMC_EV_P6_BUS_LOCK_CLOCKS || - pe == PMC_EV_P6_BUS_TRAN_BRD || - pe == PMC_EV_P6_BUS_TRAN_RFO || - pe == PMC_EV_P6_BUS_TRAN_IFETCH || - pe == PMC_EV_P6_BUS_TRAN_INVAL || - pe == PMC_EV_P6_BUS_TRAN_PWR || - pe == PMC_EV_P6_BUS_TRAN_DEF || - pe == PMC_EV_P6_BUS_TRAN_BURST || - pe == PMC_EV_P6_BUS_TRAN_ANY || - pe == PMC_EV_P6_BUS_TRAN_MEM || - pe == PMC_EV_P6_BUS_TRANS_IO || - pe == PMC_EV_P6_BUS_TRANS_P || - pe == PMC_EV_P6_BUS_TRANS_WB || - pe == PMC_EV_P6_EMON_EST_TRANS || - pe == PMC_EV_P6_EMON_FUSED_UOPS_RET || - pe == PMC_EV_P6_EMON_KNI_COMP_INST_RET || - pe == PMC_EV_P6_EMON_KNI_INST_RETIRED || - pe == PMC_EV_P6_EMON_KNI_PREF_DISPATCHED || - pe == PMC_EV_P6_EMON_KNI_PREF_MISS || - pe == PMC_EV_P6_EMON_SSE_SSE2_COMP_INST_RETIRED || - pe == PMC_EV_P6_EMON_SSE_SSE2_INST_RETIRED || - pe == PMC_EV_P6_FP_MMX_TRANS) - && (n > 1)) /* Only one mask keyword is allowed. */ - return (-1); - pmc_config->pm_caps |= PMC_CAP_QUALIFIER; - } else if (KWMATCH(p, P6_KW_USR)) { - pmc_config->pm_caps |= PMC_CAP_USER; - } else - return (-1); - } - - /* post processing */ - switch (pe) { - - /* - * The following events default to an evmask of 0 - */ - - /* default => 'self' */ - case PMC_EV_P6_BUS_DRDY_CLOCKS: - case PMC_EV_P6_BUS_LOCK_CLOCKS: - case PMC_EV_P6_BUS_TRAN_BRD: - case PMC_EV_P6_BUS_TRAN_RFO: - case PMC_EV_P6_BUS_TRANS_WB: - case PMC_EV_P6_BUS_TRAN_IFETCH: - case PMC_EV_P6_BUS_TRAN_INVAL: - case PMC_EV_P6_BUS_TRAN_PWR: - case PMC_EV_P6_BUS_TRANS_P: - case PMC_EV_P6_BUS_TRANS_IO: - case PMC_EV_P6_BUS_TRAN_DEF: - case PMC_EV_P6_BUS_TRAN_BURST: - case PMC_EV_P6_BUS_TRAN_ANY: - case PMC_EV_P6_BUS_TRAN_MEM: - - /* default => 'nta' */ - case PMC_EV_P6_EMON_KNI_PREF_DISPATCHED: - case PMC_EV_P6_EMON_KNI_PREF_MISS: - - /* default => 'packed and scalar' */ - case PMC_EV_P6_EMON_KNI_INST_RETIRED: - case PMC_EV_P6_EMON_KNI_COMP_INST_RET: - - /* default => 'mmx to fp transitions' */ - case PMC_EV_P6_FP_MMX_TRANS: - - /* default => 'SSE Packed Single' */ - case PMC_EV_P6_EMON_SSE_SSE2_INST_RETIRED: - case PMC_EV_P6_EMON_SSE_SSE2_COMP_INST_RETIRED: - - /* default => 'all fused micro-ops' */ - case PMC_EV_P6_EMON_FUSED_UOPS_RET: - - /* default => 'all transitions' */ - case PMC_EV_P6_EMON_EST_TRANS: - break; - - case PMC_EV_P6_MMX_UOPS_EXEC: - evmask = 0x0F; /* only value allowed */ - break; - - default: - /* - * For all other events, set the default event mask - * to a logical OR of all the allowed event mask bits. - */ - if (evmask == 0 && pmask) { - for (pm = pmask; pm->pm_name; pm++) - evmask |= pm->pm_value; - pmc_config->pm_caps |= PMC_CAP_QUALIFIER; - } - - break; - } - - if (pmc_config->pm_caps & PMC_CAP_QUALIFIER) - pmc_config->pm_md.pm_ppro.pm_ppro_config |= - P6_EVSEL_TO_UMASK(evmask); - - return (0); -} - -#endif - #if defined(__i386__) || defined(__amd64__) static int tsc_allocate_pmc(enum pmc_event pe, char *ctrspec, @@ -2982,145 +1222,14 @@ pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames, ev = iaf_event_table; count = PMC_EVENT_TABLE_SIZE(iaf); break; - case PMC_CLASS_IAP: - /* - * Return the most appropriate set of event name - * spellings for the current CPU. - */ - switch (cpu_info.pm_cputype) { - default: - case PMC_CPU_INTEL_ATOM: - ev = atom_event_table; - count = PMC_EVENT_TABLE_SIZE(atom); - break; - case PMC_CPU_INTEL_ATOM_SILVERMONT: - ev = atom_silvermont_event_table; - count = PMC_EVENT_TABLE_SIZE(atom_silvermont); - break; - case PMC_CPU_INTEL_CORE: - ev = core_event_table; - count = PMC_EVENT_TABLE_SIZE(core); - break; - case PMC_CPU_INTEL_CORE2: - case PMC_CPU_INTEL_CORE2EXTREME: - ev = core2_event_table; - count = PMC_EVENT_TABLE_SIZE(core2); - break; - case PMC_CPU_INTEL_COREI7: - ev = corei7_event_table; - count = PMC_EVENT_TABLE_SIZE(corei7); - break; - case PMC_CPU_INTEL_NEHALEM_EX: - ev = nehalem_ex_event_table; - count = PMC_EVENT_TABLE_SIZE(nehalem_ex); - break; - case PMC_CPU_INTEL_HASWELL: - ev = haswell_event_table; - count = PMC_EVENT_TABLE_SIZE(haswell); - break; - case PMC_CPU_INTEL_HASWELL_XEON: - ev = haswell_xeon_event_table; - count = PMC_EVENT_TABLE_SIZE(haswell_xeon); - break; - case PMC_CPU_INTEL_BROADWELL: - ev = broadwell_event_table; - count = PMC_EVENT_TABLE_SIZE(broadwell); - break; - case PMC_CPU_INTEL_BROADWELL_XEON: - ev = broadwell_xeon_event_table; - count = PMC_EVENT_TABLE_SIZE(broadwell_xeon); - break; - case PMC_CPU_INTEL_SKYLAKE: - ev = skylake_event_table; - count = PMC_EVENT_TABLE_SIZE(skylake); - break; - case PMC_CPU_INTEL_SKYLAKE_XEON: - ev = skylake_xeon_event_table; - count = PMC_EVENT_TABLE_SIZE(skylake_xeon); - break; - case PMC_CPU_INTEL_IVYBRIDGE: - ev = ivybridge_event_table; - count = PMC_EVENT_TABLE_SIZE(ivybridge); - break; - case PMC_CPU_INTEL_IVYBRIDGE_XEON: - ev = ivybridge_xeon_event_table; - count = PMC_EVENT_TABLE_SIZE(ivybridge_xeon); - break; - case PMC_CPU_INTEL_SANDYBRIDGE: - ev = sandybridge_event_table; - count = PMC_EVENT_TABLE_SIZE(sandybridge); - break; - case PMC_CPU_INTEL_SANDYBRIDGE_XEON: - ev = sandybridge_xeon_event_table; - count = PMC_EVENT_TABLE_SIZE(sandybridge_xeon); - break; - case PMC_CPU_INTEL_WESTMERE: - ev = westmere_event_table; - count = PMC_EVENT_TABLE_SIZE(westmere); - break; - case PMC_CPU_INTEL_WESTMERE_EX: - ev = westmere_ex_event_table; - count = PMC_EVENT_TABLE_SIZE(westmere_ex); - break; - } - break; - case PMC_CLASS_UCF: - ev = ucf_event_table; - count = PMC_EVENT_TABLE_SIZE(ucf); - break; - case PMC_CLASS_UCP: - /* - * Return the most appropriate set of event name - * spellings for the current CPU. - */ - switch (cpu_info.pm_cputype) { - default: - case PMC_CPU_INTEL_COREI7: - ev = corei7uc_event_table; - count = PMC_EVENT_TABLE_SIZE(corei7uc); - break; - case PMC_CPU_INTEL_HASWELL: - ev = haswelluc_event_table; - count = PMC_EVENT_TABLE_SIZE(haswelluc); - break; - case PMC_CPU_INTEL_BROADWELL: - ev = broadwelluc_event_table; - count = PMC_EVENT_TABLE_SIZE(broadwelluc); - break; - case PMC_CPU_INTEL_SANDYBRIDGE: - ev = sandybridgeuc_event_table; - count = PMC_EVENT_TABLE_SIZE(sandybridgeuc); - break; - case PMC_CPU_INTEL_WESTMERE: - ev = westmereuc_event_table; - count = PMC_EVENT_TABLE_SIZE(westmereuc); - break; - } - break; case PMC_CLASS_TSC: ev = tsc_event_table; count = PMC_EVENT_TABLE_SIZE(tsc); break; - case PMC_CLASS_K7: - ev = k7_event_table; - count = PMC_EVENT_TABLE_SIZE(k7); - break; case PMC_CLASS_K8: ev = k8_event_table; count = PMC_EVENT_TABLE_SIZE(k8); break; - case PMC_CLASS_P4: - ev = p4_event_table; - count = PMC_EVENT_TABLE_SIZE(p4); - break; - case PMC_CLASS_P5: - ev = p5_event_table; - count = PMC_EVENT_TABLE_SIZE(p5); - break; - case PMC_CLASS_P6: - ev = p6_event_table; - count = PMC_EVENT_TABLE_SIZE(p6); - break; case PMC_CLASS_XSCALE: ev = xscale_event_table; count = PMC_EVENT_TABLE_SIZE(xscale); @@ -3356,98 +1465,11 @@ pmc_init(void) /* Configure the event name parser. */ switch (cpu_info.pm_cputype) { -#if defined(__i386__) - case PMC_CPU_AMD_K7: - PMC_MDEP_INIT(k7); - pmc_class_table[n] = &k7_class_table_descr; - break; - case PMC_CPU_INTEL_P5: - PMC_MDEP_INIT(p5); - pmc_class_table[n] = &p5_class_table_descr; - break; - case PMC_CPU_INTEL_P6: /* P6 ... Pentium M CPUs have */ - case PMC_CPU_INTEL_PII: /* similar PMCs. */ - case PMC_CPU_INTEL_PIII: - case PMC_CPU_INTEL_PM: - PMC_MDEP_INIT(p6); - pmc_class_table[n] = &p6_class_table_descr; - break; -#endif #if defined(__amd64__) || defined(__i386__) case PMC_CPU_AMD_K8: PMC_MDEP_INIT(k8); pmc_class_table[n] = &k8_class_table_descr; break; - case PMC_CPU_INTEL_ATOM: - PMC_MDEP_INIT_INTEL_V2(atom); - break; - case PMC_CPU_INTEL_ATOM_SILVERMONT: - PMC_MDEP_INIT_INTEL_V2(atom_silvermont); - break; - case PMC_CPU_INTEL_CORE: - PMC_MDEP_INIT(core); - pmc_class_table[n] = &core_class_table_descr; - break; - case PMC_CPU_INTEL_CORE2: - case PMC_CPU_INTEL_CORE2EXTREME: - PMC_MDEP_INIT_INTEL_V2(core2); - break; - case PMC_CPU_INTEL_COREI7: - pmc_class_table[n++] = &ucf_class_table_descr; - pmc_class_table[n++] = &corei7uc_class_table_descr; - PMC_MDEP_INIT_INTEL_V2(corei7); - break; - case PMC_CPU_INTEL_NEHALEM_EX: - PMC_MDEP_INIT_INTEL_V2(nehalem_ex); - break; - case PMC_CPU_INTEL_HASWELL: - pmc_class_table[n++] = &ucf_class_table_descr; - pmc_class_table[n++] = &haswelluc_class_table_descr; - PMC_MDEP_INIT_INTEL_V2(haswell); - break; - case PMC_CPU_INTEL_HASWELL_XEON: - PMC_MDEP_INIT_INTEL_V2(haswell_xeon); - break; - case PMC_CPU_INTEL_BROADWELL: - pmc_class_table[n++] = &ucf_class_table_descr; - pmc_class_table[n++] = &broadwelluc_class_table_descr; - PMC_MDEP_INIT_INTEL_V2(broadwell); - break; - case PMC_CPU_INTEL_BROADWELL_XEON: - PMC_MDEP_INIT_INTEL_V2(broadwell_xeon); - break; - case PMC_CPU_INTEL_SKYLAKE: - PMC_MDEP_INIT_INTEL_V2(skylake); - break; - case PMC_CPU_INTEL_SKYLAKE_XEON: - PMC_MDEP_INIT_INTEL_V2(skylake_xeon); - break; - case PMC_CPU_INTEL_IVYBRIDGE: - PMC_MDEP_INIT_INTEL_V2(ivybridge); - break; - case PMC_CPU_INTEL_IVYBRIDGE_XEON: - PMC_MDEP_INIT_INTEL_V2(ivybridge_xeon); - break; - case PMC_CPU_INTEL_SANDYBRIDGE: - pmc_class_table[n++] = &ucf_class_table_descr; - pmc_class_table[n++] = &sandybridgeuc_class_table_descr; - PMC_MDEP_INIT_INTEL_V2(sandybridge); - break; - case PMC_CPU_INTEL_SANDYBRIDGE_XEON: - PMC_MDEP_INIT_INTEL_V2(sandybridge_xeon); - break; - case PMC_CPU_INTEL_WESTMERE: - pmc_class_table[n++] = &ucf_class_table_descr; - pmc_class_table[n++] = &westmereuc_class_table_descr; - PMC_MDEP_INIT_INTEL_V2(westmere); - break; - case PMC_CPU_INTEL_WESTMERE_EX: - PMC_MDEP_INIT_INTEL_V2(westmere_ex); - break; - case PMC_CPU_INTEL_PIV: - PMC_MDEP_INIT(p4); - pmc_class_table[n] = &p4_class_table_descr; - break; #endif case PMC_CPU_GENERIC: PMC_MDEP_INIT(generic); @@ -3581,127 +1603,9 @@ _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu) const struct pmc_event_descr *ev, *evfence; ev = evfence = NULL; - if (pe >= PMC_EV_IAF_FIRST && pe <= PMC_EV_IAF_LAST) { - ev = iaf_event_table; - evfence = iaf_event_table + PMC_EVENT_TABLE_SIZE(iaf); - } else if (pe >= PMC_EV_IAP_FIRST && pe <= PMC_EV_IAP_LAST) { - switch (cpu) { - case PMC_CPU_INTEL_ATOM: - ev = atom_event_table; - evfence = atom_event_table + PMC_EVENT_TABLE_SIZE(atom); - break; - case PMC_CPU_INTEL_ATOM_SILVERMONT: - ev = atom_silvermont_event_table; - evfence = atom_silvermont_event_table + - PMC_EVENT_TABLE_SIZE(atom_silvermont); - break; - case PMC_CPU_INTEL_CORE: - ev = core_event_table; - evfence = core_event_table + PMC_EVENT_TABLE_SIZE(core); - break; - case PMC_CPU_INTEL_CORE2: - case PMC_CPU_INTEL_CORE2EXTREME: - ev = core2_event_table; - evfence = core2_event_table + PMC_EVENT_TABLE_SIZE(core2); - break; - case PMC_CPU_INTEL_COREI7: - ev = corei7_event_table; - evfence = corei7_event_table + PMC_EVENT_TABLE_SIZE(corei7); - break; - case PMC_CPU_INTEL_NEHALEM_EX: - ev = nehalem_ex_event_table; - evfence = nehalem_ex_event_table + - PMC_EVENT_TABLE_SIZE(nehalem_ex); - break; - case PMC_CPU_INTEL_HASWELL: - ev = haswell_event_table; - evfence = haswell_event_table + PMC_EVENT_TABLE_SIZE(haswell); - break; - case PMC_CPU_INTEL_HASWELL_XEON: - ev = haswell_xeon_event_table; - evfence = haswell_xeon_event_table + PMC_EVENT_TABLE_SIZE(haswell_xeon); - break; - case PMC_CPU_INTEL_BROADWELL: - ev = broadwell_event_table; - evfence = broadwell_event_table + PMC_EVENT_TABLE_SIZE(broadwell); - break; - case PMC_CPU_INTEL_BROADWELL_XEON: - ev = broadwell_xeon_event_table; - evfence = broadwell_xeon_event_table + PMC_EVENT_TABLE_SIZE(broadwell_xeon); - break; - case PMC_CPU_INTEL_SKYLAKE: - ev = skylake_event_table; - evfence = skylake_event_table + - PMC_EVENT_TABLE_SIZE(skylake); - break; - case PMC_CPU_INTEL_SKYLAKE_XEON: - ev = skylake_xeon_event_table; - evfence = skylake_xeon_event_table + - PMC_EVENT_TABLE_SIZE(skylake_xeon); - break; - case PMC_CPU_INTEL_IVYBRIDGE: - ev = ivybridge_event_table; - evfence = ivybridge_event_table + PMC_EVENT_TABLE_SIZE(ivybridge); - break; - case PMC_CPU_INTEL_IVYBRIDGE_XEON: - ev = ivybridge_xeon_event_table; - evfence = ivybridge_xeon_event_table + PMC_EVENT_TABLE_SIZE(ivybridge_xeon); - break; - case PMC_CPU_INTEL_SANDYBRIDGE: - ev = sandybridge_event_table; - evfence = sandybridge_event_table + PMC_EVENT_TABLE_SIZE(sandybridge); - break; - case PMC_CPU_INTEL_SANDYBRIDGE_XEON: - ev = sandybridge_xeon_event_table; - evfence = sandybridge_xeon_event_table + PMC_EVENT_TABLE_SIZE(sandybridge_xeon); - break; - case PMC_CPU_INTEL_WESTMERE: - ev = westmere_event_table; - evfence = westmere_event_table + PMC_EVENT_TABLE_SIZE(westmere); - break; - case PMC_CPU_INTEL_WESTMERE_EX: - ev = westmere_ex_event_table; - evfence = westmere_ex_event_table + - PMC_EVENT_TABLE_SIZE(westmere_ex); - break; - default: /* Unknown CPU type. */ - break; - } - } else if (pe >= PMC_EV_UCF_FIRST && pe <= PMC_EV_UCF_LAST) { - ev = ucf_event_table; - evfence = ucf_event_table + PMC_EVENT_TABLE_SIZE(ucf); - } else if (pe >= PMC_EV_UCP_FIRST && pe <= PMC_EV_UCP_LAST) { - switch (cpu) { - case PMC_CPU_INTEL_COREI7: - ev = corei7uc_event_table; - evfence = corei7uc_event_table + PMC_EVENT_TABLE_SIZE(corei7uc); - break; - case PMC_CPU_INTEL_SANDYBRIDGE: - ev = sandybridgeuc_event_table; - evfence = sandybridgeuc_event_table + PMC_EVENT_TABLE_SIZE(sandybridgeuc); - break; - case PMC_CPU_INTEL_WESTMERE: - ev = westmereuc_event_table; - evfence = westmereuc_event_table + PMC_EVENT_TABLE_SIZE(westmereuc); - break; - default: /* Unknown CPU type. */ - break; - } - } else if (pe >= PMC_EV_K7_FIRST && pe <= PMC_EV_K7_LAST) { - ev = k7_event_table; - evfence = k7_event_table + PMC_EVENT_TABLE_SIZE(k7); - } else if (pe >= PMC_EV_K8_FIRST && pe <= PMC_EV_K8_LAST) { + if (pe >= PMC_EV_K8_FIRST && pe <= PMC_EV_K8_LAST) { ev = k8_event_table; evfence = k8_event_table + PMC_EVENT_TABLE_SIZE(k8); - } else if (pe >= PMC_EV_P4_FIRST && pe <= PMC_EV_P4_LAST) { - ev = p4_event_table; - evfence = p4_event_table + PMC_EVENT_TABLE_SIZE(p4); - } else if (pe >= PMC_EV_P5_FIRST && pe <= PMC_EV_P5_LAST) { - ev = p5_event_table; - evfence = p5_event_table + PMC_EVENT_TABLE_SIZE(p5); - } else if (pe >= PMC_EV_P6_FIRST && pe <= PMC_EV_P6_LAST) { - ev = p6_event_table; - evfence = p6_event_table + PMC_EVENT_TABLE_SIZE(p6); } else if (pe >= PMC_EV_XSCALE_FIRST && pe <= PMC_EV_XSCALE_LAST) { ev = xscale_event_table; evfence = xscale_event_table + PMC_EVENT_TABLE_SIZE(xscale); diff --git a/sys/amd64/include/pmc_mdep.h b/sys/amd64/include/pmc_mdep.h index 58354707cf19..635d880f7f12 100644 --- a/sys/amd64/include/pmc_mdep.h +++ b/sys/amd64/include/pmc_mdep.h @@ -43,7 +43,6 @@ struct pmc_mdep; #include #include -#include #include #include @@ -78,7 +77,6 @@ union pmc_md_op_pmcallocate { struct pmc_md_iap_op_pmcallocate pm_iap; struct pmc_md_ucf_op_pmcallocate pm_ucf; struct pmc_md_ucp_op_pmcallocate pm_ucp; - struct pmc_md_p4_op_pmcallocate pm_p4; uint64_t __pad[4]; }; @@ -94,7 +92,6 @@ union pmc_md_pmc { struct pmc_md_iap_pmc pm_iap; struct pmc_md_ucf_pmc pm_ucf; struct pmc_md_ucp_pmc pm_ucp; - struct pmc_md_p4_pmc pm_p4; }; #define PMC_TRAPFRAME_TO_PC(TF) ((TF)->tf_rip) diff --git a/sys/conf/files.amd64 b/sys/conf/files.amd64 index 97a1ecef924e..1de5fde27f7b 100644 --- a/sys/conf/files.amd64 +++ b/sys/conf/files.amd64 @@ -316,7 +316,6 @@ dev/hwpmc/hwpmc_amd.c optional hwpmc dev/hwpmc/hwpmc_intel.c optional hwpmc dev/hwpmc/hwpmc_core.c optional hwpmc dev/hwpmc/hwpmc_uncore.c optional hwpmc -dev/hwpmc/hwpmc_piv.c optional hwpmc dev/hwpmc/hwpmc_tsc.c optional hwpmc dev/hwpmc/hwpmc_x86.c optional hwpmc dev/hyperv/input/hv_kbd.c optional hyperv diff --git a/sys/conf/files.i386 b/sys/conf/files.i386 index e06c4f6fb57c..513c35363cff 100644 --- a/sys/conf/files.i386 +++ b/sys/conf/files.i386 @@ -234,9 +234,6 @@ dev/hwpmc/hwpmc_amd.c optional hwpmc dev/hwpmc/hwpmc_intel.c optional hwpmc dev/hwpmc/hwpmc_core.c optional hwpmc dev/hwpmc/hwpmc_uncore.c optional hwpmc -dev/hwpmc/hwpmc_pentium.c optional hwpmc -dev/hwpmc/hwpmc_piv.c optional hwpmc -dev/hwpmc/hwpmc_ppro.c optional hwpmc dev/hwpmc/hwpmc_tsc.c optional hwpmc dev/hwpmc/hwpmc_x86.c optional hwpmc dev/hyperv/pcib/vmbus_pcib.c optional hyperv pci diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index ff7d7a3ffae9..cf2e17955a15 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -242,8 +242,7 @@ iaf_allocate_pmc(int cpu, int ri, struct pmc *pm, return (EINVAL); ev = pm->pm_event; - if (ev < PMC_EV_IAF_FIRST || ev > PMC_EV_IAF_LAST) - return (EINVAL); + if (ev == PMC_EV_IAF_INSTR_RETIRED_ANY && ri != 0) return (EINVAL); diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index 5b289f5210b4..d54c8761bec5 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -97,30 +97,8 @@ pmc_intel_initialize(void) snprintf(pmc_cpuid, sizeof(pmc_cpuid), "GenuineIntel-%d-%02X", (cpu_id & 0xF00) >> 8, model); switch (cpu_id & 0xF00) { -#if defined(__i386__) - case 0x500: /* Pentium family processors */ - cputype = PMC_CPU_INTEL_P5; - break; -#endif case 0x600: /* Pentium Pro, Celeron, Pentium II & III */ switch (model) { -#if defined(__i386__) - case 0x1: - cputype = PMC_CPU_INTEL_P6; - break; - case 0x3: case 0x5: - cputype = PMC_CPU_INTEL_PII; - break; - case 0x6: case 0x16: - cputype = PMC_CPU_INTEL_CL; - break; - case 0x7: case 0x8: case 0xA: case 0xB: - cputype = PMC_CPU_INTEL_PIII; - break; - case 0x9: case 0xD: - cputype = PMC_CPU_INTEL_PM; - break; -#endif case 0xE: cputype = PMC_CPU_INTEL_CORE; break; @@ -223,13 +201,8 @@ pmc_intel_initialize(void) break; } break; -#if defined(__i386__) || defined(__amd64__) - case 0xF00: /* P4 */ - if (model >= 0 && model <= 6) /* known models */ - cputype = PMC_CPU_INTEL_PIV; - break; } -#endif + if ((int) cputype == -1) { printf("pmc: Unknown Intel CPU.\n"); @@ -248,7 +221,6 @@ pmc_intel_initialize(void) if (error) goto error; switch (cputype) { -#if defined(__i386__) || defined(__amd64__) /* * Intel Core, Core 2 and Atom processors. */ @@ -274,37 +246,6 @@ pmc_intel_initialize(void) error = pmc_core_initialize(pmc_mdep, ncpus, verov); break; - /* - * Intel Pentium 4 Processors, and P4/EMT64 processors. - */ - - case PMC_CPU_INTEL_PIV: - error = pmc_p4_initialize(pmc_mdep, ncpus); - break; -#endif - -#if defined(__i386__) - /* - * P6 Family Processors - */ - - case PMC_CPU_INTEL_P6: - case PMC_CPU_INTEL_CL: - case PMC_CPU_INTEL_PII: - case PMC_CPU_INTEL_PIII: - case PMC_CPU_INTEL_PM: - error = pmc_p6_initialize(pmc_mdep, ncpus); - break; - - /* - * Intel Pentium PMCs. - */ - - case PMC_CPU_INTEL_P5: - error = pmc_p5_initialize(pmc_mdep, ncpus); - break; -#endif - default: KASSERT(0, ("[intel,%d] Unknown CPU type", __LINE__)); } @@ -317,7 +258,6 @@ pmc_intel_initialize(void) /* * Init the uncore class. */ -#if defined(__i386__) || defined(__amd64__) switch (cputype) { /* * Intel Corei7 and Westmere processors. @@ -332,7 +272,6 @@ pmc_intel_initialize(void) default: break; } -#endif error: if (error) { pmc_mdep_free(pmc_mdep); @@ -348,7 +287,6 @@ pmc_intel_finalize(struct pmc_mdep *md) pmc_tsc_finalize(md); switch (md->pmd_cputype) { -#if defined(__i386__) || defined(__amd64__) case PMC_CPU_INTEL_ATOM: case PMC_CPU_INTEL_ATOM_SILVERMONT: case PMC_CPU_INTEL_BROADWELL: @@ -370,23 +308,6 @@ pmc_intel_finalize(struct pmc_mdep *md) case PMC_CPU_INTEL_IVYBRIDGE_XEON: pmc_core_finalize(md); break; - - case PMC_CPU_INTEL_PIV: - pmc_p4_finalize(md); - break; -#endif -#if defined(__i386__) - case PMC_CPU_INTEL_P6: - case PMC_CPU_INTEL_CL: - case PMC_CPU_INTEL_PII: - case PMC_CPU_INTEL_PIII: - case PMC_CPU_INTEL_PM: - pmc_p6_finalize(md); - break; - case PMC_CPU_INTEL_P5: - pmc_p5_finalize(md); - break; -#endif default: KASSERT(0, ("[intel,%d] unknown CPU type", __LINE__)); } @@ -394,7 +315,6 @@ pmc_intel_finalize(struct pmc_mdep *md) /* * Uncore. */ -#if defined(__i386__) || defined(__amd64__) switch (md->pmd_cputype) { case PMC_CPU_INTEL_BROADWELL: case PMC_CPU_INTEL_COREI7: @@ -406,5 +326,4 @@ pmc_intel_finalize(struct pmc_mdep *md) default: break; } -#endif } diff --git a/sys/dev/hwpmc/hwpmc_pentium.c b/sys/dev/hwpmc/hwpmc_pentium.c deleted file mode 100644 index 8da9d316718a..000000000000 --- a/sys/dev/hwpmc/hwpmc_pentium.c +++ /dev/null @@ -1,59 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2003-2005 Joseph Koshy - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* - * Intel Pentium PMCs - */ - -int -pmc_p5_initialize(struct pmc_mdep *pmc_mdep, int ncpus) -{ - (void) pmc_mdep; (void) ncpus; - return (ENOSYS); /* nothing here yet */ -} - -void -pmc_p5_finalize(struct pmc_mdep *pmc_mdep) -{ - (void) pmc_mdep; -} diff --git a/sys/dev/hwpmc/hwpmc_pentium.h b/sys/dev/hwpmc/hwpmc_pentium.h deleted file mode 100644 index c27c108a47a3..000000000000 --- a/sys/dev/hwpmc/hwpmc_pentium.h +++ /dev/null @@ -1,75 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2005, Joseph Koshy - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* Machine dependent interfaces */ - -#ifndef _DEV_HWPMC_PENTIUM_H_ -#define _DEV_HWPMC_PENTIUM_H_ 1 - -/* Intel Pentium PMCs */ - -#define PENTIUM_NPMCS 2 -#define PENTIUM_CESR_PC1 (1 << 25) -#define PENTIUM_CESR_CC1_MASK 0x01C00000 -#define PENTIUM_CESR_TO_CC1(C) (((C) & 0x07) << 22) -#define PENTIUM_CESR_ES1_MASK 0x003F0000 -#define PENTIUM_CESR_TO_ES1(E) (((E) & 0x3F) << 16) -#define PENTIUM_CESR_PC0 (1 << 9) -#define PENTIUM_CESR_CC0_MASK 0x000001C0 -#define PENTIUM_CESR_TO_CC0(C) (((C) & 0x07) << 6) -#define PENTIUM_CESR_ES0_MASK 0x0000003F -#define PENTIUM_CESR_TO_ES0(E) ((E) & 0x3F) -#define PENTIUM_CESR_RESERVED 0xFC00FC00 - -#define PENTIUM_MSR_CESR 0x11 -#define PENTIUM_MSR_CTR0 0x12 -#define PENTIUM_MSR_CTR1 0x13 - -struct pmc_md_pentium_op_pmcallocate { - uint32_t pm_pentium_config; -}; - -#ifdef _KERNEL - -/* MD extension for 'struct pmc' */ -struct pmc_md_pentium_pmc { - uint32_t pm_pentium_cesr; -}; - - -/* - * Prototypes - */ - -int pmc_p5_initialize(struct pmc_mdep *_md, int _ncpus); -void pmc_p5_finalize(struct pmc_mdep *_md); - -#endif /* _KERNEL */ -#endif /* _DEV_HWPMC_PENTIUM_H_ */ diff --git a/sys/dev/hwpmc/hwpmc_piv.c b/sys/dev/hwpmc/hwpmc_piv.c deleted file mode 100644 index 9e4b7b5894a7..000000000000 --- a/sys/dev/hwpmc/hwpmc_piv.c +++ /dev/null @@ -1,1702 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2003-2007 Joseph Koshy - * Copyright (c) 2007 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by A. Joseph Koshy under - * sponsorship from the FreeBSD Foundation and Google, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if (__FreeBSD_version >= 1100000) -#include -#else -#include -#endif -#include -#include -#include -#include -#include - -/* - * PENTIUM 4 SUPPORT - * - * The P4 has 18 PMCs, divided into 4 groups with 4,4,4 and 6 PMCs - * respectively. Each PMC comprises of two model specific registers: - * a counter configuration control register (CCCR) and a counter - * register that holds the actual event counts. - * - * Configuring an event requires the use of one of 45 event selection - * control registers (ESCR). Events are associated with specific - * ESCRs. Each PMC group has a set of ESCRs it can use. - * - * - The BPU counter group (4 PMCs) can use the 16 ESCRs: - * BPU_ESCR{0,1}, IS_ESCR{0,1}, MOB_ESCR{0,1}, ITLB_ESCR{0,1}, - * PMH_ESCR{0,1}, IX_ESCR{0,1}, FSB_ESCR{0,}, BSU_ESCR{0,1}. - * - * - The MS counter group (4 PMCs) can use the 6 ESCRs: MS_ESCR{0,1}, - * TC_ESCR{0,1}, TBPU_ESCR{0,1}. - * - * - The FLAME counter group (4 PMCs) can use the 10 ESCRs: - * FLAME_ESCR{0,1}, FIRM_ESCR{0,1}, SAAT_ESCR{0,1}, U2L_ESCR{0,1}, - * DAC_ESCR{0,1}. - * - * - The IQ counter group (6 PMCs) can use the 13 ESCRs: IQ_ESCR{0,1}, - * ALF_ESCR{0,1}, RAT_ESCR{0,1}, SSU_ESCR0, CRU_ESCR{0,1,2,3,4,5}. - * - * Even-numbered ESCRs can be used with counters 0, 1 and 4 (if - * present) of a counter group. Odd-numbers ESCRs can be used with - * counters 2, 3 and 5 (if present) of a counter group. The - * 'p4_escrs[]' table describes these restrictions in a form that - * function 'p4_allocate()' uses for making allocation decisions. - * - * SYSTEM-MODE AND THREAD-MODE ALLOCATION - * - * In addition to remembering the state of PMC rows - * ('FREE','STANDALONE', or 'THREAD'), we similar need to track the - * state of ESCR rows. If an ESCR is allocated to a system-mode PMC - * on a CPU we cannot allocate this to a thread-mode PMC. On a - * multi-cpu (multiple physical CPUs) system, ESCR allocation on each - * CPU is tracked by the pc_escrs[] array. - * - * Each system-mode PMC that is using an ESCR records its row-index in - * the appropriate entry and system-mode allocation attempts check - * that an ESCR is available using this array. Process-mode PMCs do - * not use the pc_escrs[] array, since ESCR row itself would have been - * marked as in 'THREAD' mode. - * - * HYPERTHREADING SUPPORT - * - * When HTT is enabled, the FreeBSD kernel treats the two 'logical' - * cpus as independent CPUs and can schedule kernel threads on them - * independently. However, the two logical CPUs share the same set of - * PMC resources. We need to ensure that: - * - PMCs that use the PMC_F_DESCENDANTS semantics are handled correctly, - * and, - * - Threads of multi-threaded processes that get scheduled on the same - * physical CPU are handled correctly. - * - * HTT Detection - * - * Not all HTT capable systems will have HTT enabled. We detect the - * presence of HTT by detecting if 'p4_init()' was called for a secondary - * CPU in a HTT pair. - * - * Note that hwpmc(4) cannot currently deal with a change in HTT status once - * loaded. - * - * Handling HTT READ / WRITE / START / STOP - * - * PMC resources are shared across the CPUs in an HTT pair. We - * designate the lower numbered CPU in a HTT pair as the 'primary' - * CPU. In each primary CPU's state we keep track of a 'runcount' - * which reflects the number of PMC-using processes that have been - * scheduled on its secondary CPU. Process-mode PMC operations will - * actually 'start' or 'stop' hardware only if these are the first or - * last processes respectively to use the hardware. PMC values - * written by a 'write' operation are saved and are transferred to - * hardware at PMC 'start' time if the runcount is 0. If the runcount - * is greater than 0 at the time of a 'start' operation, we keep track - * of the actual hardware value at the time of the 'start' operation - * and use this to adjust the final readings at PMC 'stop' or 'read' - * time. - * - * Execution sequences: - * - * Case 1: CPUx +...- (no overlap) - * CPUy +...- - * RC 0 1 0 1 0 - * - * Case 2: CPUx +........- (partial overlap) - * CPUy +........- - * RC 0 1 2 1 0 - * - * Case 3: CPUx +..............- (fully overlapped) - * CPUy +.....- - * RC 0 1 2 1 0 - * - * Key: - * 'CPU[xy]' : one of the two logical processors on a HTT CPU. - * 'RC' : run count (#threads per physical core). - * '+' : point in time when a thread is put on a CPU. - * '-' : point in time where a thread is taken off a CPU. - * - * Handling HTT CONFIG - * - * Different processes attached to the same PMC may get scheduled on - * the two logical processors in the package. We keep track of config - * and de-config operations using the CFGFLAGS fields of the per-physical - * cpu state. - */ - -#define P4_PMCS() \ - P4_PMC(BPU_COUNTER0) \ - P4_PMC(BPU_COUNTER1) \ - P4_PMC(BPU_COUNTER2) \ - P4_PMC(BPU_COUNTER3) \ - P4_PMC(MS_COUNTER0) \ - P4_PMC(MS_COUNTER1) \ - P4_PMC(MS_COUNTER2) \ - P4_PMC(MS_COUNTER3) \ - P4_PMC(FLAME_COUNTER0) \ - P4_PMC(FLAME_COUNTER1) \ - P4_PMC(FLAME_COUNTER2) \ - P4_PMC(FLAME_COUNTER3) \ - P4_PMC(IQ_COUNTER0) \ - P4_PMC(IQ_COUNTER1) \ - P4_PMC(IQ_COUNTER2) \ - P4_PMC(IQ_COUNTER3) \ - P4_PMC(IQ_COUNTER4) \ - P4_PMC(IQ_COUNTER5) \ - P4_PMC(NONE) - -enum pmc_p4pmc { -#undef P4_PMC -#define P4_PMC(N) P4_PMC_##N , - P4_PMCS() -}; - -/* - * P4 ESCR descriptors - */ - -#define P4_ESCRS() \ - P4_ESCR(BSU_ESCR0, 0x3A0, BPU_COUNTER0, BPU_COUNTER1, NONE) \ - P4_ESCR(BSU_ESCR1, 0x3A1, BPU_COUNTER2, BPU_COUNTER3, NONE) \ - P4_ESCR(FSB_ESCR0, 0x3A2, BPU_COUNTER0, BPU_COUNTER1, NONE) \ - P4_ESCR(FSB_ESCR1, 0x3A3, BPU_COUNTER2, BPU_COUNTER3, NONE) \ - P4_ESCR(FIRM_ESCR0, 0x3A4, FLAME_COUNTER0, FLAME_COUNTER1, NONE) \ - P4_ESCR(FIRM_ESCR1, 0x3A5, FLAME_COUNTER2, FLAME_COUNTER3, NONE) \ - P4_ESCR(FLAME_ESCR0, 0x3A6, FLAME_COUNTER0, FLAME_COUNTER1, NONE) \ - P4_ESCR(FLAME_ESCR1, 0x3A7, FLAME_COUNTER2, FLAME_COUNTER3, NONE) \ - P4_ESCR(DAC_ESCR0, 0x3A8, FLAME_COUNTER0, FLAME_COUNTER1, NONE) \ - P4_ESCR(DAC_ESCR1, 0x3A9, FLAME_COUNTER2, FLAME_COUNTER3, NONE) \ - P4_ESCR(MOB_ESCR0, 0x3AA, BPU_COUNTER0, BPU_COUNTER1, NONE) \ - P4_ESCR(MOB_ESCR1, 0x3AB, BPU_COUNTER2, BPU_COUNTER3, NONE) \ - P4_ESCR(PMH_ESCR0, 0x3AC, BPU_COUNTER0, BPU_COUNTER1, NONE) \ - P4_ESCR(PMH_ESCR1, 0x3AD, BPU_COUNTER2, BPU_COUNTER3, NONE) \ - P4_ESCR(SAAT_ESCR0, 0x3AE, FLAME_COUNTER0, FLAME_COUNTER1, NONE) \ - P4_ESCR(SAAT_ESCR1, 0x3AF, FLAME_COUNTER2, FLAME_COUNTER3, NONE) \ - P4_ESCR(U2L_ESCR0, 0x3B0, FLAME_COUNTER0, FLAME_COUNTER1, NONE) \ - P4_ESCR(U2L_ESCR1, 0x3B1, FLAME_COUNTER2, FLAME_COUNTER3, NONE) \ - P4_ESCR(BPU_ESCR0, 0x3B2, BPU_COUNTER0, BPU_COUNTER1, NONE) \ - P4_ESCR(BPU_ESCR1, 0x3B3, BPU_COUNTER2, BPU_COUNTER3, NONE) \ - P4_ESCR(IS_ESCR0, 0x3B4, BPU_COUNTER0, BPU_COUNTER1, NONE) \ - P4_ESCR(IS_ESCR1, 0x3B5, BPU_COUNTER2, BPU_COUNTER3, NONE) \ - P4_ESCR(ITLB_ESCR0, 0x3B6, BPU_COUNTER0, BPU_COUNTER1, NONE) \ - P4_ESCR(ITLB_ESCR1, 0x3B7, BPU_COUNTER2, BPU_COUNTER3, NONE) \ - P4_ESCR(CRU_ESCR0, 0x3B8, IQ_COUNTER0, IQ_COUNTER1, IQ_COUNTER4) \ - P4_ESCR(CRU_ESCR1, 0x3B9, IQ_COUNTER2, IQ_COUNTER3, IQ_COUNTER5) \ - P4_ESCR(IQ_ESCR0, 0x3BA, IQ_COUNTER0, IQ_COUNTER1, IQ_COUNTER4) \ - P4_ESCR(IQ_ESCR1, 0x3BB, IQ_COUNTER1, IQ_COUNTER3, IQ_COUNTER5) \ - P4_ESCR(RAT_ESCR0, 0x3BC, IQ_COUNTER0, IQ_COUNTER1, IQ_COUNTER4) \ - P4_ESCR(RAT_ESCR1, 0x3BD, IQ_COUNTER2, IQ_COUNTER3, IQ_COUNTER5) \ - P4_ESCR(SSU_ESCR0, 0x3BE, IQ_COUNTER0, IQ_COUNTER2, IQ_COUNTER4) \ - P4_ESCR(MS_ESCR0, 0x3C0, MS_COUNTER0, MS_COUNTER1, NONE) \ - P4_ESCR(MS_ESCR1, 0x3C1, MS_COUNTER2, MS_COUNTER3, NONE) \ - P4_ESCR(TBPU_ESCR0, 0x3C2, MS_COUNTER0, MS_COUNTER1, NONE) \ - P4_ESCR(TBPU_ESCR1, 0x3C3, MS_COUNTER2, MS_COUNTER3, NONE) \ - P4_ESCR(TC_ESCR0, 0x3C4, MS_COUNTER0, MS_COUNTER1, NONE) \ - P4_ESCR(TC_ESCR1, 0x3C5, MS_COUNTER2, MS_COUNTER3, NONE) \ - P4_ESCR(IX_ESCR0, 0x3C8, BPU_COUNTER0, BPU_COUNTER1, NONE) \ - P4_ESCR(IX_ESCR1, 0x3C9, BPU_COUNTER2, BPU_COUNTER3, NONE) \ - P4_ESCR(ALF_ESCR0, 0x3CA, IQ_COUNTER0, IQ_COUNTER1, IQ_COUNTER4) \ - P4_ESCR(ALF_ESCR1, 0x3CB, IQ_COUNTER2, IQ_COUNTER3, IQ_COUNTER5) \ - P4_ESCR(CRU_ESCR2, 0x3CC, IQ_COUNTER0, IQ_COUNTER1, IQ_COUNTER4) \ - P4_ESCR(CRU_ESCR3, 0x3CD, IQ_COUNTER2, IQ_COUNTER3, IQ_COUNTER5) \ - P4_ESCR(CRU_ESCR4, 0x3E0, IQ_COUNTER0, IQ_COUNTER1, IQ_COUNTER4) \ - P4_ESCR(CRU_ESCR5, 0x3E1, IQ_COUNTER2, IQ_COUNTER3, IQ_COUNTER5) \ - P4_ESCR(NONE, ~0, NONE, NONE, NONE) - -enum pmc_p4escr { -#define P4_ESCR(N, MSR, P1, P2, P3) P4_ESCR_##N , - P4_ESCRS() -#undef P4_ESCR -}; - -struct pmc_p4escr_descr { - const char pm_escrname[PMC_NAME_MAX]; - u_short pm_escr_msr; - const enum pmc_p4pmc pm_pmcs[P4_MAX_PMC_PER_ESCR]; -}; - -static struct pmc_p4escr_descr p4_escrs[] = -{ -#define P4_ESCR(N, MSR, P1, P2, P3) \ - { \ - .pm_escrname = #N, \ - .pm_escr_msr = (MSR), \ - .pm_pmcs = \ - { \ - P4_PMC_##P1, \ - P4_PMC_##P2, \ - P4_PMC_##P3 \ - } \ - } , - - P4_ESCRS() - -#undef P4_ESCR -}; - -/* - * P4 Event descriptor - */ - -struct p4_event_descr { - const enum pmc_event pm_event; - const uint32_t pm_escr_eventselect; - const uint32_t pm_cccr_select; - const char pm_is_ti_event; - enum pmc_p4escr pm_escrs[P4_MAX_ESCR_PER_EVENT]; -}; - -static struct p4_event_descr p4_events[] = { - -#define P4_EVDESCR(NAME, ESCREVENTSEL, CCCRSEL, TI_EVENT, ESCR0, ESCR1) \ - { \ - .pm_event = PMC_EV_P4_##NAME, \ - .pm_escr_eventselect = (ESCREVENTSEL), \ - .pm_cccr_select = (CCCRSEL), \ - .pm_is_ti_event = (TI_EVENT), \ - .pm_escrs = \ - { \ - P4_ESCR_##ESCR0, \ - P4_ESCR_##ESCR1 \ - } \ - } - -P4_EVDESCR(TC_DELIVER_MODE, 0x01, 0x01, TRUE, TC_ESCR0, TC_ESCR1), -P4_EVDESCR(BPU_FETCH_REQUEST, 0x03, 0x00, FALSE, BPU_ESCR0, BPU_ESCR1), -P4_EVDESCR(ITLB_REFERENCE, 0x18, 0x03, FALSE, ITLB_ESCR0, ITLB_ESCR1), -P4_EVDESCR(MEMORY_CANCEL, 0x02, 0x05, FALSE, DAC_ESCR0, DAC_ESCR1), -P4_EVDESCR(MEMORY_COMPLETE, 0x08, 0x02, FALSE, SAAT_ESCR0, SAAT_ESCR1), -P4_EVDESCR(LOAD_PORT_REPLAY, 0x04, 0x02, FALSE, SAAT_ESCR0, SAAT_ESCR1), -P4_EVDESCR(STORE_PORT_REPLAY, 0x05, 0x02, FALSE, SAAT_ESCR0, SAAT_ESCR1), -P4_EVDESCR(MOB_LOAD_REPLAY, 0x03, 0x02, FALSE, MOB_ESCR0, MOB_ESCR1), -P4_EVDESCR(PAGE_WALK_TYPE, 0x01, 0x04, TRUE, PMH_ESCR0, PMH_ESCR1), -P4_EVDESCR(BSQ_CACHE_REFERENCE, 0x0C, 0x07, FALSE, BSU_ESCR0, BSU_ESCR1), -P4_EVDESCR(IOQ_ALLOCATION, 0x03, 0x06, FALSE, FSB_ESCR0, FSB_ESCR1), -P4_EVDESCR(IOQ_ACTIVE_ENTRIES, 0x1A, 0x06, FALSE, FSB_ESCR1, NONE), -P4_EVDESCR(FSB_DATA_ACTIVITY, 0x17, 0x06, TRUE, FSB_ESCR0, FSB_ESCR1), -P4_EVDESCR(BSQ_ALLOCATION, 0x05, 0x07, FALSE, BSU_ESCR0, NONE), -P4_EVDESCR(BSQ_ACTIVE_ENTRIES, 0x06, 0x07, FALSE, BSU_ESCR1, NONE), - /* BSQ_ACTIVE_ENTRIES inherits CPU specificity from BSQ_ALLOCATION */ -P4_EVDESCR(SSE_INPUT_ASSIST, 0x34, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(PACKED_SP_UOP, 0x08, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(PACKED_DP_UOP, 0x0C, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(SCALAR_SP_UOP, 0x0A, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(SCALAR_DP_UOP, 0x0E, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(64BIT_MMX_UOP, 0x02, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(128BIT_MMX_UOP, 0x1A, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(X87_FP_UOP, 0x04, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(X87_SIMD_MOVES_UOP, 0x2E, 0x01, TRUE, FIRM_ESCR0, FIRM_ESCR1), -P4_EVDESCR(GLOBAL_POWER_EVENTS, 0x13, 0x06, FALSE, FSB_ESCR0, FSB_ESCR1), -P4_EVDESCR(TC_MS_XFER, 0x05, 0x00, FALSE, MS_ESCR0, MS_ESCR1), -P4_EVDESCR(UOP_QUEUE_WRITES, 0x09, 0x00, FALSE, MS_ESCR0, MS_ESCR1), -P4_EVDESCR(RETIRED_MISPRED_BRANCH_TYPE, - 0x05, 0x02, FALSE, TBPU_ESCR0, TBPU_ESCR1), -P4_EVDESCR(RETIRED_BRANCH_TYPE, 0x04, 0x02, FALSE, TBPU_ESCR0, TBPU_ESCR1), -P4_EVDESCR(RESOURCE_STALL, 0x01, 0x01, FALSE, ALF_ESCR0, ALF_ESCR1), -P4_EVDESCR(WC_BUFFER, 0x05, 0x05, TRUE, DAC_ESCR0, DAC_ESCR1), -P4_EVDESCR(B2B_CYCLES, 0x16, 0x03, TRUE, FSB_ESCR0, FSB_ESCR1), -P4_EVDESCR(BNR, 0x08, 0x03, TRUE, FSB_ESCR0, FSB_ESCR1), -P4_EVDESCR(SNOOP, 0x06, 0x03, TRUE, FSB_ESCR0, FSB_ESCR1), -P4_EVDESCR(RESPONSE, 0x04, 0x03, TRUE, FSB_ESCR0, FSB_ESCR1), -P4_EVDESCR(FRONT_END_EVENT, 0x08, 0x05, FALSE, CRU_ESCR2, CRU_ESCR3), -P4_EVDESCR(EXECUTION_EVENT, 0x0C, 0x05, FALSE, CRU_ESCR2, CRU_ESCR3), -P4_EVDESCR(REPLAY_EVENT, 0x09, 0x05, FALSE, CRU_ESCR2, CRU_ESCR3), -P4_EVDESCR(INSTR_RETIRED, 0x02, 0x04, FALSE, CRU_ESCR0, CRU_ESCR1), -P4_EVDESCR(UOPS_RETIRED, 0x01, 0x04, FALSE, CRU_ESCR0, CRU_ESCR1), -P4_EVDESCR(UOP_TYPE, 0x02, 0x02, FALSE, RAT_ESCR0, RAT_ESCR1), -P4_EVDESCR(BRANCH_RETIRED, 0x06, 0x05, FALSE, CRU_ESCR2, CRU_ESCR3), -P4_EVDESCR(MISPRED_BRANCH_RETIRED, 0x03, 0x04, FALSE, CRU_ESCR0, CRU_ESCR1), -P4_EVDESCR(X87_ASSIST, 0x03, 0x05, FALSE, CRU_ESCR2, CRU_ESCR3), -P4_EVDESCR(MACHINE_CLEAR, 0x02, 0x05, FALSE, CRU_ESCR2, CRU_ESCR3) - -#undef P4_EVDESCR -}; - -#define P4_EVENT_IS_TI(E) ((E)->pm_is_ti_event == TRUE) - -#define P4_NEVENTS (PMC_EV_P4_LAST - PMC_EV_P4_FIRST + 1) - -/* - * P4 PMC descriptors - */ - -struct p4pmc_descr { - struct pmc_descr pm_descr; /* common information */ - enum pmc_p4pmc pm_pmcnum; /* PMC number */ - uint32_t pm_pmc_msr; /* PERFCTR MSR address */ - uint32_t pm_cccr_msr; /* CCCR MSR address */ -}; - -static struct p4pmc_descr p4_pmcdesc[P4_NPMCS] = { -#define P4_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | PMC_CAP_SYSTEM | \ - PMC_CAP_EDGE | PMC_CAP_THRESHOLD | PMC_CAP_READ | PMC_CAP_WRITE | \ - PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE | \ - PMC_CAP_TAGGING | PMC_CAP_CASCADE) - -#define P4_PMCDESCR(N, PMC, CCCR) \ - { \ - .pm_descr = \ - { \ - .pd_name = #N, \ - .pd_class = PMC_CLASS_P4, \ - .pd_caps = P4_PMC_CAPS, \ - .pd_width = 40 \ - }, \ - .pm_pmcnum = P4_PMC_##N, \ - .pm_cccr_msr = (CCCR), \ - .pm_pmc_msr = (PMC) \ - } - - P4_PMCDESCR(BPU_COUNTER0, 0x300, 0x360), - P4_PMCDESCR(BPU_COUNTER1, 0x301, 0x361), - P4_PMCDESCR(BPU_COUNTER2, 0x302, 0x362), - P4_PMCDESCR(BPU_COUNTER3, 0x303, 0x363), - P4_PMCDESCR(MS_COUNTER0, 0x304, 0x364), - P4_PMCDESCR(MS_COUNTER1, 0x305, 0x365), - P4_PMCDESCR(MS_COUNTER2, 0x306, 0x366), - P4_PMCDESCR(MS_COUNTER3, 0x307, 0x367), - P4_PMCDESCR(FLAME_COUNTER0, 0x308, 0x368), - P4_PMCDESCR(FLAME_COUNTER1, 0x309, 0x369), - P4_PMCDESCR(FLAME_COUNTER2, 0x30A, 0x36A), - P4_PMCDESCR(FLAME_COUNTER3, 0x30B, 0x36B), - P4_PMCDESCR(IQ_COUNTER0, 0x30C, 0x36C), - P4_PMCDESCR(IQ_COUNTER1, 0x30D, 0x36D), - P4_PMCDESCR(IQ_COUNTER2, 0x30E, 0x36E), - P4_PMCDESCR(IQ_COUNTER3, 0x30F, 0x36F), - P4_PMCDESCR(IQ_COUNTER4, 0x310, 0x370), - P4_PMCDESCR(IQ_COUNTER5, 0x311, 0x371), - -#undef P4_PMCDESCR -}; - -/* HTT support */ -#define P4_NHTT 2 /* logical processors/chip */ - -static int p4_system_has_htt; - -/* - * Per-CPU data structure for P4 class CPUs - * - * [19 struct pmc_hw structures] - * [45 ESCRs status bytes] - * [per-cpu spin mutex] - * [19 flag fields for holding config flags and a runcount] - * [19*2 hw value fields] (Thread mode PMC support) - * or - * [19*2 EIP values] (Sampling mode PMCs) - * [19*2 pmc value fields] (Thread mode PMC support)) - */ - -struct p4_cpu { - struct pmc_hw pc_p4pmcs[P4_NPMCS]; - char pc_escrs[P4_NESCR]; - struct mtx pc_mtx; /* spin lock */ - uint32_t pc_intrflag; /* NMI handler flags */ - unsigned int pc_intrlock; /* NMI handler spin lock */ - unsigned char pc_flags[P4_NPMCS]; /* 4 bits each: {cfg,run}count */ - union { - pmc_value_t pc_hw[P4_NPMCS * P4_NHTT]; - uintptr_t pc_ip[P4_NPMCS * P4_NHTT]; - } pc_si; - pmc_value_t pc_pmc_values[P4_NPMCS * P4_NHTT]; -}; - -static struct p4_cpu **p4_pcpu; - -#define P4_PCPU_PMC_VALUE(PC,RI,CPU) (PC)->pc_pmc_values[(RI)*((CPU) & 1)] -#define P4_PCPU_HW_VALUE(PC,RI,CPU) (PC)->pc_si.pc_hw[(RI)*((CPU) & 1)] -#define P4_PCPU_SAVED_IP(PC,RI,CPU) (PC)->pc_si.pc_ip[(RI)*((CPU) & 1)] - -#define P4_PCPU_GET_FLAGS(PC,RI,MASK) ((PC)->pc_flags[(RI)] & (MASK)) -#define P4_PCPU_SET_FLAGS(PC,RI,MASK,VAL) do { \ - char _tmp; \ - _tmp = (PC)->pc_flags[(RI)]; \ - _tmp &= ~(MASK); \ - _tmp |= (VAL) & (MASK); \ - (PC)->pc_flags[(RI)] = _tmp; \ -} while (0) - -#define P4_PCPU_GET_RUNCOUNT(PC,RI) P4_PCPU_GET_FLAGS(PC,RI,0x0F) -#define P4_PCPU_SET_RUNCOUNT(PC,RI,V) P4_PCPU_SET_FLAGS(PC,RI,0x0F,V) - -#define P4_PCPU_GET_CFGFLAGS(PC,RI) (P4_PCPU_GET_FLAGS(PC,RI,0xF0) >> 4) -#define P4_PCPU_SET_CFGFLAGS(PC,RI,C) P4_PCPU_SET_FLAGS(PC,RI,0xF0,((C) <<4)) - -#define P4_CPU_TO_FLAG(C) (P4_CPU_IS_HTT_SECONDARY(cpu) ? 0x2 : 0x1) - -#define P4_PCPU_GET_INTRFLAG(PC,I) ((PC)->pc_intrflag & (1 << (I))) -#define P4_PCPU_SET_INTRFLAG(PC,I,V) do { \ - uint32_t __mask; \ - __mask = 1 << (I); \ - if ((V)) \ - (PC)->pc_intrflag |= __mask; \ - else \ - (PC)->pc_intrflag &= ~__mask; \ - } while (0) - -/* - * A minimal spin lock implementation for use inside the NMI handler. - * - * We don't want to use a regular spin lock here, because curthread - * may not be consistent at the time the handler is invoked. - */ -#define P4_PCPU_ACQ_INTR_SPINLOCK(PC) do { \ - while (!atomic_cmpset_acq_int(&pc->pc_intrlock, 0, 1)) \ - ia32_pause(); \ - } while (0) -#define P4_PCPU_REL_INTR_SPINLOCK(PC) \ - atomic_store_rel_int(&pc->pc_intrlock, 0); - -/* ESCR row disposition */ -static int p4_escrdisp[P4_NESCR]; - -#define P4_ESCR_ROW_DISP_IS_THREAD(E) (p4_escrdisp[(E)] > 0) -#define P4_ESCR_ROW_DISP_IS_STANDALONE(E) (p4_escrdisp[(E)] < 0) -#define P4_ESCR_ROW_DISP_IS_FREE(E) (p4_escrdisp[(E)] == 0) - -#define P4_ESCR_MARK_ROW_STANDALONE(E) do { \ - KASSERT(p4_escrdisp[(E)] <= 0, ("[p4,%d] row disposition error",\ - __LINE__)); \ - atomic_add_int(&p4_escrdisp[(E)], -1); \ - KASSERT(p4_escrdisp[(E)] >= (-pmc_cpu_max_active()), \ - ("[p4,%d] row disposition error", __LINE__)); \ -} while (0) - -#define P4_ESCR_UNMARK_ROW_STANDALONE(E) do { \ - atomic_add_int(&p4_escrdisp[(E)], 1); \ - KASSERT(p4_escrdisp[(E)] <= 0, ("[p4,%d] row disposition error",\ - __LINE__)); \ -} while (0) - -#define P4_ESCR_MARK_ROW_THREAD(E) do { \ - KASSERT(p4_escrdisp[(E)] >= 0, ("[p4,%d] row disposition error", \ - __LINE__)); \ - atomic_add_int(&p4_escrdisp[(E)], 1); \ -} while (0) - -#define P4_ESCR_UNMARK_ROW_THREAD(E) do { \ - atomic_add_int(&p4_escrdisp[(E)], -1); \ - KASSERT(p4_escrdisp[(E)] >= 0, ("[p4,%d] row disposition error", \ - __LINE__)); \ -} while (0) - -#define P4_PMC_IS_STOPPED(cccr) ((rdmsr(cccr) & P4_CCCR_ENABLE) == 0) - -#define P4_CPU_IS_HTT_SECONDARY(cpu) \ - (p4_system_has_htt ? ((cpu) & 1) : 0) -#define P4_TO_HTT_PRIMARY(cpu) \ - (p4_system_has_htt ? ((cpu) & ~1) : (cpu)) - -#define P4_CCCR_Tx_MASK (~(P4_CCCR_OVF_PMI_T0|P4_CCCR_OVF_PMI_T1| \ - P4_CCCR_ENABLE|P4_CCCR_OVF)) -#define P4_ESCR_Tx_MASK (~(P4_ESCR_T0_OS|P4_ESCR_T0_USR|P4_ESCR_T1_OS| \ - P4_ESCR_T1_USR)) - -/* - * support routines - */ - -static struct p4_event_descr * -p4_find_event(enum pmc_event ev) -{ - int n; - - for (n = 0; n < P4_NEVENTS; n++) - if (p4_events[n].pm_event == ev) - break; - if (n == P4_NEVENTS) - return (NULL); - return (&p4_events[n]); -} - -/* - * Initialize per-cpu state - */ - -static int -p4_pcpu_init(struct pmc_mdep *md, int cpu) -{ - char *pescr; - int n, first_ri, phycpu; - struct pmc_hw *phw; - struct p4_cpu *p4c; - struct pmc_cpu *pc, *plc; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p4,%d] insane cpu number %d", __LINE__, cpu)); - - PMCDBG2(MDP,INI,0, "p4-init cpu=%d is-primary=%d", cpu, - pmc_cpu_is_primary(cpu) != 0); - - first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P4].pcd_ri; - - /* - * The two CPUs in an HT pair share their per-cpu state. - * - * For HT capable CPUs, we assume that the two logical - * processors in the HT pair get two consecutive CPU ids - * starting with an even id #. - * - * The primary CPU (the even numbered CPU of the pair) would - * have been initialized prior to the initialization for the - * secondary. - */ - - if (!pmc_cpu_is_primary(cpu) && (cpu & 1)) { - - p4_system_has_htt = 1; - - phycpu = P4_TO_HTT_PRIMARY(cpu); - pc = pmc_pcpu[phycpu]; - plc = pmc_pcpu[cpu]; - - KASSERT(plc != pc, ("[p4,%d] per-cpu config error", __LINE__)); - - PMCDBG3(MDP,INI,1, "p4-init cpu=%d phycpu=%d pc=%p", cpu, - phycpu, pc); - KASSERT(pc, ("[p4,%d] Null Per-Cpu state cpu=%d phycpu=%d", - __LINE__, cpu, phycpu)); - - /* PMCs are shared with the physical CPU. */ - for (n = 0; n < P4_NPMCS; n++) - plc->pc_hwpmcs[n + first_ri] = - pc->pc_hwpmcs[n + first_ri]; - - return (0); - } - - p4c = malloc(sizeof(struct p4_cpu), M_PMC, M_WAITOK|M_ZERO); - - pc = pmc_pcpu[cpu]; - - KASSERT(pc != NULL, ("[p4,%d] cpu %d null per-cpu", __LINE__, cpu)); - - p4_pcpu[cpu] = p4c; - phw = p4c->pc_p4pmcs; - - for (n = 0; n < P4_NPMCS; n++, phw++) { - phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | - PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(n); - phw->phw_pmc = NULL; - pc->pc_hwpmcs[n + first_ri] = phw; - } - - pescr = p4c->pc_escrs; - for (n = 0; n < P4_NESCR; n++) - *pescr++ = P4_INVALID_PMC_INDEX; - - mtx_init(&p4c->pc_mtx, "p4-pcpu", "pmc-leaf", MTX_SPIN); - - return (0); -} - -/* - * Destroy per-cpu state. - */ - -static int -p4_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - int first_ri, i; - struct p4_cpu *p4c; - struct pmc_cpu *pc; - - PMCDBG1(MDP,INI,0, "p4-cleanup cpu=%d", cpu); - - pc = pmc_pcpu[cpu]; - first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P4].pcd_ri; - - for (i = 0; i < P4_NPMCS; i++) - pc->pc_hwpmcs[i + first_ri] = NULL; - - if (!pmc_cpu_is_primary(cpu) && (cpu & 1)) - return (0); - - p4c = p4_pcpu[cpu]; - - KASSERT(p4c != NULL, ("[p4,%d] NULL pcpu", __LINE__)); - - /* Turn off all PMCs on this CPU */ - for (i = 0; i < P4_NPMCS - 1; i++) - wrmsr(P4_CCCR_MSR_FIRST + i, - rdmsr(P4_CCCR_MSR_FIRST + i) & ~P4_CCCR_ENABLE); - - mtx_destroy(&p4c->pc_mtx); - - free(p4c, M_PMC); - - p4_pcpu[cpu] = NULL; - - return (0); -} - -/* - * Read a PMC - */ - -static int -p4_read_pmc(int cpu, int ri, pmc_value_t *v) -{ - struct pmc *pm; - pmc_value_t tmp; - struct p4_cpu *pc; - enum pmc_mode mode; - struct p4pmc_descr *pd; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p4,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] illegal row-index %d", __LINE__, ri)); - - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - pm = pc->pc_p4pmcs[ri].phw_pmc; - pd = &p4_pmcdesc[ri]; - - KASSERT(pm != NULL, - ("[p4,%d] No owner for HWPMC [cpu%d,pmc%d]", __LINE__, cpu, ri)); - - KASSERT(pd->pm_descr.pd_class == PMC_TO_CLASS(pm), - ("[p4,%d] class mismatch pd %d != id class %d", __LINE__, - pd->pm_descr.pd_class, PMC_TO_CLASS(pm))); - - mode = PMC_TO_MODE(pm); - - PMCDBG3(MDP,REA,1, "p4-read cpu=%d ri=%d mode=%d", cpu, ri, mode); - - KASSERT(pd->pm_descr.pd_class == PMC_CLASS_P4, - ("[p4,%d] unknown PMC class %d", __LINE__, pd->pm_descr.pd_class)); - - tmp = rdmsr(p4_pmcdesc[ri].pm_pmc_msr); - - if (PMC_IS_VIRTUAL_MODE(mode)) { - if (tmp < P4_PCPU_HW_VALUE(pc,ri,cpu)) /* 40 bit overflow */ - tmp += (P4_PERFCTR_MASK + 1) - - P4_PCPU_HW_VALUE(pc,ri,cpu); - else - tmp -= P4_PCPU_HW_VALUE(pc,ri,cpu); - tmp += P4_PCPU_PMC_VALUE(pc,ri,cpu); - } - - if (PMC_IS_SAMPLING_MODE(mode)) /* undo transformation */ - *v = P4_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); - else - *v = tmp; - - PMCDBG1(MDP,REA,2, "p4-read -> %jx", *v); - - return (0); -} - -/* - * Write a PMC - */ - -static int -p4_write_pmc(int cpu, int ri, pmc_value_t v) -{ - enum pmc_mode mode; - struct pmc *pm; - struct p4_cpu *pc; - const struct pmc_hw *phw; - const struct p4pmc_descr *pd; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[amd,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[amd,%d] illegal row-index %d", __LINE__, ri)); - - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - phw = &pc->pc_p4pmcs[ri]; - pm = phw->phw_pmc; - pd = &p4_pmcdesc[ri]; - - KASSERT(pm != NULL, - ("[p4,%d] No owner for HWPMC [cpu%d,pmc%d]", __LINE__, - cpu, ri)); - - mode = PMC_TO_MODE(pm); - - PMCDBG4(MDP,WRI,1, "p4-write cpu=%d ri=%d mode=%d v=%jx", cpu, ri, - mode, v); - - /* - * write the PMC value to the register/saved value: for - * sampling mode PMCs, the value to be programmed into the PMC - * counter is -(C+1) where 'C' is the requested sample rate. - */ - if (PMC_IS_SAMPLING_MODE(mode)) - v = P4_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - - if (PMC_IS_SYSTEM_MODE(mode)) - wrmsr(pd->pm_pmc_msr, v); - else - P4_PCPU_PMC_VALUE(pc,ri,cpu) = v; - - return (0); -} - -/* - * Configure a PMC 'pm' on the given CPU and row-index. - * - * 'pm' may be NULL to indicate de-configuration. - * - * On HTT systems, a PMC may get configured twice, once for each - * "logical" CPU. We track this using the CFGFLAGS field of the - * per-cpu state; this field is a bit mask with one bit each for - * logical CPUs 0 & 1. - */ - -static int -p4_config_pmc(int cpu, int ri, struct pmc *pm) -{ - struct pmc_hw *phw; - struct p4_cpu *pc; - int cfgflags, cpuflag; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p4,%d] illegal CPU %d", __LINE__, cpu)); - - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] illegal row-index %d", __LINE__, ri)); - - PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); - - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - phw = &pc->pc_p4pmcs[ri]; - - KASSERT(pm == NULL || phw->phw_pmc == NULL || - (p4_system_has_htt && phw->phw_pmc == pm), - ("[p4,%d] hwpmc not unconfigured before re-config", __LINE__)); - - mtx_lock_spin(&pc->pc_mtx); - cfgflags = P4_PCPU_GET_CFGFLAGS(pc,ri); - - KASSERT((cfgflags & ~0x3) == 0, - ("[p4,%d] illegal cfgflags cfg=%#x on cpu=%d ri=%d", __LINE__, - cfgflags, cpu, ri)); - - KASSERT(cfgflags == 0 || phw->phw_pmc, - ("[p4,%d] cpu=%d ri=%d pmc configured with zero cfg count", - __LINE__, cpu, ri)); - - cpuflag = P4_CPU_TO_FLAG(cpu); - - if (pm) { /* config */ - if (cfgflags == 0) - phw->phw_pmc = pm; - - KASSERT(phw->phw_pmc == pm, - ("[p4,%d] cpu=%d ri=%d config %p != hw %p", - __LINE__, cpu, ri, pm, phw->phw_pmc)); - - cfgflags |= cpuflag; - } else { /* unconfig */ - cfgflags &= ~cpuflag; - - if (cfgflags == 0) - phw->phw_pmc = NULL; - } - - KASSERT((cfgflags & ~0x3) == 0, - ("[p4,%d] illegal runcount cfg=%#x on cpu=%d ri=%d", __LINE__, - cfgflags, cpu, ri)); - - P4_PCPU_SET_CFGFLAGS(pc,ri,cfgflags); - - mtx_unlock_spin(&pc->pc_mtx); - - return (0); -} - -/* - * Retrieve a configured PMC pointer from hardware state. - */ - -static int -p4_get_config(int cpu, int ri, struct pmc **ppm) -{ - int cfgflags; - struct p4_cpu *pc; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p4,%d] illegal CPU %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] illegal row-index %d", __LINE__, ri)); - - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - - mtx_lock_spin(&pc->pc_mtx); - cfgflags = P4_PCPU_GET_CFGFLAGS(pc,ri); - mtx_unlock_spin(&pc->pc_mtx); - - if (cfgflags & P4_CPU_TO_FLAG(cpu)) - *ppm = pc->pc_p4pmcs[ri].phw_pmc; /* PMC config'ed on this CPU */ - else - *ppm = NULL; - - return 0; -} - -/* - * Allocate a PMC. - * - * The allocation strategy differs between HTT and non-HTT systems. - * - * The non-HTT case: - * - Given the desired event and the PMC row-index, lookup the - * list of valid ESCRs for the event. - * - For each valid ESCR: - * - Check if the ESCR is free and the ESCR row is in a compatible - * mode (i.e., system or process)) - * - Check if the ESCR is usable with a P4 PMC at the desired row-index. - * If everything matches, we determine the appropriate bit values for the - * ESCR and CCCR registers. - * - * The HTT case: - * - * - Process mode PMCs require special care. The FreeBSD scheduler could - * schedule any two processes on the same physical CPU. We need to ensure - * that a given PMC row-index is never allocated to two different - * PMCs owned by different user-processes. - * This is ensured by always allocating a PMC from a 'FREE' PMC row - * if the system has HTT active. - * - A similar check needs to be done for ESCRs; we do not want two PMCs - * using the same ESCR to be scheduled at the same time. Thus ESCR - * allocation is also restricted to FREE rows if the system has HTT - * enabled. - * - Thirdly, some events are 'thread-independent' terminology, i.e., - * the PMC hardware cannot distinguish between events caused by - * different logical CPUs. This makes it impossible to assign events - * to a given thread of execution. If the system has HTT enabled, - * these events are not allowed for process-mode PMCs. - */ - -static int -p4_allocate_pmc(int cpu, int ri, struct pmc *pm, - const struct pmc_op_pmcallocate *a) -{ - int found, n, m; - uint32_t caps, cccrvalue, escrvalue, tflags; - enum pmc_p4escr escr; - struct p4_cpu *pc; - struct p4_event_descr *pevent; - const struct p4pmc_descr *pd; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p4,%d] illegal CPU %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] illegal row-index value %d", __LINE__, ri)); - - pd = &p4_pmcdesc[ri]; - - PMCDBG4(MDP,ALL,1, "p4-allocate ri=%d class=%d pmccaps=0x%x " - "reqcaps=0x%x", ri, pd->pm_descr.pd_class, pd->pm_descr.pd_caps, - pm->pm_caps); - - /* check class */ - if (pd->pm_descr.pd_class != a->pm_class) - return (EINVAL); - - /* check requested capabilities */ - caps = a->pm_caps; - if ((pd->pm_descr.pd_caps & caps) != caps) - return (EPERM); - - /* - * If the system has HTT enabled, and the desired allocation - * mode is process-private, and the PMC row disposition is not - * FREE (0), decline the allocation. - */ - - if (p4_system_has_htt && - PMC_IS_VIRTUAL_MODE(PMC_TO_MODE(pm)) && - pmc_getrowdisp(ri) != 0) - return (EBUSY); - - KASSERT(pd->pm_descr.pd_class == PMC_CLASS_P4, - ("[p4,%d] unknown PMC class %d", __LINE__, - pd->pm_descr.pd_class)); - - if (pm->pm_event < PMC_EV_P4_FIRST || - pm->pm_event > PMC_EV_P4_LAST) - return (EINVAL); - - if ((pevent = p4_find_event(pm->pm_event)) == NULL) - return (ESRCH); - - PMCDBG4(MDP,ALL,2, "pevent={ev=%d,escrsel=0x%x,cccrsel=0x%x,isti=%d}", - pevent->pm_event, pevent->pm_escr_eventselect, - pevent->pm_cccr_select, pevent->pm_is_ti_event); - - /* - * Some PMC events are 'thread independent'and therefore - * cannot be used for process-private modes if HTT is being - * used. - */ - - if (P4_EVENT_IS_TI(pevent) && - PMC_IS_VIRTUAL_MODE(PMC_TO_MODE(pm)) && - p4_system_has_htt) - return (EINVAL); - - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - - found = 0; - - /* look for a suitable ESCR for this event */ - for (n = 0; n < P4_MAX_ESCR_PER_EVENT && !found; n++) { - if ((escr = pevent->pm_escrs[n]) == P4_ESCR_NONE) - break; /* out of ESCRs */ - /* - * Check ESCR row disposition. - * - * If the request is for a system-mode PMC, then the - * ESCR row should not be in process-virtual mode, and - * should also be free on the current CPU. - */ - - if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { - if (P4_ESCR_ROW_DISP_IS_THREAD(escr) || - pc->pc_escrs[escr] != P4_INVALID_PMC_INDEX) - continue; - } - - /* - * If the request is for a process-virtual PMC, and if - * HTT is not enabled, we can use an ESCR row that is - * either FREE or already in process mode. - * - * If HTT is enabled, then we need to ensure that a - * given ESCR is never allocated to two PMCS that - * could run simultaneously on the two logical CPUs of - * a CPU package. We ensure this be only allocating - * ESCRs from rows marked as 'FREE'. - */ - - if (PMC_IS_VIRTUAL_MODE(PMC_TO_MODE(pm))) { - if (p4_system_has_htt) { - if (!P4_ESCR_ROW_DISP_IS_FREE(escr)) - continue; - } else - if (P4_ESCR_ROW_DISP_IS_STANDALONE(escr)) - continue; - } - - /* - * We found a suitable ESCR for this event. Now check if - * this escr can work with the PMC at row-index 'ri'. - */ - - for (m = 0; m < P4_MAX_PMC_PER_ESCR; m++) - if (p4_escrs[escr].pm_pmcs[m] == pd->pm_pmcnum) { - found = 1; - break; - } - } - - if (found == 0) - return (ESRCH); - - KASSERT((int) escr >= 0 && escr < P4_NESCR, - ("[p4,%d] illegal ESCR value %d", __LINE__, escr)); - - /* mark ESCR row mode */ - if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { - pc->pc_escrs[escr] = ri; /* mark ESCR as in use on this cpu */ - P4_ESCR_MARK_ROW_STANDALONE(escr); - } else { - KASSERT(pc->pc_escrs[escr] == P4_INVALID_PMC_INDEX, - ("[p4,%d] escr[%d] already in use", __LINE__, escr)); - P4_ESCR_MARK_ROW_THREAD(escr); - } - - pm->pm_md.pm_p4.pm_p4_escrmsr = p4_escrs[escr].pm_escr_msr; - pm->pm_md.pm_p4.pm_p4_escr = escr; - - cccrvalue = P4_CCCR_TO_ESCR_SELECT(pevent->pm_cccr_select); - escrvalue = P4_ESCR_TO_EVENT_SELECT(pevent->pm_escr_eventselect); - - /* CCCR fields */ - if (caps & PMC_CAP_THRESHOLD) - cccrvalue |= (a->pm_md.pm_p4.pm_p4_cccrconfig & - P4_CCCR_THRESHOLD_MASK) | P4_CCCR_COMPARE; - - if (caps & PMC_CAP_EDGE) - cccrvalue |= P4_CCCR_EDGE; - - if (caps & PMC_CAP_INVERT) - cccrvalue |= P4_CCCR_COMPLEMENT; - - if (p4_system_has_htt) - cccrvalue |= a->pm_md.pm_p4.pm_p4_cccrconfig & - P4_CCCR_ACTIVE_THREAD_MASK; - else /* no HTT; thread field should be '11b' */ - cccrvalue |= P4_CCCR_TO_ACTIVE_THREAD(0x3); - - if (caps & PMC_CAP_CASCADE) - cccrvalue |= P4_CCCR_CASCADE; - - /* On HTT systems the PMI T0 field may get moved to T1 at pmc start */ - if (caps & PMC_CAP_INTERRUPT) - cccrvalue |= P4_CCCR_OVF_PMI_T0; - - /* ESCR fields */ - if (caps & PMC_CAP_QUALIFIER) - escrvalue |= a->pm_md.pm_p4.pm_p4_escrconfig & - P4_ESCR_EVENT_MASK_MASK; - if (caps & PMC_CAP_TAGGING) - escrvalue |= (a->pm_md.pm_p4.pm_p4_escrconfig & - P4_ESCR_TAG_VALUE_MASK) | P4_ESCR_TAG_ENABLE; - if (caps & PMC_CAP_QUALIFIER) - escrvalue |= (a->pm_md.pm_p4.pm_p4_escrconfig & - P4_ESCR_EVENT_MASK_MASK); - - /* HTT: T0_{OS,USR} bits may get moved to T1 at pmc start */ - tflags = 0; - if (caps & PMC_CAP_SYSTEM) - tflags |= P4_ESCR_T0_OS; - if (caps & PMC_CAP_USER) - tflags |= P4_ESCR_T0_USR; - if (tflags == 0) - tflags = (P4_ESCR_T0_OS|P4_ESCR_T0_USR); - escrvalue |= tflags; - - pm->pm_md.pm_p4.pm_p4_cccrvalue = cccrvalue; - pm->pm_md.pm_p4.pm_p4_escrvalue = escrvalue; - - PMCDBG5(MDP,ALL,2, "p4-allocate cccrsel=0x%x cccrval=0x%x " - "escr=%d escrmsr=0x%x escrval=0x%x", pevent->pm_cccr_select, - cccrvalue, escr, pm->pm_md.pm_p4.pm_p4_escrmsr, escrvalue); - - return (0); -} - -/* - * release a PMC. - */ - -static int -p4_release_pmc(int cpu, int ri, struct pmc *pm) -{ - enum pmc_p4escr escr; - struct p4_cpu *pc; - - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] illegal row-index %d", __LINE__, ri)); - - escr = pm->pm_md.pm_p4.pm_p4_escr; - - PMCDBG3(MDP,REL,1, "p4-release cpu=%d ri=%d escr=%d", cpu, ri, escr); - - if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - - KASSERT(pc->pc_p4pmcs[ri].phw_pmc == NULL, - ("[p4,%d] releasing configured PMC ri=%d", __LINE__, ri)); - - P4_ESCR_UNMARK_ROW_STANDALONE(escr); - KASSERT(pc->pc_escrs[escr] == ri, - ("[p4,%d] escr[%d] not allocated to ri %d", __LINE__, - escr, ri)); - pc->pc_escrs[escr] = P4_INVALID_PMC_INDEX; /* mark as free */ - } else - P4_ESCR_UNMARK_ROW_THREAD(escr); - - return (0); -} - -/* - * Start a PMC - */ - -static int -p4_start_pmc(int cpu, int ri) -{ - int rc; - struct pmc *pm; - struct p4_cpu *pc; - struct p4pmc_descr *pd; - uint32_t cccrvalue, cccrtbits, escrvalue, escrmsr, escrtbits; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p4,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] illegal row-index %d", __LINE__, ri)); - - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - pm = pc->pc_p4pmcs[ri].phw_pmc; - pd = &p4_pmcdesc[ri]; - - KASSERT(pm != NULL, - ("[p4,%d] starting cpu%d,pmc%d with null pmc", __LINE__, cpu, ri)); - - PMCDBG2(MDP,STA,1, "p4-start cpu=%d ri=%d", cpu, ri); - - KASSERT(pd->pm_descr.pd_class == PMC_CLASS_P4, - ("[p4,%d] wrong PMC class %d", __LINE__, - pd->pm_descr.pd_class)); - - /* retrieve the desired CCCR/ESCR values from the PMC */ - cccrvalue = pm->pm_md.pm_p4.pm_p4_cccrvalue; - escrvalue = pm->pm_md.pm_p4.pm_p4_escrvalue; - escrmsr = pm->pm_md.pm_p4.pm_p4_escrmsr; - - /* extract and zero the logical processor selection bits */ - cccrtbits = cccrvalue & P4_CCCR_OVF_PMI_T0; - escrtbits = escrvalue & (P4_ESCR_T0_OS|P4_ESCR_T0_USR); - cccrvalue &= ~P4_CCCR_OVF_PMI_T0; - escrvalue &= ~(P4_ESCR_T0_OS|P4_ESCR_T0_USR); - - if (P4_CPU_IS_HTT_SECONDARY(cpu)) { /* shift T0 bits to T1 position */ - cccrtbits <<= 1; - escrtbits >>= 2; - } - - /* start system mode PMCs directly */ - if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { - wrmsr(escrmsr, escrvalue | escrtbits); - wrmsr(pd->pm_cccr_msr, cccrvalue | cccrtbits | P4_CCCR_ENABLE); - return 0; - } - - /* - * Thread mode PMCs - * - * On HTT machines, the same PMC could be scheduled on the - * same physical CPU twice (once for each logical CPU), for - * example, if two threads of a multi-threaded process get - * scheduled on the same CPU. - * - */ - - mtx_lock_spin(&pc->pc_mtx); - - rc = P4_PCPU_GET_RUNCOUNT(pc,ri); - KASSERT(rc == 0 || rc == 1, - ("[p4,%d] illegal runcount cpu=%d ri=%d rc=%d", __LINE__, cpu, ri, - rc)); - - if (rc == 0) { /* 1st CPU and the non-HTT case */ - - KASSERT(P4_PMC_IS_STOPPED(pd->pm_cccr_msr), - ("[p4,%d] cpu=%d ri=%d cccr=0x%x not stopped", __LINE__, - cpu, ri, pd->pm_cccr_msr)); - - /* write out the low 40 bits of the saved value to hardware */ - wrmsr(pd->pm_pmc_msr, - P4_PCPU_PMC_VALUE(pc,ri,cpu) & P4_PERFCTR_MASK); - - } else if (rc == 1) { /* 2nd CPU */ - - /* - * Stop the PMC and retrieve the CCCR and ESCR values - * from their MSRs, and turn on the additional T[0/1] - * bits for the 2nd CPU. - */ - - cccrvalue = rdmsr(pd->pm_cccr_msr); - wrmsr(pd->pm_cccr_msr, cccrvalue & ~P4_CCCR_ENABLE); - - /* check that the configuration bits read back match the PMC */ - KASSERT((cccrvalue & P4_CCCR_Tx_MASK) == - (pm->pm_md.pm_p4.pm_p4_cccrvalue & P4_CCCR_Tx_MASK), - ("[p4,%d] Extra CCCR bits cpu=%d rc=%d ri=%d " - "cccr=0x%x PMC=0x%x", __LINE__, cpu, rc, ri, - cccrvalue & P4_CCCR_Tx_MASK, - pm->pm_md.pm_p4.pm_p4_cccrvalue & P4_CCCR_Tx_MASK)); - KASSERT(cccrvalue & P4_CCCR_ENABLE, - ("[p4,%d] 2nd cpu rc=%d cpu=%d ri=%d not running", - __LINE__, rc, cpu, ri)); - KASSERT((cccrvalue & cccrtbits) == 0, - ("[p4,%d] CCCR T0/T1 mismatch rc=%d cpu=%d ri=%d" - "cccrvalue=0x%x tbits=0x%x", __LINE__, rc, cpu, ri, - cccrvalue, cccrtbits)); - - escrvalue = rdmsr(escrmsr); - - KASSERT((escrvalue & P4_ESCR_Tx_MASK) == - (pm->pm_md.pm_p4.pm_p4_escrvalue & P4_ESCR_Tx_MASK), - ("[p4,%d] Extra ESCR bits cpu=%d rc=%d ri=%d " - "escr=0x%x pm=0x%x", __LINE__, cpu, rc, ri, - escrvalue & P4_ESCR_Tx_MASK, - pm->pm_md.pm_p4.pm_p4_escrvalue & P4_ESCR_Tx_MASK)); - KASSERT((escrvalue & escrtbits) == 0, - ("[p4,%d] ESCR T0/T1 mismatch rc=%d cpu=%d ri=%d " - "escrmsr=0x%x escrvalue=0x%x tbits=0x%x", __LINE__, - rc, cpu, ri, escrmsr, escrvalue, escrtbits)); - } - - /* Enable the correct bits for this CPU. */ - escrvalue |= escrtbits; - cccrvalue |= cccrtbits | P4_CCCR_ENABLE; - - /* Save HW value at the time of starting hardware */ - P4_PCPU_HW_VALUE(pc,ri,cpu) = rdmsr(pd->pm_pmc_msr); - - /* Program the ESCR and CCCR and start the PMC */ - wrmsr(escrmsr, escrvalue); - wrmsr(pd->pm_cccr_msr, cccrvalue); - - ++rc; - P4_PCPU_SET_RUNCOUNT(pc,ri,rc); - - mtx_unlock_spin(&pc->pc_mtx); - - PMCDBG6(MDP,STA,2,"p4-start cpu=%d rc=%d ri=%d escr=%d " - "escrmsr=0x%x escrvalue=0x%x", cpu, rc, - ri, pm->pm_md.pm_p4.pm_p4_escr, escrmsr, escrvalue); - PMCDBG2(MDP,STA,2,"cccr_config=0x%x v=%jx", - cccrvalue, P4_PCPU_HW_VALUE(pc,ri,cpu)); - - return (0); -} - -/* - * Stop a PMC. - */ - -static int -p4_stop_pmc(int cpu, int ri) -{ - int rc; - uint32_t cccrvalue, cccrtbits, escrvalue, escrmsr, escrtbits; - struct pmc *pm; - struct p4_cpu *pc; - struct p4pmc_descr *pd; - pmc_value_t tmp; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p4,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] illegal row index %d", __LINE__, ri)); - - pd = &p4_pmcdesc[ri]; - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - pm = pc->pc_p4pmcs[ri].phw_pmc; - - KASSERT(pm != NULL, - ("[p4,%d] null pmc for cpu%d, ri%d", __LINE__, cpu, ri)); - - PMCDBG2(MDP,STO,1, "p4-stop cpu=%d ri=%d", cpu, ri); - - if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { - wrmsr(pd->pm_cccr_msr, - pm->pm_md.pm_p4.pm_p4_cccrvalue & ~P4_CCCR_ENABLE); - return (0); - } - - /* - * Thread mode PMCs. - * - * On HTT machines, this PMC may be in use by two threads - * running on two logical CPUS. Thus we look at the - * 'runcount' field and only turn off the appropriate TO/T1 - * bits (and keep the PMC running) if two logical CPUs were - * using the PMC. - * - */ - - /* bits to mask */ - cccrtbits = P4_CCCR_OVF_PMI_T0; - escrtbits = P4_ESCR_T0_OS | P4_ESCR_T0_USR; - if (P4_CPU_IS_HTT_SECONDARY(cpu)) { - cccrtbits <<= 1; - escrtbits >>= 2; - } - - mtx_lock_spin(&pc->pc_mtx); - - rc = P4_PCPU_GET_RUNCOUNT(pc,ri); - - KASSERT(rc == 2 || rc == 1, - ("[p4,%d] illegal runcount cpu=%d ri=%d rc=%d", __LINE__, cpu, ri, - rc)); - - --rc; - - P4_PCPU_SET_RUNCOUNT(pc,ri,rc); - - /* Stop this PMC */ - cccrvalue = rdmsr(pd->pm_cccr_msr); - wrmsr(pd->pm_cccr_msr, cccrvalue & ~P4_CCCR_ENABLE); - - escrmsr = pm->pm_md.pm_p4.pm_p4_escrmsr; - escrvalue = rdmsr(escrmsr); - - /* The current CPU should be running on this PMC */ - KASSERT(escrvalue & escrtbits, - ("[p4,%d] ESCR T0/T1 mismatch cpu=%d rc=%d ri=%d escrmsr=0x%x " - "escrvalue=0x%x tbits=0x%x", __LINE__, cpu, rc, ri, escrmsr, - escrvalue, escrtbits)); - KASSERT(PMC_IS_COUNTING_MODE(PMC_TO_MODE(pm)) || - (cccrvalue & cccrtbits), - ("[p4,%d] CCCR T0/T1 mismatch cpu=%d ri=%d cccrvalue=0x%x " - "tbits=0x%x", __LINE__, cpu, ri, cccrvalue, cccrtbits)); - - /* get the current hardware reading */ - tmp = rdmsr(pd->pm_pmc_msr); - - if (rc == 1) { /* need to keep the PMC running */ - escrvalue &= ~escrtbits; - cccrvalue &= ~cccrtbits; - wrmsr(escrmsr, escrvalue); - wrmsr(pd->pm_cccr_msr, cccrvalue); - } - - mtx_unlock_spin(&pc->pc_mtx); - - PMCDBG5(MDP,STO,2, "p4-stop cpu=%d rc=%d ri=%d escrmsr=0x%x " - "escrval=0x%x", cpu, rc, ri, escrmsr, escrvalue); - PMCDBG2(MDP,STO,2, "cccrval=0x%x v=%jx", cccrvalue, tmp); - - if (tmp < P4_PCPU_HW_VALUE(pc,ri,cpu)) /* 40 bit counter overflow */ - tmp += (P4_PERFCTR_MASK + 1) - P4_PCPU_HW_VALUE(pc,ri,cpu); - else - tmp -= P4_PCPU_HW_VALUE(pc,ri,cpu); - - P4_PCPU_PMC_VALUE(pc,ri,cpu) += tmp; - - return 0; -} - -/* - * Handle an interrupt. - * - * The hardware sets the CCCR_OVF whenever a counter overflow occurs, - * so the handler examines all the 18 CCCR registers, processing the - * counters that have overflowed. - * - * On HTT machines, the CCCR register is shared and will interrupt - * both logical processors if so configured. Thus multiple logical - * CPUs could enter the NMI service routine at the same time. These - * will get serialized using a per-cpu spinlock dedicated for use in - * the NMI handler. - */ - -static int -p4_intr(int cpu, struct trapframe *tf) -{ - uint32_t cccrval, ovf_mask, ovf_partner; - int did_interrupt, error, ri; - struct p4_cpu *pc; - struct pmc *pm; - pmc_value_t v; - - PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, - TRAPF_USERMODE(tf)); - - pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; - - ovf_mask = P4_CPU_IS_HTT_SECONDARY(cpu) ? - P4_CCCR_OVF_PMI_T1 : P4_CCCR_OVF_PMI_T0; - ovf_mask |= P4_CCCR_OVF; - if (p4_system_has_htt) - ovf_partner = P4_CPU_IS_HTT_SECONDARY(cpu) ? - P4_CCCR_OVF_PMI_T0 : P4_CCCR_OVF_PMI_T1; - else - ovf_partner = 0; - did_interrupt = 0; - - if (p4_system_has_htt) - P4_PCPU_ACQ_INTR_SPINLOCK(pc); - - /* - * Loop through all CCCRs, looking for ones that have - * interrupted this CPU. - */ - for (ri = 0; ri < P4_NPMCS; ri++) { - - /* - * Check if our partner logical CPU has already marked - * this PMC has having interrupted it. If so, reset - * the flag and process the interrupt, but leave the - * hardware alone. - */ - if (p4_system_has_htt && P4_PCPU_GET_INTRFLAG(pc,ri)) { - P4_PCPU_SET_INTRFLAG(pc,ri,0); - did_interrupt = 1; - - /* - * Ignore de-configured or stopped PMCs. - * Ignore PMCs not in sampling mode. - */ - pm = pc->pc_p4pmcs[ri].phw_pmc; - if (pm == NULL || - pm->pm_state != PMC_STATE_RUNNING || - !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) { - continue; - } - (void) pmc_process_interrupt(cpu, PMC_HR, pm, tf, - TRAPF_USERMODE(tf)); - continue; - } - - /* - * Fresh interrupt. Look for the CCCR_OVF bit - * and the OVF_Tx bit for this logical - * processor being set. - */ - cccrval = rdmsr(P4_CCCR_MSR_FIRST + ri); - - if ((cccrval & ovf_mask) != ovf_mask) - continue; - - /* - * If the other logical CPU would also have been - * interrupted due to the PMC being shared, record - * this fact in the per-cpu saved interrupt flag - * bitmask. - */ - if (p4_system_has_htt && (cccrval & ovf_partner)) - P4_PCPU_SET_INTRFLAG(pc, ri, 1); - - v = rdmsr(P4_PERFCTR_MSR_FIRST + ri); - - PMCDBG2(MDP,INT, 2, "ri=%d v=%jx", ri, v); - - /* Stop the counter, and reset the overflow bit */ - cccrval &= ~(P4_CCCR_OVF | P4_CCCR_ENABLE); - wrmsr(P4_CCCR_MSR_FIRST + ri, cccrval); - - did_interrupt = 1; - - /* - * Ignore de-configured or stopped PMCs. Ignore PMCs - * not in sampling mode. - */ - pm = pc->pc_p4pmcs[ri].phw_pmc; - - if (pm == NULL || - pm->pm_state != PMC_STATE_RUNNING || - !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) { - continue; - } - - /* - * Process the interrupt. Re-enable the PMC if - * processing was successful. - */ - error = pmc_process_interrupt(cpu, PMC_HR, pm, tf, - TRAPF_USERMODE(tf)); - - /* - * Only the first processor executing the NMI handler - * in a HTT pair will restart a PMC, and that too - * only if there were no errors. - */ - v = P4_RELOAD_COUNT_TO_PERFCTR_VALUE( - pm->pm_sc.pm_reloadcount); - wrmsr(P4_PERFCTR_MSR_FIRST + ri, v); - if (error == 0) - wrmsr(P4_CCCR_MSR_FIRST + ri, - cccrval | P4_CCCR_ENABLE); - } - - /* allow the other CPU to proceed */ - if (p4_system_has_htt) - P4_PCPU_REL_INTR_SPINLOCK(pc); - - /* - * On Intel P4 CPUs, the PMC 'pcint' entry in the LAPIC gets - * masked when a PMC interrupts the CPU. We need to unmask - * the interrupt source explicitly. - */ - - if (did_interrupt) - lapic_reenable_pmc(); - - if (did_interrupt) - counter_u64_add(pmc_stats.pm_intr_processed, 1); - else - counter_u64_add(pmc_stats.pm_intr_ignored, 1); - - return (did_interrupt); -} - -/* - * Describe a CPU's PMC state. - */ - -static int -p4_describe(int cpu, int ri, struct pmc_info *pi, - struct pmc **ppmc) -{ - int error; - size_t copied; - const struct p4pmc_descr *pd; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p4,%d] illegal CPU %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] row-index %d out of range", __LINE__, ri)); - - PMCDBG2(MDP,OPS,1,"p4-describe cpu=%d ri=%d", cpu, ri); - - if (P4_CPU_IS_HTT_SECONDARY(cpu)) - return (EINVAL); - - pd = &p4_pmcdesc[ri]; - - if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name, - PMC_NAME_MAX, &copied)) != 0) - return (error); - - pi->pm_class = pd->pm_descr.pd_class; - - if (p4_pcpu[cpu]->pc_p4pmcs[ri].phw_state & PMC_PHW_FLAG_IS_ENABLED) { - pi->pm_enabled = TRUE; - *ppmc = p4_pcpu[cpu]->pc_p4pmcs[ri].phw_pmc; - } else { - pi->pm_enabled = FALSE; - *ppmc = NULL; - } - - return (0); -} - -/* - * Get MSR# for use with RDPMC. - */ - -static int -p4_get_msr(int ri, uint32_t *msr) -{ - KASSERT(ri >= 0 && ri < P4_NPMCS, - ("[p4,%d] ri %d out of range", __LINE__, ri)); - - *msr = p4_pmcdesc[ri].pm_pmc_msr - P4_PERFCTR_MSR_FIRST; - - PMCDBG2(MDP,OPS, 1, "ri=%d getmsr=0x%x", ri, *msr); - - return 0; -} - - -int -pmc_p4_initialize(struct pmc_mdep *md, int ncpus) -{ - struct pmc_classdep *pcd; - struct p4_event_descr *pe; - - KASSERT(md != NULL, ("[p4,%d] md is NULL", __LINE__)); - KASSERT(cpu_vendor_id == CPU_VENDOR_INTEL, - ("[p4,%d] Initializing non-intel processor", __LINE__)); - - PMCDBG0(MDP,INI,1, "p4-initialize"); - - /* Allocate space for pointers to per-cpu descriptors. */ - p4_pcpu = malloc(sizeof(*p4_pcpu) * ncpus, M_PMC, M_ZERO | M_WAITOK); - - /* Fill in the class dependent descriptor. */ - pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P4]; - - switch (md->pmd_cputype) { - case PMC_CPU_INTEL_PIV: - - pcd->pcd_caps = P4_PMC_CAPS; - pcd->pcd_class = PMC_CLASS_P4; - pcd->pcd_num = P4_NPMCS; - pcd->pcd_ri = md->pmd_npmc; - pcd->pcd_width = 40; - - pcd->pcd_allocate_pmc = p4_allocate_pmc; - pcd->pcd_config_pmc = p4_config_pmc; - pcd->pcd_describe = p4_describe; - pcd->pcd_get_config = p4_get_config; - pcd->pcd_get_msr = p4_get_msr; - pcd->pcd_pcpu_fini = p4_pcpu_fini; - pcd->pcd_pcpu_init = p4_pcpu_init; - pcd->pcd_read_pmc = p4_read_pmc; - pcd->pcd_release_pmc = p4_release_pmc; - pcd->pcd_start_pmc = p4_start_pmc; - pcd->pcd_stop_pmc = p4_stop_pmc; - pcd->pcd_write_pmc = p4_write_pmc; - - md->pmd_pcpu_fini = NULL; - md->pmd_pcpu_init = NULL; - md->pmd_intr = p4_intr; - md->pmd_npmc += P4_NPMCS; - - /* model specific configuration */ - if ((cpu_id & 0xFFF) < 0xF27) { - - /* - * On P4 and Xeon with CPUID < (Family 15, - * Model 2, Stepping 7), only one ESCR is - * available for the IOQ_ALLOCATION event. - */ - - pe = p4_find_event(PMC_EV_P4_IOQ_ALLOCATION); - pe->pm_escrs[1] = P4_ESCR_NONE; - } - - break; - - default: - KASSERT(0,("[p4,%d] Unknown CPU type", __LINE__)); - return ENOSYS; - } - - return (0); -} - -void -pmc_p4_finalize(struct pmc_mdep *md) -{ -#if defined(INVARIANTS) - int i, ncpus; -#endif - - KASSERT(p4_pcpu != NULL, - ("[p4,%d] NULL p4_pcpu", __LINE__)); - -#if defined(INVARIANTS) - ncpus = pmc_cpu_max(); - for (i = 0; i < ncpus; i++) - KASSERT(p4_pcpu[i] == NULL, ("[p4,%d] non-null pcpu %d", - __LINE__, i)); -#endif - - free(p4_pcpu, M_PMC); - p4_pcpu = NULL; -} diff --git a/sys/dev/hwpmc/hwpmc_piv.h b/sys/dev/hwpmc/hwpmc_piv.h deleted file mode 100644 index 14e5ed4a6f4c..000000000000 --- a/sys/dev/hwpmc/hwpmc_piv.h +++ /dev/null @@ -1,127 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2005, Joseph Koshy - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* Machine dependent interfaces */ - -#ifndef _DEV_HWPMC_PIV_H_ -#define _DEV_HWPMC_PIV_H_ 1 - -/* Intel P4 PMCs */ - -#define P4_NPMCS 18 -#define P4_NESCR 45 -#define P4_INVALID_PMC_INDEX -1 -#define P4_MAX_ESCR_PER_EVENT 2 -#define P4_MAX_PMC_PER_ESCR 3 - -#define P4_CCCR_OVF (1U << 31) -#define P4_CCCR_CASCADE (1 << 30) -#define P4_CCCR_OVF_PMI_T1 (1 << 27) -#define P4_CCCR_OVF_PMI_T0 (1 << 26) -#define P4_CCCR_FORCE_OVF (1 << 25) -#define P4_CCCR_EDGE (1 << 24) -#define P4_CCCR_THRESHOLD_SHIFT 20 -#define P4_CCCR_THRESHOLD_MASK 0x00F00000 -#define P4_CCCR_TO_THRESHOLD(C) (((C) << P4_CCCR_THRESHOLD_SHIFT) & \ - P4_CCCR_THRESHOLD_MASK) -#define P4_CCCR_COMPLEMENT (1 << 19) -#define P4_CCCR_COMPARE (1 << 18) -#define P4_CCCR_ACTIVE_THREAD_SHIFT 16 -#define P4_CCCR_ACTIVE_THREAD_MASK 0x00030000 -#define P4_CCCR_TO_ACTIVE_THREAD(T) (((T) << P4_CCCR_ACTIVE_THREAD_SHIFT) & \ - P4_CCCR_ACTIVE_THREAD_MASK) -#define P4_CCCR_ESCR_SELECT_SHIFT 13 -#define P4_CCCR_ESCR_SELECT_MASK 0x0000E000 -#define P4_CCCR_TO_ESCR_SELECT(E) (((E) << P4_CCCR_ESCR_SELECT_SHIFT) & \ - P4_CCCR_ESCR_SELECT_MASK) -#define P4_CCCR_ENABLE (1 << 12) -#define P4_CCCR_VALID_BITS (P4_CCCR_OVF | P4_CCCR_CASCADE | \ - P4_CCCR_OVF_PMI_T1 | P4_CCCR_OVF_PMI_T0 | P4_CCCR_FORCE_OVF | \ - P4_CCCR_EDGE | P4_CCCR_THRESHOLD_MASK | P4_CCCR_COMPLEMENT | \ - P4_CCCR_COMPARE | P4_CCCR_ESCR_SELECT_MASK | P4_CCCR_ENABLE) - -#define P4_ESCR_EVENT_SELECT_SHIFT 25 -#define P4_ESCR_EVENT_SELECT_MASK 0x7E000000 -#define P4_ESCR_TO_EVENT_SELECT(E) (((E) << P4_ESCR_EVENT_SELECT_SHIFT) & \ - P4_ESCR_EVENT_SELECT_MASK) -#define P4_ESCR_EVENT_MASK_SHIFT 9 -#define P4_ESCR_EVENT_MASK_MASK 0x01FFFE00 -#define P4_ESCR_TO_EVENT_MASK(M) (((M) << P4_ESCR_EVENT_MASK_SHIFT) & \ - P4_ESCR_EVENT_MASK_MASK) -#define P4_ESCR_TAG_VALUE_SHIFT 5 -#define P4_ESCR_TAG_VALUE_MASK 0x000001E0 -#define P4_ESCR_TO_TAG_VALUE(T) (((T) << P4_ESCR_TAG_VALUE_SHIFT) & \ - P4_ESCR_TAG_VALUE_MASK) -#define P4_ESCR_TAG_ENABLE 0x00000010 -#define P4_ESCR_T0_OS 0x00000008 -#define P4_ESCR_T0_USR 0x00000004 -#define P4_ESCR_T1_OS 0x00000002 -#define P4_ESCR_T1_USR 0x00000001 -#define P4_ESCR_OS P4_ESCR_T0_OS -#define P4_ESCR_USR P4_ESCR_T0_USR -#define P4_ESCR_VALID_BITS (P4_ESCR_EVENT_SELECT_MASK | \ - P4_ESCR_EVENT_MASK_MASK | P4_ESCR_TAG_VALUE_MASK | \ - P4_ESCR_TAG_ENABLE | P4_ESCR_T0_OS | P4_ESCR_T0_USR | P4_ESCR_T1_OS \ - P4_ESCR_T1_USR) - -#define P4_PERFCTR_MASK 0xFFFFFFFFFFLL /* 40 bits */ -#define P4_PERFCTR_OVERFLOWED(PMC) ((rdpmc(PMC) & (1LL << 39)) == 0) - -#define P4_CCCR_MSR_FIRST 0x360 /* MSR_BPU_CCCR0 */ -#define P4_PERFCTR_MSR_FIRST 0x300 /* MSR_BPU_COUNTER0 */ - -#define P4_RELOAD_COUNT_TO_PERFCTR_VALUE(V) (1 - (V)) -#define P4_PERFCTR_VALUE_TO_RELOAD_COUNT(P) (1 - (P)) - -struct pmc_md_p4_op_pmcallocate { - uint32_t pm_p4_cccrconfig; - uint32_t pm_p4_escrconfig; -}; - -#ifdef _KERNEL - -/* MD extension for 'struct pmc' */ -struct pmc_md_p4_pmc { - uint32_t pm_p4_cccrvalue; - uint32_t pm_p4_escrvalue; - uint32_t pm_p4_escr; - uint32_t pm_p4_escrmsr; -}; - - -/* - * Prototypes - */ - -int pmc_p4_initialize(struct pmc_mdep *_md, int _ncpus); -void pmc_p4_finalize(struct pmc_mdep *md); - -#endif /* _KERNEL */ -#endif /* _DEV_HWPMC_PIV_H_ */ diff --git a/sys/dev/hwpmc/hwpmc_ppro.c b/sys/dev/hwpmc/hwpmc_ppro.c deleted file mode 100644 index 47fc70c04451..000000000000 --- a/sys/dev/hwpmc/hwpmc_ppro.c +++ /dev/null @@ -1,870 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2003-2005,2008 Joseph Koshy - * Copyright (c) 2007 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by A. Joseph Koshy under - * sponsorship from the FreeBSD Foundation and Google, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * PENTIUM PRO SUPPORT - * - * Quirks: - * - * - Both PMCs are enabled by a single bit P6_EVSEL_EN in performance - * counter '0'. This bit needs to be '1' if any of the two - * performance counters are in use. Perf counters can also be - * switched off by writing zeros to their EVSEL register. - * - * - While the width of these counters is 40 bits, we do not appear to - * have a way of writing 40 bits to the counter MSRs. A WRMSR - * instruction will sign extend bit 31 of the value being written to - * the perf counter -- a value of 0x80000000 written to an perf - * counter register will be sign extended to 0xFF80000000. - * - * This quirk primarily affects thread-mode PMCs in counting mode, as - * these PMCs read and write PMC registers at every context switch. - */ - -struct p6pmc_descr { - struct pmc_descr pm_descr; /* common information */ - uint32_t pm_pmc_msr; - uint32_t pm_evsel_msr; -}; - -static struct p6pmc_descr p6_pmcdesc[P6_NPMCS] = { - -#define P6_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | PMC_CAP_SYSTEM | \ - PMC_CAP_EDGE | PMC_CAP_THRESHOLD | PMC_CAP_READ | PMC_CAP_WRITE | \ - PMC_CAP_INVERT | PMC_CAP_QUALIFIER) - - /* PMC 0 */ - { - .pm_descr = - { - .pd_name ="P6-0", - .pd_class = PMC_CLASS_P6, - .pd_caps = P6_PMC_CAPS, - .pd_width = 40 - }, - .pm_pmc_msr = P6_MSR_PERFCTR0, - .pm_evsel_msr = P6_MSR_EVSEL0 - }, - - /* PMC 1 */ - { - .pm_descr = - { - .pd_name ="P6-1", - .pd_class = PMC_CLASS_P6, - .pd_caps = P6_PMC_CAPS, - .pd_width = 40 - }, - .pm_pmc_msr = P6_MSR_PERFCTR1, - .pm_evsel_msr = P6_MSR_EVSEL1 - } -}; - -static enum pmc_cputype p6_cputype; - -/* - * P6 Event descriptor - * - * The 'pm_flags' field has the following structure: - * - The upper 4 bits are used to track which counter an event is valid on. - * - The lower bits form a bitmask of flags indicating support for the event - * on a given CPU. - */ - -struct p6_event_descr { - const enum pmc_event pm_event; - uint32_t pm_evsel; - uint32_t pm_flags; - uint32_t pm_unitmask; -}; - -#define P6F_CTR(C) (1 << (28 + (C))) -#define P6F_CTR0 P6F_CTR(0) -#define P6F_CTR1 P6F_CTR(1) -#define P6F(CPU) (1 << ((CPU) - PMC_CPU_INTEL_P6)) -#define _P6F(C) P6F(PMC_CPU_INTEL_##C) -#define P6F_P6 _P6F(P6) -#define P6F_CL _P6F(CL) -#define P6F_PII _P6F(PII) -#define P6F_PIII _P6F(PIII) -#define P6F_PM _P6F(PM) -#define P6F_ALL_CPUS (P6F_P6 | P6F_PII | P6F_CL | P6F_PIII | P6F_PM) -#define P6F_ALL_CTRS (P6F_CTR0 | P6F_CTR1) -#define P6F_ALL (P6F_ALL_CPUS | P6F_ALL_CTRS) - -#define P6_EVENT_VALID_FOR_CPU(P,CPU) ((P)->pm_flags & P6F(CPU)) -#define P6_EVENT_VALID_FOR_CTR(P,CTR) ((P)->pm_flags & P6F_CTR(CTR)) - -static const struct p6_event_descr p6_events[] = { - -#define P6_EVDESCR(NAME, EVSEL, FLAGS, UMASK) \ - { \ - .pm_event = PMC_EV_P6_##NAME, \ - .pm_evsel = (EVSEL), \ - .pm_flags = (FLAGS), \ - .pm_unitmask = (UMASK) \ - } - -P6_EVDESCR(DATA_MEM_REFS, 0x43, P6F_ALL, 0x00), -P6_EVDESCR(DCU_LINES_IN, 0x45, P6F_ALL, 0x00), -P6_EVDESCR(DCU_M_LINES_IN, 0x46, P6F_ALL, 0x00), -P6_EVDESCR(DCU_M_LINES_OUT, 0x47, P6F_ALL, 0x00), -P6_EVDESCR(DCU_MISS_OUTSTANDING, 0x47, P6F_ALL, 0x00), -P6_EVDESCR(IFU_FETCH, 0x80, P6F_ALL, 0x00), -P6_EVDESCR(IFU_FETCH_MISS, 0x81, P6F_ALL, 0x00), -P6_EVDESCR(ITLB_MISS, 0x85, P6F_ALL, 0x00), -P6_EVDESCR(IFU_MEM_STALL, 0x86, P6F_ALL, 0x00), -P6_EVDESCR(ILD_STALL, 0x87, P6F_ALL, 0x00), -P6_EVDESCR(L2_IFETCH, 0x28, P6F_ALL, 0x0F), -P6_EVDESCR(L2_LD, 0x29, P6F_ALL, 0x0F), -P6_EVDESCR(L2_ST, 0x2A, P6F_ALL, 0x0F), -P6_EVDESCR(L2_LINES_IN, 0x24, P6F_ALL, 0x0F), -P6_EVDESCR(L2_LINES_OUT, 0x26, P6F_ALL, 0x0F), -P6_EVDESCR(L2_M_LINES_INM, 0x25, P6F_ALL, 0x00), -P6_EVDESCR(L2_M_LINES_OUTM, 0x27, P6F_ALL, 0x0F), -P6_EVDESCR(L2_RQSTS, 0x2E, P6F_ALL, 0x0F), -P6_EVDESCR(L2_ADS, 0x21, P6F_ALL, 0x00), -P6_EVDESCR(L2_DBUS_BUSY, 0x22, P6F_ALL, 0x00), -P6_EVDESCR(L2_DBUS_BUSY_RD, 0x23, P6F_ALL, 0x00), -P6_EVDESCR(BUS_DRDY_CLOCKS, 0x62, P6F_ALL, 0x20), -P6_EVDESCR(BUS_LOCK_CLOCKS, 0x63, P6F_ALL, 0x20), -P6_EVDESCR(BUS_REQ_OUTSTANDING, 0x60, P6F_ALL, 0x00), -P6_EVDESCR(BUS_TRAN_BRD, 0x65, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRAN_RFO, 0x66, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRANS_WB, 0x67, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRAN_IFETCH, 0x68, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRAN_INVAL, 0x69, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRAN_PWR, 0x6A, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRANS_P, 0x6B, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRANS_IO, 0x6C, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRAN_DEF, 0x6D, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRAN_BURST, 0x6E, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRAN_ANY, 0x70, P6F_ALL, 0x20), -P6_EVDESCR(BUS_TRAN_MEM, 0x6F, P6F_ALL, 0x20), -P6_EVDESCR(BUS_DATA_RCV, 0x64, P6F_ALL, 0x00), -P6_EVDESCR(BUS_BNR_DRV, 0x61, P6F_ALL, 0x00), -P6_EVDESCR(BUS_HIT_DRV, 0x7A, P6F_ALL, 0x00), -P6_EVDESCR(BUS_HITM_DRV, 0x7B, P6F_ALL, 0x00), -P6_EVDESCR(BUS_SNOOP_STALL, 0x7E, P6F_ALL, 0x00), -P6_EVDESCR(FLOPS, 0xC1, P6F_ALL_CPUS | P6F_CTR0, 0x00), -P6_EVDESCR(FP_COMPS_OPS_EXE, 0x10, P6F_ALL_CPUS | P6F_CTR0, 0x00), -P6_EVDESCR(FP_ASSIST, 0x11, P6F_ALL_CPUS | P6F_CTR1, 0x00), -P6_EVDESCR(MUL, 0x12, P6F_ALL_CPUS | P6F_CTR1, 0x00), -P6_EVDESCR(DIV, 0x13, P6F_ALL_CPUS | P6F_CTR1, 0x00), -P6_EVDESCR(CYCLES_DIV_BUSY, 0x14, P6F_ALL_CPUS | P6F_CTR0, 0x00), -P6_EVDESCR(LD_BLOCKS, 0x03, P6F_ALL, 0x00), -P6_EVDESCR(SB_DRAINS, 0x04, P6F_ALL, 0x00), -P6_EVDESCR(MISALIGN_MEM_REF, 0x05, P6F_ALL, 0x00), -P6_EVDESCR(EMON_KNI_PREF_DISPATCHED, 0x07, P6F_PIII | P6F_ALL_CTRS, 0x03), -P6_EVDESCR(EMON_KNI_PREF_MISS, 0x4B, P6F_PIII | P6F_ALL_CTRS, 0x03), -P6_EVDESCR(INST_RETIRED, 0xC0, P6F_ALL, 0x00), -P6_EVDESCR(UOPS_RETIRED, 0xC2, P6F_ALL, 0x00), -P6_EVDESCR(INST_DECODED, 0xD0, P6F_ALL, 0x00), -P6_EVDESCR(EMON_KNI_INST_RETIRED, 0xD8, P6F_PIII | P6F_ALL_CTRS, 0x01), -P6_EVDESCR(EMON_KNI_COMP_INST_RET, 0xD9, P6F_PIII | P6F_ALL_CTRS, 0x01), -P6_EVDESCR(HW_INT_RX, 0xC8, P6F_ALL, 0x00), -P6_EVDESCR(CYCLES_INT_MASKED, 0xC6, P6F_ALL, 0x00), -P6_EVDESCR(CYCLES_INT_PENDING_AND_MASKED, 0xC7, P6F_ALL, 0x00), -P6_EVDESCR(BR_INST_RETIRED, 0xC4, P6F_ALL, 0x00), -P6_EVDESCR(BR_MISS_PRED_RETIRED, 0xC5, P6F_ALL, 0x00), -P6_EVDESCR(BR_TAKEN_RETIRED, 0xC9, P6F_ALL, 0x00), -P6_EVDESCR(BR_MISS_PRED_TAKEN_RET, 0xCA, P6F_ALL, 0x00), -P6_EVDESCR(BR_INST_DECODED, 0xE0, P6F_ALL, 0x00), -P6_EVDESCR(BTB_MISSES, 0xE2, P6F_ALL, 0x00), -P6_EVDESCR(BR_BOGUS, 0xE4, P6F_ALL, 0x00), -P6_EVDESCR(BACLEARS, 0xE6, P6F_ALL, 0x00), -P6_EVDESCR(RESOURCE_STALLS, 0xA2, P6F_ALL, 0x00), -P6_EVDESCR(PARTIAL_RAT_STALLS, 0xD2, P6F_ALL, 0x00), -P6_EVDESCR(SEGMENT_REG_LOADS, 0x06, P6F_ALL, 0x00), -P6_EVDESCR(CPU_CLK_UNHALTED, 0x79, P6F_ALL, 0x00), -P6_EVDESCR(MMX_INSTR_EXEC, 0xB0, - P6F_ALL_CTRS | P6F_CL | P6F_PII, 0x00), -P6_EVDESCR(MMX_SAT_INSTR_EXEC, 0xB1, - P6F_ALL_CTRS | P6F_PII | P6F_PIII, 0x00), -P6_EVDESCR(MMX_UOPS_EXEC, 0xB2, - P6F_ALL_CTRS | P6F_PII | P6F_PIII, 0x0F), -P6_EVDESCR(MMX_INSTR_TYPE_EXEC, 0xB3, - P6F_ALL_CTRS | P6F_PII | P6F_PIII, 0x3F), -P6_EVDESCR(FP_MMX_TRANS, 0xCC, - P6F_ALL_CTRS | P6F_PII | P6F_PIII, 0x01), -P6_EVDESCR(MMX_ASSIST, 0xCD, - P6F_ALL_CTRS | P6F_PII | P6F_PIII, 0x00), -P6_EVDESCR(MMX_INSTR_RET, 0xCE, P6F_ALL_CTRS | P6F_PII, 0x00), -P6_EVDESCR(SEG_RENAME_STALLS, 0xD4, - P6F_ALL_CTRS | P6F_PII | P6F_PIII, 0x0F), -P6_EVDESCR(SEG_REG_RENAMES, 0xD5, - P6F_ALL_CTRS | P6F_PII | P6F_PIII, 0x0F), -P6_EVDESCR(RET_SEG_RENAMES, 0xD6, - P6F_ALL_CTRS | P6F_PII | P6F_PIII, 0x00), -P6_EVDESCR(EMON_EST_TRANS, 0x58, P6F_ALL_CTRS | P6F_PM, 0x02), -P6_EVDESCR(EMON_THERMAL_TRIP, 0x59, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_INST_EXEC, 0x88, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_MISSP_EXEC, 0x89, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_BAC_MISSP_EXEC, 0x8A, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_CND_EXEC, 0x8B, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_CND_MISSP_EXEC, 0x8C, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_IND_EXEC, 0x8D, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_IND_MISSP_EXEC, 0x8E, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_RET_EXEC, 0x8F, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_RET_MISSP_EXEC, 0x90, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_RET_BAC_MISSP_EXEC, 0x91, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_CALL_EXEC, 0x92, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_CALL_MISSP_EXEC, 0x93, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(BR_IND_CALL_EXEC, 0x94, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(EMON_SIMD_INSTR_RETIRED, 0xCE, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(EMON_SYNCH_UOPS, 0xD3, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(EMON_ESP_UOPS, 0xD7, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(EMON_FUSED_UOPS_RET, 0xDA, P6F_ALL_CTRS | P6F_PM, 0x03), -P6_EVDESCR(EMON_UNFUSION, 0xDB, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(EMON_PREF_RQSTS_UP, 0xF0, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(EMON_PREF_RQSTS_DN, 0xD8, P6F_ALL_CTRS | P6F_PM, 0x00), -P6_EVDESCR(EMON_SSE_SSE2_INST_RETIRED, 0xD8, P6F_ALL_CTRS | P6F_PM, 0x03), -P6_EVDESCR(EMON_SSE_SSE2_COMP_INST_RETIRED, 0xD9, P6F_ALL_CTRS | P6F_PM, 0x03) - -#undef P6_EVDESCR -}; - -#define P6_NEVENTS (PMC_EV_P6_LAST - PMC_EV_P6_FIRST + 1) - -static const struct p6_event_descr * -p6_find_event(enum pmc_event ev) -{ - int n; - - for (n = 0; n < P6_NEVENTS; n++) - if (p6_events[n].pm_event == ev) - break; - if (n == P6_NEVENTS) - return NULL; - return &p6_events[n]; -} - -/* - * Per-CPU data structure for P6 class CPUs - * - * [common stuff] - * [flags for maintaining PMC start/stop state] - * [3 struct pmc_hw pointers] - * [3 struct pmc_hw structures] - */ - -struct p6_cpu { - struct pmc_hw pc_p6pmcs[P6_NPMCS]; - uint32_t pc_state; -}; - -static struct p6_cpu **p6_pcpu; - -/* - * If CTR1 is active, we need to keep the 'EN' bit if CTR0 set, - * with the rest of CTR0 being zero'ed out. - */ -#define P6_SYNC_CTR_STATE(PC) do { \ - uint32_t _config, _enable; \ - _enable = 0; \ - if ((PC)->pc_state & 0x02) \ - _enable |= P6_EVSEL_EN; \ - if ((PC)->pc_state & 0x01) \ - _config = rdmsr(P6_MSR_EVSEL0) | \ - P6_EVSEL_EN; \ - else \ - _config = 0; \ - wrmsr(P6_MSR_EVSEL0, _config | _enable); \ - } while (0) - -#define P6_MARK_STARTED(PC,RI) do { \ - (PC)->pc_state |= (1 << ((RI)-1)); \ - } while (0) - -#define P6_MARK_STOPPED(PC,RI) do { \ - (PC)->pc_state &= ~(1<< ((RI)-1)); \ - } while (0) - -static int -p6_pcpu_init(struct pmc_mdep *md, int cpu) -{ - int first_ri, n; - struct p6_cpu *p6c; - struct pmc_cpu *pc; - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] bad cpu %d", __LINE__, cpu)); - - PMCDBG1(MDP,INI,0,"p6-init cpu=%d", cpu); - - p6c = malloc(sizeof (struct p6_cpu), M_PMC, M_WAITOK|M_ZERO); - pc = pmc_pcpu[cpu]; - - KASSERT(pc != NULL, ("[p6,%d] cpu %d null per-cpu", __LINE__, cpu)); - - phw = p6c->pc_p6pmcs; - p6_pcpu[cpu] = p6c; - - first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P6].pcd_ri; - - for (n = 0; n < P6_NPMCS; n++, phw++) { - phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | - PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(n); - phw->phw_pmc = NULL; - pc->pc_hwpmcs[n + first_ri] = phw; - } - - return (0); -} - -static int -p6_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - int first_ri, n; - struct p6_cpu *p6c; - struct pmc_cpu *pc; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] bad cpu %d", __LINE__, cpu)); - - PMCDBG1(MDP,INI,0,"p6-cleanup cpu=%d", cpu); - - p6c = p6_pcpu[cpu]; - p6_pcpu[cpu] = NULL; - - KASSERT(p6c != NULL, ("[p6,%d] null pcpu", __LINE__)); - - free(p6c, M_PMC); - - first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P6].pcd_ri; - pc = pmc_pcpu[cpu]; - for (n = 0; n < P6_NPMCS; n++) - pc->pc_hwpmcs[n + first_ri] = NULL; - - return (0); -} - -static int -p6_read_pmc(int cpu, int ri, pmc_value_t *v) -{ - struct pmc *pm; - struct p6pmc_descr *pd; - pmc_value_t tmp; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal cpu value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] illegal row-index %d", __LINE__, ri)); - - pm = p6_pcpu[cpu]->pc_p6pmcs[ri].phw_pmc; - pd = &p6_pmcdesc[ri]; - - KASSERT(pm, - ("[p6,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri)); - - tmp = rdmsr(pd->pm_pmc_msr) & P6_PERFCTR_READ_MASK; - if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) - *v = P6_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); - else - *v = tmp; - - PMCDBG4(MDP,REA,1, "p6-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, - pd->pm_pmc_msr, *v); - - return (0); -} - -static int -p6_write_pmc(int cpu, int ri, pmc_value_t v) -{ - struct pmc *pm; - struct p6pmc_descr *pd; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal cpu value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] illegal row-index %d", __LINE__, ri)); - - pm = p6_pcpu[cpu]->pc_p6pmcs[ri].phw_pmc; - pd = &p6_pmcdesc[ri]; - - KASSERT(pm, - ("[p6,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri)); - - PMCDBG4(MDP,WRI,1, "p6-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, - pd->pm_pmc_msr, v); - - if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) - v = P6_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - - wrmsr(pd->pm_pmc_msr, v & P6_PERFCTR_WRITE_MASK); - - return (0); -} - -static int -p6_config_pmc(int cpu, int ri, struct pmc *pm) -{ - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal CPU %d", __LINE__, cpu)); - - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] illegal row-index %d", __LINE__, ri)); - - PMCDBG3(MDP,CFG,1, "p6-config cpu=%d ri=%d pm=%p", cpu, ri, pm); - - KASSERT(p6_pcpu[cpu] != NULL, ("[p6,%d] null per-cpu %d", __LINE__, - cpu)); - - p6_pcpu[cpu]->pc_p6pmcs[ri].phw_pmc = pm; - - return (0); -} - -/* - * Retrieve a configured PMC pointer from hardware state. - */ - -static int -p6_get_config(int cpu, int ri, struct pmc **ppm) -{ - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal CPU %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] illegal row-index %d", __LINE__, ri)); - - *ppm = p6_pcpu[cpu]->pc_p6pmcs[ri].phw_pmc; - - return (0); -} - - -/* - * A pmc may be allocated to a given row index if: - * - the event is valid for this CPU - * - the event is valid for this counter index - */ - -static int -p6_allocate_pmc(int cpu, int ri, struct pmc *pm, - const struct pmc_op_pmcallocate *a) -{ - uint32_t allowed_unitmask, caps, config, unitmask; - const struct p6pmc_descr *pd; - const struct p6_event_descr *pevent; - enum pmc_event ev; - - (void) cpu; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal CPU %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] illegal row-index value %d", __LINE__, ri)); - - pd = &p6_pmcdesc[ri]; - - PMCDBG4(MDP,ALL,1, "p6-allocate ri=%d class=%d pmccaps=0x%x " - "reqcaps=0x%x", ri, pd->pm_descr.pd_class, pd->pm_descr.pd_caps, - pm->pm_caps); - - /* check class */ - if (pd->pm_descr.pd_class != a->pm_class) - return (EINVAL); - - /* check requested capabilities */ - caps = a->pm_caps; - if ((pd->pm_descr.pd_caps & caps) != caps) - return (EPERM); - - ev = pm->pm_event; - - if (ev < PMC_EV_P6_FIRST || ev > PMC_EV_P6_LAST) - return (EINVAL); - - if ((pevent = p6_find_event(ev)) == NULL) - return (ESRCH); - - if (!P6_EVENT_VALID_FOR_CPU(pevent, p6_cputype) || - !P6_EVENT_VALID_FOR_CTR(pevent, (ri-1))) - return (EINVAL); - - /* For certain events, Pentium M differs from the stock P6 */ - allowed_unitmask = 0; - if (p6_cputype == PMC_CPU_INTEL_PM) { - if (ev == PMC_EV_P6_L2_LD || ev == PMC_EV_P6_L2_LINES_IN || - ev == PMC_EV_P6_L2_LINES_OUT) - allowed_unitmask = P6_EVSEL_TO_UMASK(0x3F); - else if (ev == PMC_EV_P6_L2_M_LINES_OUTM) - allowed_unitmask = P6_EVSEL_TO_UMASK(0x30); - } else - allowed_unitmask = P6_EVSEL_TO_UMASK(pevent->pm_unitmask); - - unitmask = a->pm_md.pm_ppro.pm_ppro_config & P6_EVSEL_UMASK_MASK; - if (unitmask & ~allowed_unitmask) /* disallow reserved bits */ - return (EINVAL); - - if (ev == PMC_EV_P6_MMX_UOPS_EXEC) /* hardcoded mask */ - unitmask = P6_EVSEL_TO_UMASK(0x0F); - - config = 0; - - config |= P6_EVSEL_EVENT_SELECT(pevent->pm_evsel); - - if (unitmask & (caps & PMC_CAP_QUALIFIER)) - config |= unitmask; - - if (caps & PMC_CAP_THRESHOLD) - config |= a->pm_md.pm_ppro.pm_ppro_config & - P6_EVSEL_CMASK_MASK; - - /* set at least one of the 'usr' or 'os' caps */ - if (caps & PMC_CAP_USER) - config |= P6_EVSEL_USR; - if (caps & PMC_CAP_SYSTEM) - config |= P6_EVSEL_OS; - if ((caps & (PMC_CAP_USER|PMC_CAP_SYSTEM)) == 0) - config |= (P6_EVSEL_USR|P6_EVSEL_OS); - - if (caps & PMC_CAP_EDGE) - config |= P6_EVSEL_E; - if (caps & PMC_CAP_INVERT) - config |= P6_EVSEL_INV; - if (caps & PMC_CAP_INTERRUPT) - config |= P6_EVSEL_INT; - - pm->pm_md.pm_ppro.pm_ppro_evsel = config; - - PMCDBG1(MDP,ALL,2, "p6-allocate config=0x%x", config); - - return (0); -} - -static int -p6_release_pmc(int cpu, int ri, struct pmc *pm) -{ - (void) pm; - - PMCDBG3(MDP,REL,1, "p6-release cpu=%d ri=%d pm=%p", cpu, ri, pm); - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] illegal row-index %d", __LINE__, ri)); - - KASSERT(p6_pcpu[cpu]->pc_p6pmcs[ri].phw_pmc == NULL, - ("[p6,%d] PHW pmc non-NULL", __LINE__)); - - return (0); -} - -static int -p6_start_pmc(int cpu, int ri) -{ - uint32_t config; - struct pmc *pm; - struct p6_cpu *pc; - const struct p6pmc_descr *pd; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] illegal row-index %d", __LINE__, ri)); - - pc = p6_pcpu[cpu]; - pm = pc->pc_p6pmcs[ri].phw_pmc; - pd = &p6_pmcdesc[ri]; - - KASSERT(pm, - ("[p6,%d] starting cpu%d,ri%d with no pmc configured", - __LINE__, cpu, ri)); - - PMCDBG2(MDP,STA,1, "p6-start cpu=%d ri=%d", cpu, ri); - - config = pm->pm_md.pm_ppro.pm_ppro_evsel; - - PMCDBG4(MDP,STA,2, "p6-start/2 cpu=%d ri=%d evselmsr=0x%x config=0x%x", - cpu, ri, pd->pm_evsel_msr, config); - - P6_MARK_STARTED(pc, ri); - wrmsr(pd->pm_evsel_msr, config); - - P6_SYNC_CTR_STATE(pc); - - return (0); -} - -static int -p6_stop_pmc(int cpu, int ri) -{ - struct pmc *pm; - struct p6_cpu *pc; - struct p6pmc_descr *pd; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal cpu value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] illegal row index %d", __LINE__, ri)); - - pc = p6_pcpu[cpu]; - pm = pc->pc_p6pmcs[ri].phw_pmc; - pd = &p6_pmcdesc[ri]; - - KASSERT(pm, - ("[p6,%d] cpu%d ri%d no configured PMC to stop", __LINE__, - cpu, ri)); - - PMCDBG2(MDP,STO,1, "p6-stop cpu=%d ri=%d", cpu, ri); - - wrmsr(pd->pm_evsel_msr, 0); /* stop hw */ - P6_MARK_STOPPED(pc, ri); /* update software state */ - - P6_SYNC_CTR_STATE(pc); /* restart CTR1 if need be */ - - PMCDBG2(MDP,STO,2, "p6-stop/2 cpu=%d ri=%d", cpu, ri); - - return (0); -} - -static int -p6_intr(int cpu, struct trapframe *tf) -{ - int error, retval, ri; - uint32_t perf0cfg; - struct pmc *pm; - struct p6_cpu *pc; - pmc_value_t v; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] CPU %d out of range", __LINE__, cpu)); - - retval = 0; - pc = p6_pcpu[cpu]; - - /* stop both PMCs */ - perf0cfg = rdmsr(P6_MSR_EVSEL0); - wrmsr(P6_MSR_EVSEL0, perf0cfg & ~P6_EVSEL_EN); - - for (ri = 0; ri < P6_NPMCS; ri++) { - - if ((pm = pc->pc_p6pmcs[ri].phw_pmc) == NULL || - !PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) { - continue; - } - - if (!P6_PMC_HAS_OVERFLOWED(ri)) - continue; - - retval = 1; - - if (pm->pm_state != PMC_STATE_RUNNING) - continue; - - error = pmc_process_interrupt(cpu, PMC_HR, pm, tf, - TRAPF_USERMODE(tf)); - if (error) - P6_MARK_STOPPED(pc,ri); - - /* reload sampling count */ - v = pm->pm_sc.pm_reloadcount; - wrmsr(P6_MSR_PERFCTR0 + ri, - P6_RELOAD_COUNT_TO_PERFCTR_VALUE(v)); - - } - - /* - * On P6 processors, the LAPIC needs to have its PMC interrupt - * unmasked after a PMC interrupt. - */ - if (retval) - lapic_reenable_pmc(); - - if (retval) - counter_u64_add(pmc_stats.pm_intr_processed, 1); - else - counter_u64_add(pmc_stats.pm_intr_ignored, 1); - - /* restart counters that can be restarted */ - P6_SYNC_CTR_STATE(pc); - - return (retval); -} - -static int -p6_describe(int cpu, int ri, struct pmc_info *pi, - struct pmc **ppmc) -{ - int error; - size_t copied; - struct pmc_hw *phw; - struct p6pmc_descr *pd; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[p6,%d] illegal CPU %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d] row-index %d out of range", __LINE__, ri)); - - phw = pmc_pcpu[cpu]->pc_hwpmcs[ri]; - pd = &p6_pmcdesc[ri]; - - KASSERT(phw == &p6_pcpu[cpu]->pc_p6pmcs[ri], - ("[p6,%d] phw mismatch", __LINE__)); - - if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name, - PMC_NAME_MAX, &copied)) != 0) - return (error); - - pi->pm_class = pd->pm_descr.pd_class; - - if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { - pi->pm_enabled = TRUE; - *ppmc = phw->phw_pmc; - } else { - pi->pm_enabled = FALSE; - *ppmc = NULL; - } - - return (0); -} - -static int -p6_get_msr(int ri, uint32_t *msr) -{ - KASSERT(ri >= 0 && ri < P6_NPMCS, - ("[p6,%d ri %d out of range", __LINE__, ri)); - - *msr = p6_pmcdesc[ri].pm_pmc_msr - P6_MSR_PERFCTR0; - - return (0); -} - -int -pmc_p6_initialize(struct pmc_mdep *md, int ncpus) -{ - struct pmc_classdep *pcd; - - KASSERT(cpu_vendor_id == CPU_VENDOR_INTEL, - ("[p6,%d] Initializing non-intel processor", __LINE__)); - - PMCDBG0(MDP,INI,1, "p6-initialize"); - - /* Allocate space for pointers to per-cpu descriptors. */ - p6_pcpu = malloc(sizeof(struct p6_cpu **) * ncpus, M_PMC, - M_ZERO|M_WAITOK); - - /* Fill in the class dependent descriptor. */ - pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P6]; - - switch (md->pmd_cputype) { - - /* - * P6 Family Processors - */ - case PMC_CPU_INTEL_P6: - case PMC_CPU_INTEL_CL: - case PMC_CPU_INTEL_PII: - case PMC_CPU_INTEL_PIII: - case PMC_CPU_INTEL_PM: - - p6_cputype = md->pmd_cputype; - - pcd->pcd_caps = P6_PMC_CAPS; - pcd->pcd_class = PMC_CLASS_P6; - pcd->pcd_num = P6_NPMCS; - pcd->pcd_ri = md->pmd_npmc; - pcd->pcd_width = 40; - - pcd->pcd_allocate_pmc = p6_allocate_pmc; - pcd->pcd_config_pmc = p6_config_pmc; - pcd->pcd_describe = p6_describe; - pcd->pcd_get_config = p6_get_config; - pcd->pcd_get_msr = p6_get_msr; - pcd->pcd_pcpu_fini = p6_pcpu_fini; - pcd->pcd_pcpu_init = p6_pcpu_init; - pcd->pcd_read_pmc = p6_read_pmc; - pcd->pcd_release_pmc = p6_release_pmc; - pcd->pcd_start_pmc = p6_start_pmc; - pcd->pcd_stop_pmc = p6_stop_pmc; - pcd->pcd_write_pmc = p6_write_pmc; - - md->pmd_pcpu_fini = NULL; - md->pmd_pcpu_init = NULL; - md->pmd_intr = p6_intr; - - md->pmd_npmc += P6_NPMCS; - - break; - - default: - KASSERT(0,("[p6,%d] Unknown CPU type", __LINE__)); - return ENOSYS; - } - - return (0); -} - -void -pmc_p6_finalize(struct pmc_mdep *md) -{ -#if defined(INVARIANTS) - int i, ncpus; -#endif - - KASSERT(p6_pcpu != NULL, ("[p6,%d] NULL p6_pcpu", __LINE__)); - -#if defined(INVARIANTS) - ncpus = pmc_cpu_max(); - for (i = 0; i < ncpus; i++) - KASSERT(p6_pcpu[i] == NULL, ("[p6,%d] non-null pcpu %d", - __LINE__, i)); -#endif - - free(p6_pcpu, M_PMC); - p6_pcpu = NULL; -} diff --git a/sys/dev/hwpmc/hwpmc_ppro.h b/sys/dev/hwpmc/hwpmc_ppro.h deleted file mode 100644 index 55238704809a..000000000000 --- a/sys/dev/hwpmc/hwpmc_ppro.h +++ /dev/null @@ -1,86 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2005, Joseph Koshy - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* Machine dependent interfaces */ - -#ifndef _DEV_HWPMC_PPRO_H_ -#define _DEV_HWPMC_PPRO_H_ - -/* Intel PPro, Celeron, P-II, P-III, Pentium-M PMCS */ - -#define P6_NPMCS 2 /* 2 PMCs */ - -#define P6_EVSEL_CMASK_MASK 0xFF000000 -#define P6_EVSEL_TO_CMASK(C) (((C) & 0xFF) << 24) -#define P6_EVSEL_INV (1 << 23) -#define P6_EVSEL_EN (1 << 22) -#define P6_EVSEL_INT (1 << 20) -#define P6_EVSEL_PC (1 << 19) -#define P6_EVSEL_E (1 << 18) -#define P6_EVSEL_OS (1 << 17) -#define P6_EVSEL_USR (1 << 16) -#define P6_EVSEL_UMASK_MASK 0x0000FF00 -#define P6_EVSEL_TO_UMASK(U) (((U) & 0xFF) << 8) -#define P6_EVSEL_EVENT_SELECT(ES) ((ES) & 0xFF) -#define P6_EVSEL_RESERVED (1 << 21) - -#define P6_MSR_EVSEL0 0x0186 -#define P6_MSR_EVSEL1 0x0187 -#define P6_MSR_PERFCTR0 0x00C1 -#define P6_MSR_PERFCTR1 0x00C2 - -#define P6_PERFCTR_READ_MASK 0xFFFFFFFFFFLL /* 40 bits */ -#define P6_PERFCTR_WRITE_MASK 0xFFFFFFFFU /* 32 bits */ - -#define P6_RELOAD_COUNT_TO_PERFCTR_VALUE(R) (-(R)) -#define P6_PERFCTR_VALUE_TO_RELOAD_COUNT(P) (-(P)) - -#define P6_PMC_HAS_OVERFLOWED(P) ((rdpmc(P) & (1LL << 39)) == 0) - -struct pmc_md_ppro_op_pmcallocate { - uint32_t pm_ppro_config; -}; - -#ifdef _KERNEL - -/* MD extension for 'struct pmc' */ -struct pmc_md_ppro_pmc { - uint32_t pm_ppro_evsel; -}; - -/* - * Prototypes - */ - -int pmc_p6_initialize(struct pmc_mdep *_md, int _ncpus); -void pmc_p6_finalize(struct pmc_mdep *_md); - -#endif /* _KERNEL */ -#endif /* _DEV_HWPMC_PPRO_H_ */ diff --git a/sys/dev/hwpmc/hwpmc_uncore.c b/sys/dev/hwpmc/hwpmc_uncore.c index 50f5e988c643..594367c3542a 100644 --- a/sys/dev/hwpmc/hwpmc_uncore.c +++ b/sys/dev/hwpmc/hwpmc_uncore.c @@ -207,9 +207,6 @@ ucf_allocate_pmc(int cpu, int ri, struct pmc *pm, return (EINVAL); ev = pm->pm_event; - if (ev < PMC_EV_UCF_FIRST || ev > PMC_EV_UCF_LAST) - return (EINVAL); - flags = UCF_EN; pm->pm_md.pm_ucf.pm_ucf_ctrl = (flags << (ri * 4)); @@ -485,313 +482,6 @@ struct ucp_event_descr { #define UCP_F_CMASK 0xFF000000 -static struct ucp_event_descr ucp_events[] = { -#undef UCPDESCR -#define UCPDESCR(N,EV,UM,FLAGS) { \ - .ucp_ev = PMC_EV_UCP_EVENT_##N, \ - .ucp_evcode = (EV), \ - .ucp_umask = (UM), \ - .ucp_flags = (FLAGS) \ - } - - UCPDESCR(00H_01H, 0x00, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(00H_02H, 0x00, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(00H_04H, 0x00, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(01H_01H, 0x01, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(01H_02H, 0x01, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(01H_04H, 0x01, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(02H_01H, 0x02, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(03H_01H, 0x03, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(03H_02H, 0x03, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(03H_04H, 0x03, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(03H_08H, 0x03, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(03H_10H, 0x03, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(03H_20H, 0x03, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(03H_40H, 0x03, 0x40, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(04H_01H, 0x04, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(04H_02H, 0x04, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(04H_04H, 0x04, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(04H_08H, 0x04, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(04H_10H, 0x04, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(05H_01H, 0x05, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(05H_02H, 0x05, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(05H_04H, 0x05, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(06H_01H, 0x06, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(06H_02H, 0x06, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(06H_04H, 0x06, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(06H_08H, 0x06, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(06H_10H, 0x06, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(06H_20H, 0x06, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(07H_01H, 0x07, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(07H_02H, 0x07, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(07H_04H, 0x07, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(07H_08H, 0x07, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(07H_10H, 0x07, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(07H_20H, 0x07, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(07H_24H, 0x07, 0x24, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(08H_01H, 0x08, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(08H_02H, 0x08, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(08H_04H, 0x08, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(08H_03H, 0x08, 0x03, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(09H_01H, 0x09, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(09H_02H, 0x09, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(09H_04H, 0x09, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(09H_03H, 0x09, 0x03, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(0AH_01H, 0x0A, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0AH_02H, 0x0A, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0AH_04H, 0x0A, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0AH_08H, 0x0A, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0AH_0FH, 0x0A, 0x0F, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(0BH_01H, 0x0B, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0BH_02H, 0x0B, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0BH_04H, 0x0B, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0BH_08H, 0x0B, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0BH_10H, 0x0B, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(0BH_1FH, 0x0B, 0x1F, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(0CH_01H, 0x0C, 0x01, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_02H, 0x0C, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_04H_E, 0x0C, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_04H_F, 0x0C, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_04H_M, 0x0C, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_04H_S, 0x0C, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_08H_E, 0x0C, 0x08, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_08H_F, 0x0C, 0x08, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_08H_M, 0x0C, 0x08, UCP_F_FM | UCP_F_WM), - UCPDESCR(0CH_08H_S, 0x0C, 0x08, UCP_F_FM | UCP_F_WM), - - UCPDESCR(20H_01H, 0x20, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(20H_02H, 0x20, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(20H_04H, 0x20, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(20H_08H, 0x20, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(20H_10H, 0x20, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(20H_20H, 0x20, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(21H_01H, 0x21, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(21H_02H, 0x21, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(21H_04H, 0x21, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(22H_01H, 0x22, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB | UCP_F_HW), - UCPDESCR(22H_02H, 0x22, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB | UCP_F_HW), - UCPDESCR(22H_04H, 0x22, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB | UCP_F_HW), - UCPDESCR(22H_08H, 0x22, 0x08, UCP_F_FM | UCP_F_SB | UCP_F_HW), - UCPDESCR(22H_10H, 0x22, 0x10, UCP_F_FM | UCP_F_HW), - UCPDESCR(22H_20H, 0x22, 0x20, UCP_F_FM | UCP_F_SB | UCP_F_HW), - UCPDESCR(22H_40H, 0x22, 0x40, UCP_F_FM | UCP_F_SB | UCP_F_HW), - UCPDESCR(22H_80H, 0x22, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), - - UCPDESCR(23H_01H, 0x23, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(23H_02H, 0x23, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(23H_04H, 0x23, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(24H_02H, 0x24, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(24H_04H, 0x24, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(25H_01H, 0x25, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(25H_02H, 0x25, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(25H_04H, 0x25, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(26H_01H, 0x26, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(27H_01H, 0x27, 0x01, UCP_F_FM | UCP_F_I7), - UCPDESCR(27H_02H, 0x27, 0x02, UCP_F_FM | UCP_F_I7), - UCPDESCR(27H_04H, 0x27, 0x04, UCP_F_FM | UCP_F_I7), - UCPDESCR(27H_08H, 0x27, 0x08, UCP_F_FM | UCP_F_I7), - UCPDESCR(27H_10H, 0x27, 0x10, UCP_F_FM | UCP_F_I7), - UCPDESCR(27H_20H, 0x27, 0x20, UCP_F_FM | UCP_F_I7), - - UCPDESCR(28H_01H, 0x28, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(28H_02H, 0x28, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(28H_04H, 0x28, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(28H_08H, 0x28, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(28H_10H, 0x28, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(28H_20H, 0x28, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(29H_01H, 0x29, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(29H_02H, 0x29, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(29H_04H, 0x29, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(29H_08H, 0x29, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(29H_10H, 0x29, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(29H_20H, 0x29, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(2AH_01H, 0x2A, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2AH_02H, 0x2A, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2AH_04H, 0x2A, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2AH_07H, 0x2A, 0x07, UCP_F_FM | UCP_F_WM), - - UCPDESCR(2BH_01H, 0x2B, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2BH_02H, 0x2B, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2BH_04H, 0x2B, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2BH_07H, 0x2B, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(2CH_01H, 0x2C, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2CH_02H, 0x2C, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2CH_04H, 0x2C, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2CH_07H, 0x2C, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(2DH_01H, 0x2D, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2DH_02H, 0x2D, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2DH_04H, 0x2D, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2DH_07H, 0x2D, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(2EH_01H, 0x2E, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2EH_02H, 0x2E, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2EH_04H, 0x2E, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2EH_07H, 0x2E, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(2FH_01H, 0x2F, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2FH_02H, 0x2F, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2FH_04H, 0x2F, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2FH_07H, 0x2F, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2FH_08H, 0x2F, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2FH_10H, 0x2F, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2FH_20H, 0x2F, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(2FH_38H, 0x2F, 0x38, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(30H_01H, 0x30, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(30H_02H, 0x30, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(30H_04H, 0x30, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(30H_07H, 0x30, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(31H_01H, 0x31, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(31H_02H, 0x31, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(31H_04H, 0x31, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(31H_07H, 0x31, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(32H_01H, 0x32, 0x01, UCP_F_FM | UCP_F_WM), - UCPDESCR(32H_02H, 0x32, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(32H_04H, 0x32, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(32H_07H, 0x32, 0x07, UCP_F_FM | UCP_F_WM), - - UCPDESCR(33H_01H, 0x33, 0x01, UCP_F_FM | UCP_F_WM), - UCPDESCR(33H_02H, 0x33, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(33H_04H, 0x33, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(33H_07H, 0x33, 0x07, UCP_F_FM | UCP_F_WM), - - UCPDESCR(34H_01H, 0x34, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | - UCP_F_HW), - UCPDESCR(34H_02H, 0x34, 0x02, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_04H, 0x34, 0x04, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_06H, 0x34, 0x06, UCP_F_FM | UCP_F_HW), - UCPDESCR(34H_08H, 0x34, 0x08, UCP_F_FM | UCP_F_WM | UCP_F_SB | - UCP_F_HW), - UCPDESCR(34H_10H, 0x34, 0x10, UCP_F_FM | UCP_F_WM | UCP_F_SB | - UCP_F_HW), - UCPDESCR(34H_20H, 0x34, 0x20, UCP_F_FM | UCP_F_WM | UCP_F_SB | - UCP_F_HW), - UCPDESCR(34H_40H, 0x34, 0x40, UCP_F_FM | UCP_F_SB | UCP_F_HW), - UCPDESCR(34H_80H, 0x34, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), - - UCPDESCR(35H_01H, 0x35, 0x01, UCP_F_FM | UCP_F_WM), - UCPDESCR(35H_02H, 0x35, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(35H_04H, 0x35, 0x04, UCP_F_FM | UCP_F_WM), - - UCPDESCR(40H_01H, 0x40, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(40H_02H, 0x40, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(40H_04H, 0x40, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(40H_08H, 0x40, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(40H_10H, 0x40, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(40H_20H, 0x40, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(40H_07H, 0x40, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(40H_38H, 0x40, 0x38, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(41H_01H, 0x41, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(41H_02H, 0x41, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(41H_04H, 0x41, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(41H_08H, 0x41, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(41H_10H, 0x41, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(41H_20H, 0x41, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(41H_07H, 0x41, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(41H_38H, 0x41, 0x38, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(42H_01H, 0x42, 0x01, UCP_F_FM | UCP_F_WM), - UCPDESCR(42H_02H, 0x42, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(42H_04H, 0x42, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(42H_08H, 0x42, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(43H_01H, 0x43, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(43H_02H, 0x43, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(60H_01H, 0x60, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(60H_02H, 0x60, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(60H_04H, 0x60, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(61H_01H, 0x61, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(61H_02H, 0x61, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(61H_04H, 0x61, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(62H_01H, 0x62, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(62H_02H, 0x62, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(62H_04H, 0x62, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(63H_01H, 0x63, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(63H_02H, 0x63, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(63H_04H, 0x63, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(63H_08H, 0x63, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(63H_10H, 0x63, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(63H_20H, 0x63, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(64H_01H, 0x64, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(64H_02H, 0x64, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(64H_04H, 0x64, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(64H_08H, 0x64, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(64H_10H, 0x64, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(64H_20H, 0x64, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(65H_01H, 0x65, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(65H_02H, 0x65, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(65H_04H, 0x65, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(66H_01H, 0x66, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(66H_02H, 0x66, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - UCPDESCR(66H_04H, 0x66, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), - - UCPDESCR(67H_01H, 0x67, 0x01, UCP_F_FM | UCP_F_WM), - - UCPDESCR(80H_01H, 0x80, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | - UCP_F_HW), - UCPDESCR(80H_02H, 0x80, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(80H_04H, 0x80, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(80H_08H, 0x80, 0x08, UCP_F_FM | UCP_F_WM), - - UCPDESCR(81H_01H, 0x81, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | - UCP_F_HW), - UCPDESCR(81H_02H, 0x81, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(81H_04H, 0x81, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(81H_08H, 0x81, 0x08, UCP_F_FM | UCP_F_WM), - UCPDESCR(81H_20H, 0x81, 0x20, UCP_F_FM | UCP_F_SB | UCP_F_HW), - UCPDESCR(81H_80H, 0x81, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), - - UCPDESCR(82H_01H, 0x82, 0x01, UCP_F_FM | UCP_F_WM), - - UCPDESCR(83H_01H, 0x83, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | - UCP_F_HW), - UCPDESCR(83H_02H, 0x83, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(83H_04H, 0x83, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(83H_08H, 0x83, 0x08, UCP_F_FM | UCP_F_WM), - - UCPDESCR(84H_01H, 0x84, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | - UCP_F_HW), - UCPDESCR(84H_02H, 0x84, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(84H_04H, 0x84, 0x04, UCP_F_FM | UCP_F_WM), - UCPDESCR(84H_08H, 0x84, 0x08, UCP_F_FM | UCP_F_WM), - UCPDESCR(85H_02H, 0x85, 0x02, UCP_F_FM | UCP_F_WM), - UCPDESCR(86H_01H, 0x86, 0x01, UCP_F_FM | UCP_F_WM) -}; - static pmc_value_t ucp_perfctr_value_to_reload_count(pmc_value_t v) { @@ -809,16 +499,16 @@ ucp_reload_count_to_perfctr_value(pmc_value_t rlc) * Counter specific event information for Sandybridge and Haswell */ static int -ucp_event_sb_hw_ok_on_counter(enum pmc_event pe, int ri) +ucp_event_sb_hw_ok_on_counter(uint8_t ev, int ri) { uint32_t mask; - switch (pe) { + switch (ev) { /* * Events valid only on counter 0. */ - case PMC_EV_UCP_EVENT_80H_01H: - case PMC_EV_UCP_EVENT_83H_01H: + case 0x80: + case 0x83: mask = (1 << 0); break; @@ -833,10 +523,9 @@ static int ucp_allocate_pmc(int cpu, int ri, struct pmc *pm, const struct pmc_op_pmcallocate *a) { - int n; - enum pmc_event ev; - struct ucp_event_descr *ie; - uint32_t caps, config, cpuflag, evsel; + uint8_t ev; + uint32_t caps; + const struct pmc_md_ucp_op_pmcallocate *ucp; KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); @@ -848,8 +537,8 @@ ucp_allocate_pmc(int cpu, int ri, struct pmc *pm, if ((UCP_PMC_CAPS & caps) != caps) return (EPERM); - ev = pm->pm_event; - + ucp = &a->pm_md.pm_ucp; + ev = UCP_EVSEL(ucp->pm_ucp_config); switch (uncore_cputype) { case PMC_CPU_INTEL_HASWELL: case PMC_CPU_INTEL_SANDYBRIDGE: @@ -860,66 +549,7 @@ ucp_allocate_pmc(int cpu, int ri, struct pmc *pm, break; } - - /* - * Look for an event descriptor with matching CPU and event id - * fields. - */ - - switch (uncore_cputype) { - case PMC_CPU_INTEL_COREI7: - cpuflag = UCP_F_I7; - break; - case PMC_CPU_INTEL_HASWELL: - cpuflag = UCP_F_HW; - break; - case PMC_CPU_INTEL_SANDYBRIDGE: - cpuflag = UCP_F_SB; - break; - case PMC_CPU_INTEL_WESTMERE: - cpuflag = UCP_F_WM; - break; - default: - return (EINVAL); - } - - for (n = 0, ie = ucp_events; n < nitems(ucp_events); n++, ie++) - if (ie->ucp_ev == ev && ie->ucp_flags & cpuflag) - break; - - if (n == nitems(ucp_events)) - return (EINVAL); - - /* - * A matching event descriptor has been found, so start - * assembling the contents of the event select register. - */ - evsel = ie->ucp_evcode | UCP_EN; - - config = a->pm_md.pm_ucp.pm_ucp_config & ~UCP_F_CMASK; - - /* - * If the event uses a fixed umask value, reject any umask - * bits set by the user. - */ - if (ie->ucp_flags & UCP_F_FM) { - - if (UCP_UMASK(config) != 0) - return (EINVAL); - - evsel |= (ie->ucp_umask << 8); - - } else - return (EINVAL); - - if (caps & PMC_CAP_THRESHOLD) - evsel |= (a->pm_md.pm_ucp.pm_ucp_config & UCP_F_CMASK); - if (caps & PMC_CAP_EDGE) - evsel |= UCP_EDGE; - if (caps & PMC_CAP_INVERT) - evsel |= UCP_INV; - - pm->pm_md.pm_ucp.pm_ucp_evsel = evsel; + pm->pm_md.pm_ucp.pm_ucp_evsel = ucp->pm_ucp_config | UCP_EN; return (0); } @@ -1074,7 +704,6 @@ ucp_start_pmc(int cpu, int ri) default: break; } - wrmsr(SELECTSEL(uncore_cputype) + ri, evsel); do { diff --git a/sys/dev/hwpmc/hwpmc_uncore.h b/sys/dev/hwpmc/hwpmc_uncore.h index 64bf650dd5bc..ac1623e7737e 100644 --- a/sys/dev/hwpmc/hwpmc_uncore.h +++ b/sys/dev/hwpmc/hwpmc_uncore.h @@ -56,7 +56,6 @@ struct pmc_md_ucp_op_pmcallocate { #define UCP_EN (1 << 22) #define UCP_INV (1 << 23) #define UCP_CMASK(C) (((C) & 0xFF) << 24) - #ifdef _KERNEL #define DCTL_FLAG_UNC_PMI (1ULL << 13) diff --git a/sys/dev/hwpmc/pmc_events.h b/sys/dev/hwpmc/pmc_events.h index 213d311cf472..99aca46fa5f5 100644 --- a/sys/dev/hwpmc/pmc_events.h +++ b/sys/dev/hwpmc/pmc_events.h @@ -47,6 +47,21 @@ * __PMC_EV(CLASS, SYMBOLIC-NAME) * */ +/* timestamp counters. */ +#define __PMC_EV_TSC() \ + __PMC_EV(TSC, TSC) + +#define PMC_EV_TSC_FIRST PMC_EV_TSC_TSC +#define PMC_EV_TSC_LAST PMC_EV_TSC_TSC + +/* + * Software events are dynamically defined. + */ + +#define PMC_EV_DYN_COUNT 0x1000 + +#define PMC_EV_SOFT_FIRST 0x20000 +#define PMC_EV_SOFT_LAST (PMC_EV_SOFT_FIRST + PMC_EV_DYN_COUNT - 1) /* * AMD K7 Events, from "The AMD Athlon(tm) Processor x86 Code @@ -81,176 +96,6 @@ __PMC_EV(K7, HARDWARE_INTERRUPTS) #define PMC_EV_K7_FIRST PMC_EV_K7_DC_ACCESSES #define PMC_EV_K7_LAST PMC_EV_K7_HARDWARE_INTERRUPTS - -/* - * Intel P4 Events, from "IA-32 Intel(r) Architecture Software - * Developer's Manual, Volume 3: System Programming Guide" [245472-012] - */ - -#define __PMC_EV_P4() \ -__PMC_EV(P4, TC_DELIVER_MODE) \ -__PMC_EV(P4, BPU_FETCH_REQUEST) \ -__PMC_EV(P4, ITLB_REFERENCE) \ -__PMC_EV(P4, MEMORY_CANCEL) \ -__PMC_EV(P4, MEMORY_COMPLETE) \ -__PMC_EV(P4, LOAD_PORT_REPLAY) \ -__PMC_EV(P4, STORE_PORT_REPLAY) \ -__PMC_EV(P4, MOB_LOAD_REPLAY) \ -__PMC_EV(P4, PAGE_WALK_TYPE) \ -__PMC_EV(P4, BSQ_CACHE_REFERENCE) \ -__PMC_EV(P4, IOQ_ALLOCATION) \ -__PMC_EV(P4, IOQ_ACTIVE_ENTRIES) \ -__PMC_EV(P4, FSB_DATA_ACTIVITY) \ -__PMC_EV(P4, BSQ_ALLOCATION) \ -__PMC_EV(P4, BSQ_ACTIVE_ENTRIES) \ -__PMC_EV(P4, SSE_INPUT_ASSIST) \ -__PMC_EV(P4, PACKED_SP_UOP) \ -__PMC_EV(P4, PACKED_DP_UOP) \ -__PMC_EV(P4, SCALAR_SP_UOP) \ -__PMC_EV(P4, SCALAR_DP_UOP) \ -__PMC_EV(P4, 64BIT_MMX_UOP) \ -__PMC_EV(P4, 128BIT_MMX_UOP) \ -__PMC_EV(P4, X87_FP_UOP) \ -__PMC_EV(P4, X87_SIMD_MOVES_UOP) \ -__PMC_EV(P4, GLOBAL_POWER_EVENTS) \ -__PMC_EV(P4, TC_MS_XFER) \ -__PMC_EV(P4, UOP_QUEUE_WRITES) \ -__PMC_EV(P4, RETIRED_MISPRED_BRANCH_TYPE) \ -__PMC_EV(P4, RETIRED_BRANCH_TYPE) \ -__PMC_EV(P4, RESOURCE_STALL) \ -__PMC_EV(P4, WC_BUFFER) \ -__PMC_EV(P4, B2B_CYCLES) \ -__PMC_EV(P4, BNR) \ -__PMC_EV(P4, SNOOP) \ -__PMC_EV(P4, RESPONSE) \ -__PMC_EV(P4, FRONT_END_EVENT) \ -__PMC_EV(P4, EXECUTION_EVENT) \ -__PMC_EV(P4, REPLAY_EVENT) \ -__PMC_EV(P4, INSTR_RETIRED) \ -__PMC_EV(P4, UOPS_RETIRED) \ -__PMC_EV(P4, UOP_TYPE) \ -__PMC_EV(P4, BRANCH_RETIRED) \ -__PMC_EV(P4, MISPRED_BRANCH_RETIRED) \ -__PMC_EV(P4, X87_ASSIST) \ -__PMC_EV(P4, MACHINE_CLEAR) - -#define PMC_EV_P4_FIRST PMC_EV_P4_TC_DELIVER_MODE -#define PMC_EV_P4_LAST PMC_EV_P4_MACHINE_CLEAR - -/* Intel Pentium Pro, P-II, P-III and Pentium-M style events */ - -#define __PMC_EV_P6() \ -__PMC_EV(P6, DATA_MEM_REFS) \ -__PMC_EV(P6, DCU_LINES_IN) \ -__PMC_EV(P6, DCU_M_LINES_IN) \ -__PMC_EV(P6, DCU_M_LINES_OUT) \ -__PMC_EV(P6, DCU_MISS_OUTSTANDING) \ -__PMC_EV(P6, IFU_FETCH) \ -__PMC_EV(P6, IFU_FETCH_MISS) \ -__PMC_EV(P6, ITLB_MISS) \ -__PMC_EV(P6, IFU_MEM_STALL) \ -__PMC_EV(P6, ILD_STALL) \ -__PMC_EV(P6, L2_IFETCH) \ -__PMC_EV(P6, L2_LD) \ -__PMC_EV(P6, L2_ST) \ -__PMC_EV(P6, L2_LINES_IN) \ -__PMC_EV(P6, L2_LINES_OUT) \ -__PMC_EV(P6, L2_M_LINES_INM) \ -__PMC_EV(P6, L2_M_LINES_OUTM) \ -__PMC_EV(P6, L2_RQSTS) \ -__PMC_EV(P6, L2_ADS) \ -__PMC_EV(P6, L2_DBUS_BUSY) \ -__PMC_EV(P6, L2_DBUS_BUSY_RD) \ -__PMC_EV(P6, BUS_DRDY_CLOCKS) \ -__PMC_EV(P6, BUS_LOCK_CLOCKS) \ -__PMC_EV(P6, BUS_REQ_OUTSTANDING) \ -__PMC_EV(P6, BUS_TRAN_BRD) \ -__PMC_EV(P6, BUS_TRAN_RFO) \ -__PMC_EV(P6, BUS_TRANS_WB) \ -__PMC_EV(P6, BUS_TRAN_IFETCH) \ -__PMC_EV(P6, BUS_TRAN_INVAL) \ -__PMC_EV(P6, BUS_TRAN_PWR) \ -__PMC_EV(P6, BUS_TRANS_P) \ -__PMC_EV(P6, BUS_TRANS_IO) \ -__PMC_EV(P6, BUS_TRAN_DEF) \ -__PMC_EV(P6, BUS_TRAN_BURST) \ -__PMC_EV(P6, BUS_TRAN_ANY) \ -__PMC_EV(P6, BUS_TRAN_MEM) \ -__PMC_EV(P6, BUS_DATA_RCV) \ -__PMC_EV(P6, BUS_BNR_DRV) \ -__PMC_EV(P6, BUS_HIT_DRV) \ -__PMC_EV(P6, BUS_HITM_DRV) \ -__PMC_EV(P6, BUS_SNOOP_STALL) \ -__PMC_EV(P6, FLOPS) \ -__PMC_EV(P6, FP_COMPS_OPS_EXE) \ -__PMC_EV(P6, FP_ASSIST) \ -__PMC_EV(P6, MUL) \ -__PMC_EV(P6, DIV) \ -__PMC_EV(P6, CYCLES_DIV_BUSY) \ -__PMC_EV(P6, LD_BLOCKS) \ -__PMC_EV(P6, SB_DRAINS) \ -__PMC_EV(P6, MISALIGN_MEM_REF) \ -__PMC_EV(P6, EMON_KNI_PREF_DISPATCHED) \ -__PMC_EV(P6, EMON_KNI_PREF_MISS) \ -__PMC_EV(P6, INST_RETIRED) \ -__PMC_EV(P6, UOPS_RETIRED) \ -__PMC_EV(P6, INST_DECODED) \ -__PMC_EV(P6, EMON_KNI_INST_RETIRED) \ -__PMC_EV(P6, EMON_KNI_COMP_INST_RET) \ -__PMC_EV(P6, HW_INT_RX) \ -__PMC_EV(P6, CYCLES_INT_MASKED) \ -__PMC_EV(P6, CYCLES_INT_PENDING_AND_MASKED) \ -__PMC_EV(P6, BR_INST_RETIRED) \ -__PMC_EV(P6, BR_MISS_PRED_RETIRED) \ -__PMC_EV(P6, BR_TAKEN_RETIRED) \ -__PMC_EV(P6, BR_MISS_PRED_TAKEN_RET) \ -__PMC_EV(P6, BR_INST_DECODED) \ -__PMC_EV(P6, BTB_MISSES) \ -__PMC_EV(P6, BR_BOGUS) \ -__PMC_EV(P6, BACLEARS) \ -__PMC_EV(P6, RESOURCE_STALLS) \ -__PMC_EV(P6, PARTIAL_RAT_STALLS) \ -__PMC_EV(P6, SEGMENT_REG_LOADS) \ -__PMC_EV(P6, CPU_CLK_UNHALTED) \ -__PMC_EV(P6, MMX_INSTR_EXEC) \ -__PMC_EV(P6, MMX_SAT_INSTR_EXEC) \ -__PMC_EV(P6, MMX_UOPS_EXEC) \ -__PMC_EV(P6, MMX_INSTR_TYPE_EXEC) \ -__PMC_EV(P6, FP_MMX_TRANS) \ -__PMC_EV(P6, MMX_ASSIST) \ -__PMC_EV(P6, MMX_INSTR_RET) \ -__PMC_EV(P6, SEG_RENAME_STALLS) \ -__PMC_EV(P6, SEG_REG_RENAMES) \ -__PMC_EV(P6, RET_SEG_RENAMES) \ -__PMC_EV(P6, EMON_EST_TRANS) \ -__PMC_EV(P6, EMON_THERMAL_TRIP) \ -__PMC_EV(P6, BR_INST_EXEC) \ -__PMC_EV(P6, BR_MISSP_EXEC) \ -__PMC_EV(P6, BR_BAC_MISSP_EXEC) \ -__PMC_EV(P6, BR_CND_EXEC) \ -__PMC_EV(P6, BR_CND_MISSP_EXEC) \ -__PMC_EV(P6, BR_IND_EXEC) \ -__PMC_EV(P6, BR_IND_MISSP_EXEC) \ -__PMC_EV(P6, BR_RET_EXEC) \ -__PMC_EV(P6, BR_RET_MISSP_EXEC) \ -__PMC_EV(P6, BR_RET_BAC_MISSP_EXEC) \ -__PMC_EV(P6, BR_CALL_EXEC) \ -__PMC_EV(P6, BR_CALL_MISSP_EXEC) \ -__PMC_EV(P6, BR_IND_CALL_EXEC) \ -__PMC_EV(P6, EMON_SIMD_INSTR_RETIRED) \ -__PMC_EV(P6, EMON_SYNCH_UOPS) \ -__PMC_EV(P6, EMON_ESP_UOPS) \ -__PMC_EV(P6, EMON_FUSED_UOPS_RET) \ -__PMC_EV(P6, EMON_UNFUSION) \ -__PMC_EV(P6, EMON_PREF_RQSTS_UP) \ -__PMC_EV(P6, EMON_PREF_RQSTS_DN) \ -__PMC_EV(P6, EMON_SSE_SSE2_INST_RETIRED) \ -__PMC_EV(P6, EMON_SSE_SSE2_COMP_INST_RETIRED) - - -#define PMC_EV_P6_FIRST PMC_EV_P6_DATA_MEM_REFS -#define PMC_EV_P6_LAST PMC_EV_P6_EMON_SSE_SSE2_COMP_INST_RETIRED - /* AMD K8 PMCs */ #define __PMC_EV_K8() \ @@ -338,93 +183,6 @@ __PMC_EV(K8, NB_HT_BUS2_BANDWIDTH) #define PMC_EV_K8_FIRST PMC_EV_K8_FP_DISPATCHED_FPU_OPS #define PMC_EV_K8_LAST PMC_EV_K8_NB_HT_BUS2_BANDWIDTH - -/* - * Intel Pentium and Pentium MMX events, from the "Intel 64 and IA-32 - * Architectures Software Developer's Manual, Volume 3B: System Programming - * Guide, Part 2, August 2007". - */ -#define __PMC_EV_P5() \ -__PMC_EV(P5, DATA_READ) \ -__PMC_EV(P5, DATA_WRITE) \ -__PMC_EV(P5, DATA_TLB_MISS) \ -__PMC_EV(P5, DATA_READ_MISS) \ -__PMC_EV(P5, DATA_WRITE_MISS) \ -__PMC_EV(P5, WRITE_HIT_TO_M_OR_E_STATE_LINES) \ -__PMC_EV(P5, DATA_CACHE_LINES_WRITTEN_BACK) \ -__PMC_EV(P5, EXTERNAL_SNOOPS) \ -__PMC_EV(P5, EXTERNAL_DATA_CACHE_SNOOP_HITS) \ -__PMC_EV(P5, MEMORY_ACCESSES_IN_BOTH_PIPES) \ -__PMC_EV(P5, BANK_CONFLICTS) \ -__PMC_EV(P5, MISALIGNED_DATA_OR_IO_REFERENCES) \ -__PMC_EV(P5, CODE_READ) \ -__PMC_EV(P5, CODE_TLB_MISS) \ -__PMC_EV(P5, CODE_CACHE_MISS) \ -__PMC_EV(P5, ANY_SEGMENT_REGISTER_LOADED) \ -__PMC_EV(P5, BRANCHES) \ -__PMC_EV(P5, BTB_HITS) \ -__PMC_EV(P5, TAKEN_BRANCH_OR_BTB_HIT) \ -__PMC_EV(P5, PIPELINE_FLUSHES) \ -__PMC_EV(P5, INSTRUCTIONS_EXECUTED) \ -__PMC_EV(P5, INSTRUCTIONS_EXECUTED_V_PIPE) \ -__PMC_EV(P5, BUS_CYCLE_DURATION) \ -__PMC_EV(P5, WRITE_BUFFER_FULL_STALL_DURATION) \ -__PMC_EV(P5, WAITING_FOR_DATA_MEMORY_READ_STALL_DURATION) \ -__PMC_EV(P5, STALL_ON_WRITE_TO_AN_E_OR_M_STATE_LINE) \ -__PMC_EV(P5, LOCKED_BUS_CYCLE) \ -__PMC_EV(P5, IO_READ_OR_WRITE_CYCLE) \ -__PMC_EV(P5, NONCACHEABLE_MEMORY_READS) \ -__PMC_EV(P5, PIPELINE_AGI_STALLS) \ -__PMC_EV(P5, FLOPS) \ -__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR0_REGISTER) \ -__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR1_REGISTER) \ -__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR2_REGISTER) \ -__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR3_REGISTER) \ -__PMC_EV(P5, HARDWARE_INTERRUPTS) \ -__PMC_EV(P5, DATA_READ_OR_WRITE) \ -__PMC_EV(P5, DATA_READ_MISS_OR_WRITE_MISS) \ -__PMC_EV(P5, BUS_OWNERSHIP_LATENCY) \ -__PMC_EV(P5, BUS_OWNERSHIP_TRANSFERS) \ -__PMC_EV(P5, MMX_INSTRUCTIONS_EXECUTED_U_PIPE) \ -__PMC_EV(P5, MMX_INSTRUCTIONS_EXECUTED_V_PIPE) \ -__PMC_EV(P5, CACHE_M_LINE_SHARING) \ -__PMC_EV(P5, CACHE_LINE_SHARING) \ -__PMC_EV(P5, EMMS_INSTRUCTIONS_EXECUTED) \ -__PMC_EV(P5, TRANSITIONS_BETWEEN_MMX_AND_FP_INSTRUCTIONS) \ -__PMC_EV(P5, BUS_UTILIZATION_DUE_TO_PROCESSOR_ACTIVITY) \ -__PMC_EV(P5, WRITES_TO_NONCACHEABLE_MEMORY) \ -__PMC_EV(P5, SATURATING_MMX_INSTRUCTIONS_EXECUTED) \ -__PMC_EV(P5, SATURATIONS_PERFORMED) \ -__PMC_EV(P5, NUMBER_OF_CYCLES_NOT_IN_HALT_STATE) \ -__PMC_EV(P5, DATA_CACHE_TLB_MISS_STALL_DURATION) \ -__PMC_EV(P5, MMX_INSTRUCTION_DATA_READS) \ -__PMC_EV(P5, MMX_INSTRUCTION_DATA_READ_MISSES) \ -__PMC_EV(P5, FLOATING_POINT_STALLS_DURATION) \ -__PMC_EV(P5, TAKEN_BRANCHES) \ -__PMC_EV(P5, D1_STARVATION_AND_FIFO_IS_EMPTY) \ -__PMC_EV(P5, D1_STARVATION_AND_ONLY_ONE_INSTRUCTION_IN_FIFO) \ -__PMC_EV(P5, MMX_INSTRUCTION_DATA_WRITES) \ -__PMC_EV(P5, MMX_INSTRUCTION_DATA_WRITE_MISSES) \ -__PMC_EV(P5, PIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS) \ -__PMC_EV(P5, \ - PIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS_RESOLVED_IN_WB_STAGE) \ -__PMC_EV(P5, MISALIGNED_DATA_MEMORY_REFERENCE_ON_MMX_INSTRUCTIONS) \ -__PMC_EV(P5, PIPELINE_STALL_FOR_MMX_INSTRUCTION_DATA_MEMORY_READS) \ -__PMC_EV(P5, MISPREDICTED_OR_UNPREDICTED_RETURNS) \ -__PMC_EV(P5, PREDICTED_RETURNS) \ -__PMC_EV(P5, MMX_MULTIPLY_UNIT_INTERLOCK) \ -__PMC_EV(P5, MOVD_MOVQ_STORE_STALL_DUE_TO_PREVIOUS_MMX_OPERATION) \ -__PMC_EV(P5, RETURNS) \ -__PMC_EV(P5, BTB_FALSE_ENTRIES) \ -__PMC_EV(P5, BTB_MISS_PREDICTION_ON_NOT_TAKEN_BRANCH) \ -__PMC_EV(P5, \ - FULL_WRITE_BUFFER_STALL_DURATION_WHILE_EXECUTING_MMX_INSTRUCTIONS) \ -__PMC_EV(P5, STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE) - -#define PMC_EV_P5_FIRST PMC_EV_P5_DATA_READ -#define PMC_EV_P5_LAST \ - PMC_EV_P5_STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE - /* * Events supported by Intel architectural fixed function counters, * from the "Intel 64 and IA-32 Architectures Software Developer's @@ -443,848 +201,6 @@ __PMC_EV_ALIAS("instruction-retired", IAF_INSTR_RETIRED_ANY) \ __PMC_EV_ALIAS("unhalted-core-cycles", IAF_CPU_CLK_UNHALTED_CORE) \ __PMC_EV_ALIAS("unhalted-reference-cycles", IAF_CPU_CLK_UNHALTED_REF) -/* - * Events supported by programmable function counters present in - * Intel Atom, Core and Core2 CPUs, from the "Intel 64 and IA-32 - * Architectures Software Developer's Manual Volume 3B: System Programming - * Guide, Part 2", July 2008. - * - * These PMCs select events with a combination of an event code and - * unit mask. Quirks that need to be taken care of include: - * - The set of (event code, umask) combinations supported by a processor - * varies according to the processor model. - * - A given (event code, umask) combination need not measure the same - * hardware event in all processor models. - * - Event names in vendor documentation for an (event code, umask) pair - * may vary according to the CPU model. - * - Identically named events can map to different (event code, umask) - * pairs on different CPUs. - * - New (event code, umask) combinations continue to be added as CPUs - * evolve. The interface between hwpmc(4) and libpmc(3) needs to be - * robust with respect to ABI changes. - * - * The IAP_EVENT_* symbols below define the ABI between userland and kernel. - * New (event code, * umask) combinations used in new CPUs would be added - * to the end of the list. Vendor names for events are mapped to IAP_EVENT_* - * symbols using aliases. The final disambiguation of semantics based on - * the CPU model happens inside hwpmc(4). - */ -#define __PMC_EV_IAP() \ -__PMC_EV(IAP, ARCH_BR_INS_RET) \ -__PMC_EV(IAP, ARCH_BR_MIS_RET) \ -__PMC_EV(IAP, ARCH_INS_RET) \ -__PMC_EV(IAP, ARCH_LLC_MIS) \ -__PMC_EV(IAP, ARCH_LLC_REF) \ -__PMC_EV(IAP, ARCH_UNH_REF_CYC) \ -__PMC_EV(IAP, ARCH_UNH_COR_CYC) \ -__PMC_EV(IAP, EVENT_02H_01H) \ -__PMC_EV(IAP, EVENT_02H_81H) \ -__PMC_EV(IAP, EVENT_03H_00H) \ -__PMC_EV(IAP, EVENT_03H_01H) \ -__PMC_EV(IAP, EVENT_03H_02H) \ -__PMC_EV(IAP, EVENT_03H_04H) \ -__PMC_EV(IAP, EVENT_03H_08H) \ -__PMC_EV(IAP, EVENT_03H_10H) \ -__PMC_EV(IAP, EVENT_03H_20H) \ -__PMC_EV(IAP, EVENT_03H_40H) \ -__PMC_EV(IAP, EVENT_03H_80H) \ -__PMC_EV(IAP, EVENT_04H_00H) \ -__PMC_EV(IAP, EVENT_04H_01H) \ -__PMC_EV(IAP, EVENT_04H_02H) \ -__PMC_EV(IAP, EVENT_04H_04H) \ -__PMC_EV(IAP, EVENT_04H_07H) \ -__PMC_EV(IAP, EVENT_04H_08H) \ -__PMC_EV(IAP, EVENT_04H_10H) \ -__PMC_EV(IAP, EVENT_04H_20H) \ -__PMC_EV(IAP, EVENT_04H_40H) \ -__PMC_EV(IAP, EVENT_04H_80H) \ -__PMC_EV(IAP, EVENT_05H_00H) \ -__PMC_EV(IAP, EVENT_05H_01H) \ -__PMC_EV(IAP, EVENT_05H_02H) \ -__PMC_EV(IAP, EVENT_05H_03H) \ -__PMC_EV(IAP, EVENT_06H_00H) \ -__PMC_EV(IAP, EVENT_06H_01H) \ -__PMC_EV(IAP, EVENT_06H_02H) \ -__PMC_EV(IAP, EVENT_06H_04H) \ -__PMC_EV(IAP, EVENT_06H_08H) \ -__PMC_EV(IAP, EVENT_06H_0FH) \ -__PMC_EV(IAP, EVENT_07H_00H) \ -__PMC_EV(IAP, EVENT_07H_01H) \ -__PMC_EV(IAP, EVENT_07H_02H) \ -__PMC_EV(IAP, EVENT_07H_03H) \ -__PMC_EV(IAP, EVENT_07H_06H) \ -__PMC_EV(IAP, EVENT_07H_08H) \ -__PMC_EV(IAP, EVENT_08H_01H) \ -__PMC_EV(IAP, EVENT_08H_02H) \ -__PMC_EV(IAP, EVENT_08H_04H) \ -__PMC_EV(IAP, EVENT_08H_05H) \ -__PMC_EV(IAP, EVENT_08H_06H) \ -__PMC_EV(IAP, EVENT_08H_07H) \ -__PMC_EV(IAP, EVENT_08H_08H) \ -__PMC_EV(IAP, EVENT_08H_09H) \ -__PMC_EV(IAP, EVENT_08H_0EH) \ -__PMC_EV(IAP, EVENT_08H_10H) \ -__PMC_EV(IAP, EVENT_08H_20H) \ -__PMC_EV(IAP, EVENT_08H_40H) \ -__PMC_EV(IAP, EVENT_08H_60H) \ -__PMC_EV(IAP, EVENT_08H_80H) \ -__PMC_EV(IAP, EVENT_08H_81H) \ -__PMC_EV(IAP, EVENT_08H_82H) \ -__PMC_EV(IAP, EVENT_08H_84H) \ -__PMC_EV(IAP, EVENT_08H_88H) \ -__PMC_EV(IAP, EVENT_09H_01H) \ -__PMC_EV(IAP, EVENT_09H_02H) \ -__PMC_EV(IAP, EVENT_09H_04H) \ -__PMC_EV(IAP, EVENT_09H_08H) \ -__PMC_EV(IAP, EVENT_0BH_01H) \ -__PMC_EV(IAP, EVENT_0BH_02H) \ -__PMC_EV(IAP, EVENT_0BH_10H) \ -__PMC_EV(IAP, EVENT_0CH_01H) \ -__PMC_EV(IAP, EVENT_0CH_02H) \ -__PMC_EV(IAP, EVENT_0CH_03H) \ -__PMC_EV(IAP, EVENT_0DH_01H) \ -__PMC_EV(IAP, EVENT_0DH_03H) \ -__PMC_EV(IAP, EVENT_0DH_40H) \ -__PMC_EV(IAP, EVENT_0DH_80H) \ -__PMC_EV(IAP, EVENT_0EH_01H) \ -__PMC_EV(IAP, EVENT_0EH_02H) \ -__PMC_EV(IAP, EVENT_0EH_10H) \ -__PMC_EV(IAP, EVENT_0EH_20H) \ -__PMC_EV(IAP, EVENT_0EH_40H) \ -__PMC_EV(IAP, EVENT_0FH_01H) \ -__PMC_EV(IAP, EVENT_0FH_02H) \ -__PMC_EV(IAP, EVENT_0FH_08H) \ -__PMC_EV(IAP, EVENT_0FH_10H) \ -__PMC_EV(IAP, EVENT_0FH_20H) \ -__PMC_EV(IAP, EVENT_0FH_80H) \ -__PMC_EV(IAP, EVENT_10H_00H) \ -__PMC_EV(IAP, EVENT_10H_01H) \ -__PMC_EV(IAP, EVENT_10H_02H) \ -__PMC_EV(IAP, EVENT_10H_04H) \ -__PMC_EV(IAP, EVENT_10H_08H) \ -__PMC_EV(IAP, EVENT_10H_10H) \ -__PMC_EV(IAP, EVENT_10H_20H) \ -__PMC_EV(IAP, EVENT_10H_40H) \ -__PMC_EV(IAP, EVENT_10H_80H) \ -__PMC_EV(IAP, EVENT_10H_81H) \ -__PMC_EV(IAP, EVENT_11H_00H) \ -__PMC_EV(IAP, EVENT_11H_01H) \ -__PMC_EV(IAP, EVENT_11H_02H) \ -__PMC_EV(IAP, EVENT_11H_81H) \ -__PMC_EV(IAP, EVENT_12H_00H) \ -__PMC_EV(IAP, EVENT_12H_01H) \ -__PMC_EV(IAP, EVENT_12H_02H) \ -__PMC_EV(IAP, EVENT_12H_04H) \ -__PMC_EV(IAP, EVENT_12H_08H) \ -__PMC_EV(IAP, EVENT_12H_10H) \ -__PMC_EV(IAP, EVENT_12H_20H) \ -__PMC_EV(IAP, EVENT_12H_40H) \ -__PMC_EV(IAP, EVENT_12H_81H) \ -__PMC_EV(IAP, EVENT_13H_00H) \ -__PMC_EV(IAP, EVENT_13H_01H) \ -__PMC_EV(IAP, EVENT_13H_02H) \ -__PMC_EV(IAP, EVENT_13H_04H) \ -__PMC_EV(IAP, EVENT_13H_07H) \ -__PMC_EV(IAP, EVENT_13H_81H) \ -__PMC_EV(IAP, EVENT_14H_00H) \ -__PMC_EV(IAP, EVENT_14H_01H) \ -__PMC_EV(IAP, EVENT_14H_02H) \ -__PMC_EV(IAP, EVENT_17H_01H) \ -__PMC_EV(IAP, EVENT_18H_00H) \ -__PMC_EV(IAP, EVENT_18H_01H) \ -__PMC_EV(IAP, EVENT_19H_00H) \ -__PMC_EV(IAP, EVENT_19H_01H) \ -__PMC_EV(IAP, EVENT_19H_02H) \ -__PMC_EV(IAP, EVENT_1DH_01H) \ -__PMC_EV(IAP, EVENT_1DH_02H) \ -__PMC_EV(IAP, EVENT_1DH_04H) \ -__PMC_EV(IAP, EVENT_1EH_01H) \ -__PMC_EV(IAP, EVENT_20H_01H) \ -__PMC_EV(IAP, EVENT_21H) \ -__PMC_EV(IAP, EVENT_22H) \ -__PMC_EV(IAP, EVENT_22H_01H) \ -__PMC_EV(IAP, EVENT_22H_02H) \ -__PMC_EV(IAP, EVENT_22H_04H) \ -__PMC_EV(IAP, EVENT_22H_08H) \ -__PMC_EV(IAP, EVENT_22H_10H) \ -__PMC_EV(IAP, EVENT_22H_20H) \ -__PMC_EV(IAP, EVENT_22H_40H) \ -__PMC_EV(IAP, EVENT_22H_80H) \ -__PMC_EV(IAP, EVENT_23H) \ -__PMC_EV(IAP, EVENT_24H) \ -__PMC_EV(IAP, EVENT_24H_01H) \ -__PMC_EV(IAP, EVENT_24H_02H) \ -__PMC_EV(IAP, EVENT_24H_03H) \ -__PMC_EV(IAP, EVENT_24H_04H) \ -__PMC_EV(IAP, EVENT_24H_08H) \ -__PMC_EV(IAP, EVENT_24H_0CH) \ -__PMC_EV(IAP, EVENT_24H_10H) \ -__PMC_EV(IAP, EVENT_24H_20H) \ -__PMC_EV(IAP, EVENT_24H_21H) \ -__PMC_EV(IAP, EVENT_24H_22H) \ -__PMC_EV(IAP, EVENT_24H_24H) \ -__PMC_EV(IAP, EVENT_24H_27H) \ -__PMC_EV(IAP, EVENT_24H_30H) \ -__PMC_EV(IAP, EVENT_24H_38H) \ -__PMC_EV(IAP, EVENT_24H_3FH) \ -__PMC_EV(IAP, EVENT_24H_40H) \ -__PMC_EV(IAP, EVENT_24H_41H) \ -__PMC_EV(IAP, EVENT_24H_42H) \ -__PMC_EV(IAP, EVENT_24H_44H) \ -__PMC_EV(IAP, EVENT_24H_50H) \ -__PMC_EV(IAP, EVENT_24H_80H) \ -__PMC_EV(IAP, EVENT_24H_AAH) \ -__PMC_EV(IAP, EVENT_24H_BFH) \ -__PMC_EV(IAP, EVENT_24H_C0H) \ -__PMC_EV(IAP, EVENT_24H_D8H) \ -__PMC_EV(IAP, EVENT_24H_E1H) \ -__PMC_EV(IAP, EVENT_24H_E2H) \ -__PMC_EV(IAP, EVENT_24H_E4H) \ -__PMC_EV(IAP, EVENT_24H_E7H) \ -__PMC_EV(IAP, EVENT_24H_EFH) \ -__PMC_EV(IAP, EVENT_24H_F7H) \ -__PMC_EV(IAP, EVENT_24H_F8H) \ -__PMC_EV(IAP, EVENT_24H_FFH) \ -__PMC_EV(IAP, EVENT_25H) \ -__PMC_EV(IAP, EVENT_26H) \ -__PMC_EV(IAP, EVENT_26H_01H) \ -__PMC_EV(IAP, EVENT_26H_02H) \ -__PMC_EV(IAP, EVENT_26H_04H) \ -__PMC_EV(IAP, EVENT_26H_08H) \ -__PMC_EV(IAP, EVENT_26H_0FH) \ -__PMC_EV(IAP, EVENT_26H_10H) \ -__PMC_EV(IAP, EVENT_26H_20H) \ -__PMC_EV(IAP, EVENT_26H_40H) \ -__PMC_EV(IAP, EVENT_26H_80H) \ -__PMC_EV(IAP, EVENT_26H_F0H) \ -__PMC_EV(IAP, EVENT_26H_FFH) \ -__PMC_EV(IAP, EVENT_27H) \ -__PMC_EV(IAP, EVENT_27H_01H) \ -__PMC_EV(IAP, EVENT_27H_02H) \ -__PMC_EV(IAP, EVENT_27H_04H) \ -__PMC_EV(IAP, EVENT_27H_08H) \ -__PMC_EV(IAP, EVENT_27H_0EH) \ -__PMC_EV(IAP, EVENT_27H_0FH) \ -__PMC_EV(IAP, EVENT_27H_10H) \ -__PMC_EV(IAP, EVENT_27H_20H) \ -__PMC_EV(IAP, EVENT_27H_40H) \ -__PMC_EV(IAP, EVENT_27H_50H) \ -__PMC_EV(IAP, EVENT_27H_80H) \ -__PMC_EV(IAP, EVENT_27H_E0H) \ -__PMC_EV(IAP, EVENT_27H_F0H) \ -__PMC_EV(IAP, EVENT_28H) \ -__PMC_EV(IAP, EVENT_28H_01H) \ -__PMC_EV(IAP, EVENT_28H_02H) \ -__PMC_EV(IAP, EVENT_28H_04H) \ -__PMC_EV(IAP, EVENT_28H_07H) \ -__PMC_EV(IAP, EVENT_28H_08H) \ -__PMC_EV(IAP, EVENT_28H_0FH) \ -__PMC_EV(IAP, EVENT_28H_18H) \ -__PMC_EV(IAP, EVENT_28H_20H) \ -__PMC_EV(IAP, EVENT_28H_40H) \ -__PMC_EV(IAP, EVENT_29H) \ -__PMC_EV(IAP, EVENT_2AH) \ -__PMC_EV(IAP, EVENT_2BH) \ -__PMC_EV(IAP, EVENT_2EH) \ -__PMC_EV(IAP, EVENT_2EH_01H) \ -__PMC_EV(IAP, EVENT_2EH_02H) \ -__PMC_EV(IAP, EVENT_2EH_41H) \ -__PMC_EV(IAP, EVENT_2EH_4FH) \ -__PMC_EV(IAP, EVENT_30H) \ -__PMC_EV(IAP, EVENT_30H_00H) \ -__PMC_EV(IAP, EVENT_31H_00H) \ -__PMC_EV(IAP, EVENT_32H) \ -__PMC_EV(IAP, EVENT_3AH) \ -__PMC_EV(IAP, EVENT_3AH_00H) \ -__PMC_EV(IAP, EVENT_3BH_C0H) \ -__PMC_EV(IAP, EVENT_3CH_00H) \ -__PMC_EV(IAP, EVENT_3CH_01H) \ -__PMC_EV(IAP, EVENT_3CH_02H) \ -__PMC_EV(IAP, EVENT_3DH_01H) \ -__PMC_EV(IAP, EVENT_40H) \ -__PMC_EV(IAP, EVENT_40H_01H) \ -__PMC_EV(IAP, EVENT_40H_02H) \ -__PMC_EV(IAP, EVENT_40H_04H) \ -__PMC_EV(IAP, EVENT_40H_08H) \ -__PMC_EV(IAP, EVENT_40H_0FH) \ -__PMC_EV(IAP, EVENT_40H_21H) \ -__PMC_EV(IAP, EVENT_41H) \ -__PMC_EV(IAP, EVENT_41H_01H) \ -__PMC_EV(IAP, EVENT_41H_02H) \ -__PMC_EV(IAP, EVENT_41H_04H) \ -__PMC_EV(IAP, EVENT_41H_08H) \ -__PMC_EV(IAP, EVENT_41H_0FH) \ -__PMC_EV(IAP, EVENT_41H_22H) \ -__PMC_EV(IAP, EVENT_42H) \ -__PMC_EV(IAP, EVENT_42H_01H) \ -__PMC_EV(IAP, EVENT_42H_02H) \ -__PMC_EV(IAP, EVENT_42H_04H) \ -__PMC_EV(IAP, EVENT_42H_08H) \ -__PMC_EV(IAP, EVENT_42H_10H) \ -__PMC_EV(IAP, EVENT_43H_01H) \ -__PMC_EV(IAP, EVENT_43H_02H) \ -__PMC_EV(IAP, EVENT_44H_02H) \ -__PMC_EV(IAP, EVENT_45H_0FH) \ -__PMC_EV(IAP, EVENT_46H_00H) \ -__PMC_EV(IAP, EVENT_47H_00H) \ -__PMC_EV(IAP, EVENT_48H_00H) \ -__PMC_EV(IAP, EVENT_48H_01H) \ -__PMC_EV(IAP, EVENT_48H_02H) \ -__PMC_EV(IAP, EVENT_49H_00H) \ -__PMC_EV(IAP, EVENT_49H_01H) \ -__PMC_EV(IAP, EVENT_49H_02H) \ -__PMC_EV(IAP, EVENT_49H_04H) \ -__PMC_EV(IAP, EVENT_49H_08H) \ -__PMC_EV(IAP, EVENT_49H_0EH) \ -__PMC_EV(IAP, EVENT_49H_10H) \ -__PMC_EV(IAP, EVENT_49H_20H) \ -__PMC_EV(IAP, EVENT_49H_40H) \ -__PMC_EV(IAP, EVENT_49H_60H) \ -__PMC_EV(IAP, EVENT_49H_80H) \ -__PMC_EV(IAP, EVENT_4BH_00H) \ -__PMC_EV(IAP, EVENT_4BH_01H) \ -__PMC_EV(IAP, EVENT_4BH_02H) \ -__PMC_EV(IAP, EVENT_4BH_03H) \ -__PMC_EV(IAP, EVENT_4BH_08H) \ -__PMC_EV(IAP, EVENT_4CH_00H) \ -__PMC_EV(IAP, EVENT_4CH_01H) \ -__PMC_EV(IAP, EVENT_4CH_02H) \ -__PMC_EV(IAP, EVENT_4DH_01H) \ -__PMC_EV(IAP, EVENT_4EH_01H) \ -__PMC_EV(IAP, EVENT_4EH_02H) \ -__PMC_EV(IAP, EVENT_4EH_04H) \ -__PMC_EV(IAP, EVENT_4EH_10H) \ -__PMC_EV(IAP, EVENT_4FH_00H) \ -__PMC_EV(IAP, EVENT_4FH_02H) \ -__PMC_EV(IAP, EVENT_4FH_04H) \ -__PMC_EV(IAP, EVENT_4FH_08H) \ -__PMC_EV(IAP, EVENT_4FH_10H) \ -__PMC_EV(IAP, EVENT_51H_01H) \ -__PMC_EV(IAP, EVENT_51H_02H) \ -__PMC_EV(IAP, EVENT_51H_04H) \ -__PMC_EV(IAP, EVENT_51H_08H) \ -__PMC_EV(IAP, EVENT_52H_01H) \ -__PMC_EV(IAP, EVENT_53H_01H) \ -__PMC_EV(IAP, EVENT_54H_01H) \ -__PMC_EV(IAP, EVENT_54H_02H) \ -__PMC_EV(IAP, EVENT_54H_04H) \ -__PMC_EV(IAP, EVENT_54H_08H) \ -__PMC_EV(IAP, EVENT_54H_10H) \ -__PMC_EV(IAP, EVENT_54H_20H) \ -__PMC_EV(IAP, EVENT_54H_40H) \ -__PMC_EV(IAP, EVENT_58H_01H) \ -__PMC_EV(IAP, EVENT_58H_02H) \ -__PMC_EV(IAP, EVENT_58H_04H) \ -__PMC_EV(IAP, EVENT_58H_08H) \ -__PMC_EV(IAP, EVENT_59H_20H) \ -__PMC_EV(IAP, EVENT_59H_40H) \ -__PMC_EV(IAP, EVENT_59H_80H) \ -__PMC_EV(IAP, EVENT_5BH_0CH) \ -__PMC_EV(IAP, EVENT_5BH_0FH) \ -__PMC_EV(IAP, EVENT_5BH_40H) \ -__PMC_EV(IAP, EVENT_5BH_4FH) \ -__PMC_EV(IAP, EVENT_5CH_01H) \ -__PMC_EV(IAP, EVENT_5CH_02H) \ -__PMC_EV(IAP, EVENT_5DH_01H) \ -__PMC_EV(IAP, EVENT_5DH_02H) \ -__PMC_EV(IAP, EVENT_5DH_04H) \ -__PMC_EV(IAP, EVENT_5DH_08H) \ -__PMC_EV(IAP, EVENT_5DH_10H) \ -__PMC_EV(IAP, EVENT_5EH_01H) \ -__PMC_EV(IAP, EVENT_5FH_01H) \ -__PMC_EV(IAP, EVENT_5FH_04H) \ -__PMC_EV(IAP, EVENT_60H) \ -__PMC_EV(IAP, EVENT_60H_01H) \ -__PMC_EV(IAP, EVENT_60H_02H) \ -__PMC_EV(IAP, EVENT_60H_04H) \ -__PMC_EV(IAP, EVENT_60H_08H) \ -__PMC_EV(IAP, EVENT_60H_10H) \ -__PMC_EV(IAP, EVENT_61H) \ -__PMC_EV(IAP, EVENT_61H_00H) \ -__PMC_EV(IAP, EVENT_62H) \ -__PMC_EV(IAP, EVENT_62H_00H) \ -__PMC_EV(IAP, EVENT_63H) \ -__PMC_EV(IAP, EVENT_63H_01H) \ -__PMC_EV(IAP, EVENT_63H_02H) \ -__PMC_EV(IAP, EVENT_64H) \ -__PMC_EV(IAP, EVENT_64H_40H) \ -__PMC_EV(IAP, EVENT_65H) \ -__PMC_EV(IAP, EVENT_66H) \ -__PMC_EV(IAP, EVENT_67H) \ -__PMC_EV(IAP, EVENT_68H) \ -__PMC_EV(IAP, EVENT_69H) \ -__PMC_EV(IAP, EVENT_6AH) \ -__PMC_EV(IAP, EVENT_6BH) \ -__PMC_EV(IAP, EVENT_6CH) \ -__PMC_EV(IAP, EVENT_6CH_01H) \ -__PMC_EV(IAP, EVENT_6DH) \ -__PMC_EV(IAP, EVENT_6EH) \ -__PMC_EV(IAP, EVENT_6FH) \ -__PMC_EV(IAP, EVENT_70H) \ -__PMC_EV(IAP, EVENT_77H) \ -__PMC_EV(IAP, EVENT_78H) \ -__PMC_EV(IAP, EVENT_79H_02H) \ -__PMC_EV(IAP, EVENT_79H_04H) \ -__PMC_EV(IAP, EVENT_79H_08H) \ -__PMC_EV(IAP, EVENT_79H_10H) \ -__PMC_EV(IAP, EVENT_79H_18H) \ -__PMC_EV(IAP, EVENT_79H_20H) \ -__PMC_EV(IAP, EVENT_79H_24H) \ -__PMC_EV(IAP, EVENT_79H_30H) \ -__PMC_EV(IAP, EVENT_79H_3CH) \ -__PMC_EV(IAP, EVENT_7AH) \ -__PMC_EV(IAP, EVENT_7BH) \ -__PMC_EV(IAP, EVENT_7DH) \ -__PMC_EV(IAP, EVENT_7EH) \ -__PMC_EV(IAP, EVENT_7EH_00H) \ -__PMC_EV(IAP, EVENT_7FH) \ -__PMC_EV(IAP, EVENT_80H_00H) \ -__PMC_EV(IAP, EVENT_80H_01H) \ -__PMC_EV(IAP, EVENT_80H_02H) \ -__PMC_EV(IAP, EVENT_80H_03H) \ -__PMC_EV(IAP, EVENT_80H_04H) \ -__PMC_EV(IAP, EVENT_80H_10H) \ -__PMC_EV(IAP, EVENT_81H_00H) \ -__PMC_EV(IAP, EVENT_81H_01H) \ -__PMC_EV(IAP, EVENT_81H_02H) \ -__PMC_EV(IAP, EVENT_82H_01H) \ -__PMC_EV(IAP, EVENT_82H_02H) \ -__PMC_EV(IAP, EVENT_82H_04H) \ -__PMC_EV(IAP, EVENT_82H_10H) \ -__PMC_EV(IAP, EVENT_82H_12H) \ -__PMC_EV(IAP, EVENT_82H_40H) \ -__PMC_EV(IAP, EVENT_83H_01H) \ -__PMC_EV(IAP, EVENT_83H_02H) \ -__PMC_EV(IAP, EVENT_83H_04H) \ -__PMC_EV(IAP, EVENT_85H_00H) \ -__PMC_EV(IAP, EVENT_85H_01H) \ -__PMC_EV(IAP, EVENT_85H_02H) \ -__PMC_EV(IAP, EVENT_85H_04H) \ -__PMC_EV(IAP, EVENT_85H_08H) \ -__PMC_EV(IAP, EVENT_85H_0EH) \ -__PMC_EV(IAP, EVENT_85H_10H) \ -__PMC_EV(IAP, EVENT_85H_20H) \ -__PMC_EV(IAP, EVENT_85H_40H) \ -__PMC_EV(IAP, EVENT_85H_60H) \ -__PMC_EV(IAP, EVENT_85H_80H) \ -__PMC_EV(IAP, EVENT_86H_00H) \ -__PMC_EV(IAP, EVENT_87H_00H) \ -__PMC_EV(IAP, EVENT_87H_01H) \ -__PMC_EV(IAP, EVENT_87H_02H) \ -__PMC_EV(IAP, EVENT_87H_04H) \ -__PMC_EV(IAP, EVENT_87H_08H) \ -__PMC_EV(IAP, EVENT_87H_0FH) \ -__PMC_EV(IAP, EVENT_88H_00H) \ -__PMC_EV(IAP, EVENT_88H_01H) \ -__PMC_EV(IAP, EVENT_88H_02H) \ -__PMC_EV(IAP, EVENT_88H_04H) \ -__PMC_EV(IAP, EVENT_88H_07H) \ -__PMC_EV(IAP, EVENT_88H_08H) \ -__PMC_EV(IAP, EVENT_88H_10H) \ -__PMC_EV(IAP, EVENT_88H_20H) \ -__PMC_EV(IAP, EVENT_88H_30H) \ -__PMC_EV(IAP, EVENT_88H_40H) \ -__PMC_EV(IAP, EVENT_88H_41H) \ -__PMC_EV(IAP, EVENT_88H_80H) \ -__PMC_EV(IAP, EVENT_88H_81H) \ -__PMC_EV(IAP, EVENT_88H_82H) \ -__PMC_EV(IAP, EVENT_88H_84H) \ -__PMC_EV(IAP, EVENT_88H_88H) \ -__PMC_EV(IAP, EVENT_88H_90H) \ -__PMC_EV(IAP, EVENT_88H_A0H) \ -__PMC_EV(IAP, EVENT_88H_7FH) \ -__PMC_EV(IAP, EVENT_88H_FFH) \ -__PMC_EV(IAP, EVENT_89H_00H) \ -__PMC_EV(IAP, EVENT_89H_01H) \ -__PMC_EV(IAP, EVENT_89H_02H) \ -__PMC_EV(IAP, EVENT_89H_04H) \ -__PMC_EV(IAP, EVENT_89H_07H) \ -__PMC_EV(IAP, EVENT_89H_08H) \ -__PMC_EV(IAP, EVENT_89H_10H) \ -__PMC_EV(IAP, EVENT_89H_20H) \ -__PMC_EV(IAP, EVENT_89H_30H) \ -__PMC_EV(IAP, EVENT_89H_40H) \ -__PMC_EV(IAP, EVENT_89H_41H) \ -__PMC_EV(IAP, EVENT_89H_80H) \ -__PMC_EV(IAP, EVENT_89H_81H) \ -__PMC_EV(IAP, EVENT_89H_82H) \ -__PMC_EV(IAP, EVENT_89H_84H) \ -__PMC_EV(IAP, EVENT_89H_88H) \ -__PMC_EV(IAP, EVENT_89H_90H) \ -__PMC_EV(IAP, EVENT_89H_A0H) \ -__PMC_EV(IAP, EVENT_89H_7FH) \ -__PMC_EV(IAP, EVENT_89H_FFH) \ -__PMC_EV(IAP, EVENT_8AH_00H) \ -__PMC_EV(IAP, EVENT_8BH_00H) \ -__PMC_EV(IAP, EVENT_8CH_00H) \ -__PMC_EV(IAP, EVENT_8DH_00H) \ -__PMC_EV(IAP, EVENT_8EH_00H) \ -__PMC_EV(IAP, EVENT_8FH_00H) \ -__PMC_EV(IAP, EVENT_90H_00H) \ -__PMC_EV(IAP, EVENT_91H_00H) \ -__PMC_EV(IAP, EVENT_92H_00H) \ -__PMC_EV(IAP, EVENT_93H_00H) \ -__PMC_EV(IAP, EVENT_94H_00H) \ -__PMC_EV(IAP, EVENT_97H_00H) \ -__PMC_EV(IAP, EVENT_98H_00H) \ -__PMC_EV(IAP, EVENT_9CH_01H) \ -__PMC_EV(IAP, EVENT_A0H_00H) \ -__PMC_EV(IAP, EVENT_A1H_01H) \ -__PMC_EV(IAP, EVENT_A1H_02H) \ -__PMC_EV(IAP, EVENT_A1H_04H) \ -__PMC_EV(IAP, EVENT_A1H_08H) \ -__PMC_EV(IAP, EVENT_A1H_0CH) \ -__PMC_EV(IAP, EVENT_A1H_10H) \ -__PMC_EV(IAP, EVENT_A1H_20H) \ -__PMC_EV(IAP, EVENT_A1H_30H) \ -__PMC_EV(IAP, EVENT_A1H_40H) \ -__PMC_EV(IAP, EVENT_A1H_80H) \ -__PMC_EV(IAP, EVENT_A2H_00H) \ -__PMC_EV(IAP, EVENT_A2H_01H) \ -__PMC_EV(IAP, EVENT_A2H_02H) \ -__PMC_EV(IAP, EVENT_A2H_04H) \ -__PMC_EV(IAP, EVENT_A2H_08H) \ -__PMC_EV(IAP, EVENT_A2H_10H) \ -__PMC_EV(IAP, EVENT_A2H_20H) \ -__PMC_EV(IAP, EVENT_A2H_40H) \ -__PMC_EV(IAP, EVENT_A2H_80H) \ -__PMC_EV(IAP, EVENT_A3H_01H) \ -__PMC_EV(IAP, EVENT_A3H_02H) \ -__PMC_EV(IAP, EVENT_A3H_04H) \ -__PMC_EV(IAP, EVENT_A3H_05H) \ -__PMC_EV(IAP, EVENT_A3H_06H) \ -__PMC_EV(IAP, EVENT_A3H_08H) \ -__PMC_EV(IAP, EVENT_A3H_0CH) \ -__PMC_EV(IAP, EVENT_A3H_10H) \ -__PMC_EV(IAP, EVENT_A3H_14H) \ -__PMC_EV(IAP, EVENT_A6H_01H) \ -__PMC_EV(IAP, EVENT_A6H_02H) \ -__PMC_EV(IAP, EVENT_A6H_04H) \ -__PMC_EV(IAP, EVENT_A6H_08H) \ -__PMC_EV(IAP, EVENT_A6H_10H) \ -__PMC_EV(IAP, EVENT_A6H_40H) \ -__PMC_EV(IAP, EVENT_A7H_01H) \ -__PMC_EV(IAP, EVENT_A8H_01H) \ -__PMC_EV(IAP, EVENT_A8H_02H) \ -__PMC_EV(IAP, EVENT_AAH_01H) \ -__PMC_EV(IAP, EVENT_AAH_02H) \ -__PMC_EV(IAP, EVENT_AAH_03H) \ -__PMC_EV(IAP, EVENT_AAH_08H) \ -__PMC_EV(IAP, EVENT_ABH_01H) \ -__PMC_EV(IAP, EVENT_ABH_02H) \ -__PMC_EV(IAP, EVENT_ACH_02H) \ -__PMC_EV(IAP, EVENT_ACH_08H) \ -__PMC_EV(IAP, EVENT_ACH_0AH) \ -__PMC_EV(IAP, EVENT_AEH_01H) \ -__PMC_EV(IAP, EVENT_B0H_00H) \ -__PMC_EV(IAP, EVENT_B0H_01H) \ -__PMC_EV(IAP, EVENT_B0H_02H) \ -__PMC_EV(IAP, EVENT_B0H_04H) \ -__PMC_EV(IAP, EVENT_B0H_08H) \ -__PMC_EV(IAP, EVENT_B0H_10H) \ -__PMC_EV(IAP, EVENT_B0H_20H) \ -__PMC_EV(IAP, EVENT_B0H_40H) \ -__PMC_EV(IAP, EVENT_B0H_80H) \ -__PMC_EV(IAP, EVENT_B1H_00H) \ -__PMC_EV(IAP, EVENT_B1H_01H) \ -__PMC_EV(IAP, EVENT_B1H_02H) \ -__PMC_EV(IAP, EVENT_B1H_04H) \ -__PMC_EV(IAP, EVENT_B1H_08H) \ -__PMC_EV(IAP, EVENT_B1H_10H) \ -__PMC_EV(IAP, EVENT_B1H_1FH) \ -__PMC_EV(IAP, EVENT_B1H_20H) \ -__PMC_EV(IAP, EVENT_B1H_3FH) \ -__PMC_EV(IAP, EVENT_B1H_40H) \ -__PMC_EV(IAP, EVENT_B1H_80H) \ -__PMC_EV(IAP, EVENT_B2H_01H) \ -__PMC_EV(IAP, EVENT_B3H_01H) \ -__PMC_EV(IAP, EVENT_B3H_02H) \ -__PMC_EV(IAP, EVENT_B3H_04H) \ -__PMC_EV(IAP, EVENT_B3H_08H) \ -__PMC_EV(IAP, EVENT_B3H_10H) \ -__PMC_EV(IAP, EVENT_B3H_20H) \ -__PMC_EV(IAP, EVENT_B3H_81H) \ -__PMC_EV(IAP, EVENT_B3H_82H) \ -__PMC_EV(IAP, EVENT_B3H_84H) \ -__PMC_EV(IAP, EVENT_B3H_88H) \ -__PMC_EV(IAP, EVENT_B3H_90H) \ -__PMC_EV(IAP, EVENT_B3H_A0H) \ -__PMC_EV(IAP, EVENT_B4H_01H) \ -__PMC_EV(IAP, EVENT_B4H_02H) \ -__PMC_EV(IAP, EVENT_B4H_04H) \ -__PMC_EV(IAP, EVENT_B6H_01H) \ -__PMC_EV(IAP, EVENT_B6H_04H) \ -__PMC_EV(IAP, EVENT_B7H_01H) \ -__PMC_EV(IAP, EVENT_B7H_02H) \ -__PMC_EV(IAP, EVENT_B8H_01H) \ -__PMC_EV(IAP, EVENT_B8H_02H) \ -__PMC_EV(IAP, EVENT_B8H_04H) \ -__PMC_EV(IAP, EVENT_BAH_01H) \ -__PMC_EV(IAP, EVENT_BAH_02H) \ -__PMC_EV(IAP, EVENT_BBH_01H) \ -__PMC_EV(IAP, EVENT_BCH_11H) \ -__PMC_EV(IAP, EVENT_BCH_12H) \ -__PMC_EV(IAP, EVENT_BCH_14H) \ -__PMC_EV(IAP, EVENT_BCH_18H) \ -__PMC_EV(IAP, EVENT_BCH_21H) \ -__PMC_EV(IAP, EVENT_BCH_22H) \ -__PMC_EV(IAP, EVENT_BCH_24H) \ -__PMC_EV(IAP, EVENT_BCH_28H) \ -__PMC_EV(IAP, EVENT_BDH_01H) \ -__PMC_EV(IAP, EVENT_BDH_20H) \ -__PMC_EV(IAP, EVENT_BFH_05H) \ -__PMC_EV(IAP, EVENT_C0H_00H) \ -__PMC_EV(IAP, EVENT_C0H_01H) \ -__PMC_EV(IAP, EVENT_C0H_02H) \ -__PMC_EV(IAP, EVENT_C0H_04H) \ -__PMC_EV(IAP, EVENT_C0H_08H) \ -__PMC_EV(IAP, EVENT_C1H_00H) \ -__PMC_EV(IAP, EVENT_C1H_01H) \ -__PMC_EV(IAP, EVENT_C1H_02H) \ -__PMC_EV(IAP, EVENT_C1H_08H) \ -__PMC_EV(IAP, EVENT_C1H_10H) \ -__PMC_EV(IAP, EVENT_C1H_20H) \ -__PMC_EV(IAP, EVENT_C1H_3FH) \ -__PMC_EV(IAP, EVENT_C1H_40H) \ -__PMC_EV(IAP, EVENT_C1H_80H) \ -__PMC_EV(IAP, EVENT_C1H_FEH) \ -__PMC_EV(IAP, EVENT_C2H_00H) \ -__PMC_EV(IAP, EVENT_C2H_01H) \ -__PMC_EV(IAP, EVENT_C2H_02H) \ -__PMC_EV(IAP, EVENT_C2H_04H) \ -__PMC_EV(IAP, EVENT_C2H_07H) \ -__PMC_EV(IAP, EVENT_C2H_08H) \ -__PMC_EV(IAP, EVENT_C2H_0FH) \ -__PMC_EV(IAP, EVENT_C2H_10H) \ -__PMC_EV(IAP, EVENT_C3H_00H) \ -__PMC_EV(IAP, EVENT_C3H_01H) \ -__PMC_EV(IAP, EVENT_C3H_02H) \ -__PMC_EV(IAP, EVENT_C3H_04H) \ -__PMC_EV(IAP, EVENT_C3H_08H) \ -__PMC_EV(IAP, EVENT_C3H_10H) \ -__PMC_EV(IAP, EVENT_C3H_20H) \ -__PMC_EV(IAP, EVENT_C4H_00H) \ -__PMC_EV(IAP, EVENT_C4H_01H) \ -__PMC_EV(IAP, EVENT_C4H_02H) \ -__PMC_EV(IAP, EVENT_C4H_04H) \ -__PMC_EV(IAP, EVENT_C4H_08H) \ -__PMC_EV(IAP, EVENT_C4H_0CH) \ -__PMC_EV(IAP, EVENT_C4H_0FH) \ -__PMC_EV(IAP, EVENT_C4H_10H) \ -__PMC_EV(IAP, EVENT_C4H_20H) \ -__PMC_EV(IAP, EVENT_C4H_40H) \ -__PMC_EV(IAP, EVENT_C4H_7EH) \ -__PMC_EV(IAP, EVENT_C4H_BFH) \ -__PMC_EV(IAP, EVENT_C4H_EBH) \ -__PMC_EV(IAP, EVENT_C4H_F7H) \ -__PMC_EV(IAP, EVENT_C4H_F9H) \ -__PMC_EV(IAP, EVENT_C4H_FBH) \ -__PMC_EV(IAP, EVENT_C4H_FDH) \ -__PMC_EV(IAP, EVENT_C4H_FEH) \ -__PMC_EV(IAP, EVENT_C5H_00H) \ -__PMC_EV(IAP, EVENT_C5H_01H) \ -__PMC_EV(IAP, EVENT_C5H_02H) \ -__PMC_EV(IAP, EVENT_C5H_04H) \ -__PMC_EV(IAP, EVENT_C5H_10H) \ -__PMC_EV(IAP, EVENT_C5H_20H) \ -__PMC_EV(IAP, EVENT_C5H_7EH) \ -__PMC_EV(IAP, EVENT_C5H_BFH) \ -__PMC_EV(IAP, EVENT_C5H_EBH) \ -__PMC_EV(IAP, EVENT_C5H_F7H) \ -__PMC_EV(IAP, EVENT_C5H_F9H) \ -__PMC_EV(IAP, EVENT_C5H_FBH) \ -__PMC_EV(IAP, EVENT_C5H_FDH) \ -__PMC_EV(IAP, EVENT_C5H_FEH) \ -__PMC_EV(IAP, EVENT_C6H_00H) \ -__PMC_EV(IAP, EVENT_C6H_01H) \ -__PMC_EV(IAP, EVENT_C6H_02H) \ -__PMC_EV(IAP, EVENT_C7H_00H) \ -__PMC_EV(IAP, EVENT_C7H_01H) \ -__PMC_EV(IAP, EVENT_C7H_02H) \ -__PMC_EV(IAP, EVENT_C7H_04H) \ -__PMC_EV(IAP, EVENT_C7H_08H) \ -__PMC_EV(IAP, EVENT_C7H_10H) \ -__PMC_EV(IAP, EVENT_C7H_1FH) \ -__PMC_EV(IAP, EVENT_C7H_20H) \ -__PMC_EV(IAP, EVENT_C7H_40H) \ -__PMC_EV(IAP, EVENT_C7H_80H) \ -__PMC_EV(IAP, EVENT_C8H_00H) \ -__PMC_EV(IAP, EVENT_C8H_01H) \ -__PMC_EV(IAP, EVENT_C8H_02H) \ -__PMC_EV(IAP, EVENT_C8H_04H) \ -__PMC_EV(IAP, EVENT_C8H_08H) \ -__PMC_EV(IAP, EVENT_C8H_10H) \ -__PMC_EV(IAP, EVENT_C8H_20H) \ -__PMC_EV(IAP, EVENT_C8H_40H) \ -__PMC_EV(IAP, EVENT_C8H_80H) \ -__PMC_EV(IAP, EVENT_C9H_00H) \ -__PMC_EV(IAP, EVENT_C9H_01H) \ -__PMC_EV(IAP, EVENT_C9H_02H) \ -__PMC_EV(IAP, EVENT_C9H_04H) \ -__PMC_EV(IAP, EVENT_C9H_08H) \ -__PMC_EV(IAP, EVENT_C9H_10H) \ -__PMC_EV(IAP, EVENT_C9H_20H) \ -__PMC_EV(IAP, EVENT_C9H_40H) \ -__PMC_EV(IAP, EVENT_C9H_80H) \ -__PMC_EV(IAP, EVENT_CAH_00H) \ -__PMC_EV(IAP, EVENT_CAH_01H) \ -__PMC_EV(IAP, EVENT_CAH_02H) \ -__PMC_EV(IAP, EVENT_CAH_04H) \ -__PMC_EV(IAP, EVENT_CAH_08H) \ -__PMC_EV(IAP, EVENT_CAH_10H) \ -__PMC_EV(IAP, EVENT_CAH_20H) \ -__PMC_EV(IAP, EVENT_CAH_1EH) \ -__PMC_EV(IAP, EVENT_CAH_3FH) \ -__PMC_EV(IAP, EVENT_CAH_50H) \ -__PMC_EV(IAP, EVENT_CBH_01H) \ -__PMC_EV(IAP, EVENT_CBH_02H) \ -__PMC_EV(IAP, EVENT_CBH_04H) \ -__PMC_EV(IAP, EVENT_CBH_08H) \ -__PMC_EV(IAP, EVENT_CBH_10H) \ -__PMC_EV(IAP, EVENT_CBH_1FH) \ -__PMC_EV(IAP, EVENT_CBH_40H) \ -__PMC_EV(IAP, EVENT_CBH_80H) \ -__PMC_EV(IAP, EVENT_CCH_00H) \ -__PMC_EV(IAP, EVENT_CCH_01H) \ -__PMC_EV(IAP, EVENT_CCH_02H) \ -__PMC_EV(IAP, EVENT_CCH_03H) \ -__PMC_EV(IAP, EVENT_CCH_20H) \ -__PMC_EV(IAP, EVENT_CDH_00H) \ -__PMC_EV(IAP, EVENT_CDH_01H) \ -__PMC_EV(IAP, EVENT_CDH_02H) \ -__PMC_EV(IAP, EVENT_CEH_00H) \ -__PMC_EV(IAP, EVENT_CFH_00H) \ -__PMC_EV(IAP, EVENT_D0H_00H) \ -__PMC_EV(IAP, EVENT_D0H_01H) \ -__PMC_EV(IAP, EVENT_D0H_02H) \ -__PMC_EV(IAP, EVENT_D0H_10H) \ -__PMC_EV(IAP, EVENT_D0H_11H) \ -__PMC_EV(IAP, EVENT_D0H_12H) \ -__PMC_EV(IAP, EVENT_D0H_20H) \ -__PMC_EV(IAP, EVENT_D0H_21H) \ -__PMC_EV(IAP, EVENT_D0H_40H) \ -__PMC_EV(IAP, EVENT_D0H_41H) \ -__PMC_EV(IAP, EVENT_D0H_42H) \ -__PMC_EV(IAP, EVENT_D0H_80H) \ -__PMC_EV(IAP, EVENT_D0H_81H) \ -__PMC_EV(IAP, EVENT_D0H_82H) \ -__PMC_EV(IAP, EVENT_D1H_01H) \ -__PMC_EV(IAP, EVENT_D1H_02H) \ -__PMC_EV(IAP, EVENT_D1H_04H) \ -__PMC_EV(IAP, EVENT_D1H_08H) \ -__PMC_EV(IAP, EVENT_D1H_10H) \ -__PMC_EV(IAP, EVENT_D1H_20H) \ -__PMC_EV(IAP, EVENT_D1H_40H) \ -__PMC_EV(IAP, EVENT_D2H_01H) \ -__PMC_EV(IAP, EVENT_D2H_02H) \ -__PMC_EV(IAP, EVENT_D2H_04H) \ -__PMC_EV(IAP, EVENT_D2H_08H) \ -__PMC_EV(IAP, EVENT_D2H_0FH) \ -__PMC_EV(IAP, EVENT_D2H_10H) \ -__PMC_EV(IAP, EVENT_D3H_01H) \ -__PMC_EV(IAP, EVENT_D3H_02H) \ -__PMC_EV(IAP, EVENT_D3H_03H) \ -__PMC_EV(IAP, EVENT_D3H_04H) \ -__PMC_EV(IAP, EVENT_D3H_08H) \ -__PMC_EV(IAP, EVENT_D3H_0CH) \ -__PMC_EV(IAP, EVENT_D3H_10H) \ -__PMC_EV(IAP, EVENT_D3H_20H) \ -__PMC_EV(IAP, EVENT_D4H_01H) \ -__PMC_EV(IAP, EVENT_D4H_02H) \ -__PMC_EV(IAP, EVENT_D4H_04H) \ -__PMC_EV(IAP, EVENT_D4H_08H) \ -__PMC_EV(IAP, EVENT_D4H_0FH) \ -__PMC_EV(IAP, EVENT_D5H_01H) \ -__PMC_EV(IAP, EVENT_D5H_02H) \ -__PMC_EV(IAP, EVENT_D5H_04H) \ -__PMC_EV(IAP, EVENT_D5H_08H) \ -__PMC_EV(IAP, EVENT_D5H_0FH) \ -__PMC_EV(IAP, EVENT_D7H_00H) \ -__PMC_EV(IAP, EVENT_D8H_00H) \ -__PMC_EV(IAP, EVENT_D8H_01H) \ -__PMC_EV(IAP, EVENT_D8H_02H) \ -__PMC_EV(IAP, EVENT_D8H_03H) \ -__PMC_EV(IAP, EVENT_D8H_04H) \ -__PMC_EV(IAP, EVENT_D9H_00H) \ -__PMC_EV(IAP, EVENT_D9H_01H) \ -__PMC_EV(IAP, EVENT_D9H_02H) \ -__PMC_EV(IAP, EVENT_D9H_03H) \ -__PMC_EV(IAP, EVENT_DAH_00H) \ -__PMC_EV(IAP, EVENT_DAH_01H) \ -__PMC_EV(IAP, EVENT_DAH_02H) \ -__PMC_EV(IAP, EVENT_DBH_00H) \ -__PMC_EV(IAP, EVENT_DBH_01H) \ -__PMC_EV(IAP, EVENT_DCH_01H) \ -__PMC_EV(IAP, EVENT_DCH_02H) \ -__PMC_EV(IAP, EVENT_DCH_04H) \ -__PMC_EV(IAP, EVENT_DCH_08H) \ -__PMC_EV(IAP, EVENT_DCH_10H) \ -__PMC_EV(IAP, EVENT_DCH_1FH) \ -__PMC_EV(IAP, EVENT_E0H_00H) \ -__PMC_EV(IAP, EVENT_E0H_01H) \ -__PMC_EV(IAP, EVENT_E2H_00H) \ -__PMC_EV(IAP, EVENT_E4H_00H) \ -__PMC_EV(IAP, EVENT_E4H_01H) \ -__PMC_EV(IAP, EVENT_E5H_01H) \ -__PMC_EV(IAP, EVENT_E6H_00H) \ -__PMC_EV(IAP, EVENT_E6H_01H) \ -__PMC_EV(IAP, EVENT_E6H_02H) \ -__PMC_EV(IAP, EVENT_E6H_08H) \ -__PMC_EV(IAP, EVENT_E6H_10H) \ -__PMC_EV(IAP, EVENT_E6H_1FH) \ -__PMC_EV(IAP, EVENT_E7H_01H) \ -__PMC_EV(IAP, EVENT_E8H_01H) \ -__PMC_EV(IAP, EVENT_E8H_02H) \ -__PMC_EV(IAP, EVENT_E8H_03H) \ -__PMC_EV(IAP, EVENT_ECH_01H) \ -__PMC_EV(IAP, EVENT_F0H_00H) \ -__PMC_EV(IAP, EVENT_F0H_01H) \ -__PMC_EV(IAP, EVENT_F0H_02H) \ -__PMC_EV(IAP, EVENT_F0H_04H) \ -__PMC_EV(IAP, EVENT_F0H_08H) \ -__PMC_EV(IAP, EVENT_F0H_10H) \ -__PMC_EV(IAP, EVENT_F0H_20H) \ -__PMC_EV(IAP, EVENT_F0H_40H) \ -__PMC_EV(IAP, EVENT_F0H_80H) \ -__PMC_EV(IAP, EVENT_F1H_01H) \ -__PMC_EV(IAP, EVENT_F1H_02H) \ -__PMC_EV(IAP, EVENT_F1H_04H) \ -__PMC_EV(IAP, EVENT_F1H_07H) \ -__PMC_EV(IAP, EVENT_F1H_1FH) \ -__PMC_EV(IAP, EVENT_F2H_01H) \ -__PMC_EV(IAP, EVENT_F2H_02H) \ -__PMC_EV(IAP, EVENT_F2H_04H) \ -__PMC_EV(IAP, EVENT_F2H_05H) \ -__PMC_EV(IAP, EVENT_F2H_06H) \ -__PMC_EV(IAP, EVENT_F2H_08H) \ -__PMC_EV(IAP, EVENT_F2H_0AH) \ -__PMC_EV(IAP, EVENT_F2H_0FH) \ -__PMC_EV(IAP, EVENT_F3H_01H) \ -__PMC_EV(IAP, EVENT_F3H_02H) \ -__PMC_EV(IAP, EVENT_F3H_04H) \ -__PMC_EV(IAP, EVENT_F3H_08H) \ -__PMC_EV(IAP, EVENT_F3H_10H) \ -__PMC_EV(IAP, EVENT_F3H_20H) \ -__PMC_EV(IAP, EVENT_F4H_01H) \ -__PMC_EV(IAP, EVENT_F4H_02H) \ -__PMC_EV(IAP, EVENT_F4H_04H) \ -__PMC_EV(IAP, EVENT_F4H_08H) \ -__PMC_EV(IAP, EVENT_F4H_10H) \ -__PMC_EV(IAP, EVENT_F6H_01H) \ -__PMC_EV(IAP, EVENT_F7H_01H) \ -__PMC_EV(IAP, EVENT_F7H_02H) \ -__PMC_EV(IAP, EVENT_F7H_04H) \ -__PMC_EV(IAP, EVENT_F8H_00H) \ -__PMC_EV(IAP, EVENT_F8H_01H) \ -__PMC_EV(IAP, EVENT_FDH_01H) \ -__PMC_EV(IAP, EVENT_FDH_02H) \ -__PMC_EV(IAP, EVENT_FDH_04H) \ -__PMC_EV(IAP, EVENT_FDH_08H) \ -__PMC_EV(IAP, EVENT_FDH_10H) \ -__PMC_EV(IAP, EVENT_FDH_20H) \ -__PMC_EV(IAP, EVENT_FDH_40H) \ -__PMC_EV(IAP, EVENT_FEH_02H) \ -__PMC_EV(IAP, EVENT_FEH_04H) #define PMC_EV_IAP_FIRST PMC_EV_IAP_ARCH_BR_INS_RET #define PMC_EV_IAP_LAST PMC_EV_IAP_EVENT_FDH_40H @@ -1301,4309 +217,15 @@ __PMC_EV_ALIAS("llc-reference", IAP_ARCH_LLC_REF) \ __PMC_EV_ALIAS("unhalted-reference-cycles", IAP_ARCH_UNH_REF_CYC) \ __PMC_EV_ALIAS("unhalted-core-cycles", IAP_ARCH_UNH_COR_CYC) -/* - * Aliases for Atom PMCs. - */ -#define __PMC_EV_ALIAS_ATOM() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("BACLEARS", IAP_EVENT_E6H_01H) \ -__PMC_EV_ALIAS("BOGUS_BR", IAP_EVENT_E4H_00H) \ -__PMC_EV_ALIAS("BR_BAC_MISSP_EXEC", IAP_EVENT_8AH_00H) \ -__PMC_EV_ALIAS("BR_CALL_EXEC", IAP_EVENT_92H_00H) \ -__PMC_EV_ALIAS("BR_CALL_MISSP_EXEC", IAP_EVENT_93H_00H) \ -__PMC_EV_ALIAS("BR_CND_EXEC", IAP_EVENT_8BH_00H) \ -__PMC_EV_ALIAS("BR_CND_MISSP_EXEC", IAP_EVENT_8CH_00H) \ -__PMC_EV_ALIAS("BR_IND_CALL_EXEC", IAP_EVENT_94H_00H) \ -__PMC_EV_ALIAS("BR_IND_EXEC", IAP_EVENT_8DH_00H) \ -__PMC_EV_ALIAS("BR_IND_MISSP_EXEC", IAP_EVENT_8EH_00H) \ -__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC", IAP_EVENT_88H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ANY", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ANY1", IAP_EVENT_C4H_0FH) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_NOT_TAKEN", \ - IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_TAKEN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_NOT_TAKEN", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_TAKEN", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.TAKEN", IAP_EVENT_C4H_0CH) \ -__PMC_EV_ALIAS("BR_MISSP_EXEC", IAP_EVENT_89H_00H) \ -__PMC_EV_ALIAS("BR_RET_BAC_MISSP_EXEC", IAP_EVENT_91H_00H) \ -__PMC_EV_ALIAS("BR_RET_EXEC", IAP_EVENT_8FH_00H) \ -__PMC_EV_ALIAS("BR_RET_MISSP_EXEC", IAP_EVENT_90H_00H) \ -__PMC_EV_ALIAS("BR_TKN_BUBBLE_1", IAP_EVENT_97H_00H) \ -__PMC_EV_ALIAS("BR_TKN_BUBBLE_2", IAP_EVENT_98H_00H) \ -__PMC_EV_ALIAS("BUSQ_EMPTY", IAP_EVENT_7DH) \ -__PMC_EV_ALIAS("BUS_BNR_DRV", IAP_EVENT_61H) \ -__PMC_EV_ALIAS("BUS_DATA_RCV", IAP_EVENT_64H) \ -__PMC_EV_ALIAS("BUS_DRDY_CLOCKS", IAP_EVENT_62H) \ -__PMC_EV_ALIAS("BUS_HITM_DRV", IAP_EVENT_7BH) \ -__PMC_EV_ALIAS("BUS_HIT_DRV", IAP_EVENT_7AH) \ -__PMC_EV_ALIAS("BUS_IO_WAIT", IAP_EVENT_7FH) \ -__PMC_EV_ALIAS("BUS_LOCK_CLOCKS", IAP_EVENT_63H) \ -__PMC_EV_ALIAS("BUS_REQUEST_OUTSTANDING", IAP_EVENT_60H) \ -__PMC_EV_ALIAS("BUS_TRANS_ANY", IAP_EVENT_70H) \ -__PMC_EV_ALIAS("BUS_TRANS_BRD", IAP_EVENT_65H) \ -__PMC_EV_ALIAS("BUS_TRANS_BURST", IAP_EVENT_6EH) \ -__PMC_EV_ALIAS("BUS_TRANS_DEF", IAP_EVENT_6DH) \ -__PMC_EV_ALIAS("BUS_TRANS_IFETCH", IAP_EVENT_68H) \ -__PMC_EV_ALIAS("BUS_TRANS_INVAL", IAP_EVENT_69H) \ -__PMC_EV_ALIAS("BUS_TRANS_IO", IAP_EVENT_6CH) \ -__PMC_EV_ALIAS("BUS_TRANS_MEM", IAP_EVENT_6FH) \ -__PMC_EV_ALIAS("BUS_TRANS_P", IAP_EVENT_6BH) \ -__PMC_EV_ALIAS("BUS_TRANS_PWR", IAP_EVENT_6AH) \ -__PMC_EV_ALIAS("BUS_TRANS_RFO", IAP_EVENT_66H) \ -__PMC_EV_ALIAS("BUS_TRANS_WB", IAP_EVENT_67H) \ -__PMC_EV_ALIAS("CMP_SNOOP", IAP_EVENT_78H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.BUS", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.CORE_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.NO_OTHER", IAP_EVENT_3CH_02H) \ -__PMC_EV_ALIAS("CYCLES_DIV_BUSY", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("CYCLES_INT_MASKED.CYCLES_INT_MASKED", \ - IAP_EVENT_C6H_01H) \ -__PMC_EV_ALIAS("CYCLES_INT_MASKED.CYCLES_INT_PENDING_AND_MASKED", \ - IAP_EVENT_C6H_02H) \ -__PMC_EV_ALIAS("CYCLES_L1I_MEM_STALLED", IAP_EVENT_86H_00H) \ -__PMC_EV_ALIAS("DATA_TLB_MISSES.DTLB_MISS", IAP_EVENT_08H_07H) \ -__PMC_EV_ALIAS("DATA_TLB_MISSES.DTLB_MISS_LD", IAP_EVENT_08H_05H) \ -__PMC_EV_ALIAS("DATA_TLB_MISSES.DTLB_MISS_ST", IAP_EVENT_08H_06H) \ -__PMC_EV_ALIAS("DATA_TLB_MISSES.UTLB_MISS_LD", IAP_EVENT_08H_09H) \ -__PMC_EV_ALIAS("DELAYED_BYPASS.FP", IAP_EVENT_19H_00H) \ -__PMC_EV_ALIAS("DELAYED_BYPASS.LOAD", IAP_EVENT_19H_01H) \ -__PMC_EV_ALIAS("DELAYED_BYPASS.SIMD", IAP_EVENT_19H_02H) \ -__PMC_EV_ALIAS("DIV", IAP_EVENT_13H_00H) \ -__PMC_EV_ALIAS("DIV.AR", IAP_EVENT_13H_81H) \ -__PMC_EV_ALIAS("DIV.S", IAP_EVENT_13H_01H) \ -__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("DTLB_MISSES.L0_MISS_LD", IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_MISSES.MISS_LD", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_MISSES.MISS_ST", IAP_EVENT_08H_08H) \ -__PMC_EV_ALIAS("EIST_TRANS", IAP_EVENT_3AH_00H) \ -__PMC_EV_ALIAS("ESP.ADDITIONS", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("ESP.SYNCH", IAP_EVENT_ABH_01H) \ -__PMC_EV_ALIAS("EXT_SNOOP", IAP_EVENT_77H) \ -__PMC_EV_ALIAS("FP_ASSIST", IAP_EVENT_11H_01H) \ -__PMC_EV_ALIAS("FP_ASSIST.AR", IAP_EVENT_11H_81H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE", IAP_EVENT_10H_00H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS_TO_FP", IAP_EVENT_CCH_02H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS_TO_MMX", IAP_EVENT_CCH_01H) \ -__PMC_EV_ALIAS("HW_INT_RCV", IAP_EVENT_C8H_00H) \ -__PMC_EV_ALIAS("ICACHE.ACCESSES", IAP_EVENT_80H_03H) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("IDLE_DURING_DIV", IAP_EVENT_18H_00H) \ -__PMC_EV_ALIAS("ILD_STALL", IAP_EVENT_87H_00H) \ -__PMC_EV_ALIAS("INST_QUEUE.FULL", IAP_EVENT_83H_02H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.LOADS", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.OTHER", IAP_EVENT_C0H_04H) \ -__PMC_EV_ALIAS("INST_RETIRED.STORES", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("ITLB.FLUSH", IAP_EVENT_82H_04H) \ -__PMC_EV_ALIAS("ITLB.LARGE_MISS", IAP_EVENT_82H_10H) \ -__PMC_EV_ALIAS("ITLB.MISSES", IAP_EVENT_82H_02H) \ -__PMC_EV_ALIAS("ITLB.SMALL_MISS", IAP_EVENT_82H_02H) \ -__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C9H_00H) \ -__PMC_EV_ALIAS("L1D_ALL_CACHE_REF", IAP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("L1D_ALL_REF", IAP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE.LD", IAP_EVENT_40H_21H) \ -__PMC_EV_ALIAS("L1D_CACHE.ST", IAP_EVENT_41H_22H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK", IAP_EVENT_42H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK_DURATION", IAP_EVENT_42H_10H) \ -__PMC_EV_ALIAS("L1D_M_EVICT", IAP_EVENT_47H_00H) \ -__PMC_EV_ALIAS("L1D_M_REPL", IAP_EVENT_46H_00H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS", IAP_EVENT_48H_00H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_10H) \ -__PMC_EV_ALIAS("L1D_REPL", IAP_EVENT_45H_0FH) \ -__PMC_EV_ALIAS("L1D_SPLIT.LOADS", IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("L1D_SPLIT.STORES", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("L1I_MISSES", IAP_EVENT_81H_00H) \ -__PMC_EV_ALIAS("L1I_READS", IAP_EVENT_80H_00H) \ -__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \ -__PMC_EV_ALIAS("L2_DBUS_BUSY_RD", IAP_EVENT_23H) \ -__PMC_EV_ALIAS("L2_IFETCH", IAP_EVENT_28H) \ -__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \ -__PMC_EV_ALIAS("L2_LINES_IN", IAP_EVENT_24H) \ -__PMC_EV_ALIAS("L2_LINES_OUT", IAP_EVENT_26H) \ -__PMC_EV_ALIAS("L2_LOCK", IAP_EVENT_2BH) \ -__PMC_EV_ALIAS("L2_M_LINES_IN", IAP_EVENT_25H) \ -__PMC_EV_ALIAS("L2_M_LINES_OUT", IAP_EVENT_27H) \ -__PMC_EV_ALIAS("L2_NO_REQ", IAP_EVENT_32H) \ -__PMC_EV_ALIAS("L2_REJECT_BUSQ", IAP_EVENT_30H) \ -__PMC_EV_ALIAS("L2_RQSTS", IAP_EVENT_2EH) \ -__PMC_EV_ALIAS("L2_RQSTS.SELF.DEMAND.I_STATE", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("L2_RQSTS.SELF.DEMAND.MESI", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \ -__PMC_EV_ALIAS("LOAD_BLOCK.L1D", IAP_EVENT_03H_20H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.OVERLAP_STORE", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.STA", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.STD", IAP_EVENT_03H_04H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.UNTIL_RETIRE", IAP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_00H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_NUKES.MEM_ORDER", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACRO_INSTS.ALL_DECODED", IAP_EVENT_AAH_03H) \ -__PMC_EV_ALIAS("MACRO_INSTS.CISC_DECODED", IAP_EVENT_AAH_02H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGUATION.RESET", IAP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGUATION.SUCCESS", IAP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", IAP_EVENT_CBH_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_HIT", IAP_EVENT_CBH_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_LINE_MISS", IAP_EVENT_CBH_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_MISS", IAP_EVENT_CBH_02H) \ -__PMC_EV_ALIAS("MUL", IAP_EVENT_12H_00H) \ -__PMC_EV_ALIAS("MUL.AR", IAP_EVENT_12H_81H) \ -__PMC_EV_ALIAS("MUL.S", IAP_EVENT_12H_01H) \ -__PMC_EV_ALIAS("PAGE_WALKS.CYCLES", IAP_EVENT_0CH_03H) \ -__PMC_EV_ALIAS("PAGE_WALKS.WALKS", IAP_EVENT_0CH_03H) \ -__PMC_EV_ALIAS("PREFETCH.PREFETCHNTA", IAP_EVENT_07H_08H) \ -__PMC_EV_ALIAS("PREFETCH.PREFETCHT0", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("PREFETCH.SW_L2", IAP_EVENT_07H_06H) \ -__PMC_EV_ALIAS("PREF_RQSTS_DN", IAP_EVENT_F8H_00H) \ -__PMC_EV_ALIAS("PREF_RQSTS_UP", IAP_EVENT_F0H_00H) \ -__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("RAT_STALLS.FPSW", IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("RAT_STALLS.PARTIAL_CYCLES", IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_DCH_1FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.BR_MISS_CLEAR", IAP_EVENT_DCH_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_DCH_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LD_ST", IAP_EVENT_DCH_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", IAP_EVENT_DCH_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_DCH_02H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED", IAP_EVENT_A0H_00H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT2", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT3", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT4", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT5", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("SB_DRAIN_CYCLES", IAP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("SEGMENT_REG_LOADS.ANY", IAP_EVENT_06H_00H) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.ANY", IAP_EVENT_D5H_0FH) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.DS", IAP_EVENT_D5H_02H) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.ES", IAP_EVENT_D5H_01H) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.FS", IAP_EVENT_D5H_04H) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.GS", IAP_EVENT_D5H_08H) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.ANY", IAP_EVENT_D4H_0FH) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.DS", IAP_EVENT_D4H_02H) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.ES", IAP_EVENT_D4H_01H) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.FS", IAP_EVENT_D4H_04H) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.GS", IAP_EVENT_D4H_08H) \ -__PMC_EV_ALIAS("SIMD_ASSIST", IAP_EVENT_CDH_00H) \ -__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.PACKED_DOUBLE", \ - IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.PACKED_SINGLE", \ - IAP_EVENT_CAH_01H) \ -__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.SCALAR_DOUBLE", \ - IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.SCALAR_SINGLE", \ - IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("SIMD_INSTR_RETIRED", IAP_EVENT_CEH_00H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.ANY", IAP_EVENT_C7H_1FH) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.PACKED_DOUBLE", IAP_EVENT_C7H_04H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.PACKED_SINGLE", IAP_EVENT_C7H_01H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_08H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.VECTOR", IAP_EVENT_C7H_10H) \ -__PMC_EV_ALIAS("SIMD_SAT_INSTR_RETIRED", IAP_EVENT_CFH_00H) \ -__PMC_EV_ALIAS("SIMD_SAT_UOP_EXEC.AR", IAP_EVENT_B1H_80H) \ -__PMC_EV_ALIAS("SIMD_SAT_UOP_EXEC.S", IAP_EVENT_B1H_00H) \ -__PMC_EV_ALIAS("SIMD_UOPS_EXEC.AR", IAP_EVENT_B0H_80H) \ -__PMC_EV_ALIAS("SIMD_UOPS_EXEC.S", IAP_EVENT_B0H_00H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.ARITHMETIC.AR", IAP_EVENT_B3H_A0H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.ARITHMETIC.S", IAP_EVENT_B3H_20H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.LOGICAL.AR", IAP_EVENT_B3H_90H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.LOGICAL.S", IAP_EVENT_B3H_10H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.MUL.AR", IAP_EVENT_B3H_81H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.MUL.S", IAP_EVENT_B3H_01H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.PACK.AR", IAP_EVENT_B3H_84H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.PACK.S", IAP_EVENT_B3H_04H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.SHIFT.AR", IAP_EVENT_B3H_82H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.SHIFT.S", IAP_EVENT_B3H_02H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.UNPACK.AR", IAP_EVENT_B3H_88H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.UNPACK.S", IAP_EVENT_B3H_08H) \ -__PMC_EV_ALIAS("SNOOP_STALL_DRV", IAP_EVENT_7EH) \ -__PMC_EV_ALIAS("SSE_PRE_EXEC.L2", IAP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("SSE_PRE_EXEC.STORES", IAP_EVENT_07H_03H) \ -__PMC_EV_ALIAS("SSE_PRE_MISS.L1", IAP_EVENT_4BH_01H) \ -__PMC_EV_ALIAS("SSE_PRE_MISS.L2", IAP_EVENT_4BH_02H) \ -__PMC_EV_ALIAS("SSE_PRE_MISS.NTA", IAP_EVENT_4BH_00H) \ -__PMC_EV_ALIAS("STORE_BLOCK.ORDER", IAP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("STORE_BLOCK.SNOOP", IAP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("STORE_FORWARDS.GOOD", IAP_EVENT_02H_81H) \ -__PMC_EV_ALIAS("THERMAL_TRIP", IAP_EVENT_3BH_C0H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_10H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.FUSED", IAP_EVENT_C2H_07H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.LD_IND_BR", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSION", IAP_EVENT_C2H_04H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.NON_FUSED", IAP_EVENT_C2H_08H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.STD_STA", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("X87_COMP_OPS_EXE.ANY.AR", IAP_EVENT_10H_81H) \ -__PMC_EV_ALIAS("X87_COMP_OPS_EXE.ANY.S", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("X87_OPS_RETIRED.ANY", IAP_EVENT_C1H_FEH) \ -__PMC_EV_ALIAS("X87_OPS_RETIRED.FXCH", IAP_EVENT_C1H_01H) - -/* - * Aliases for Atom Silvermont PMCs. - */ -#define __PMC_EV_ALIAS_ATOM_SILVERMONT() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("REHABQ.LD_BLOCK_ST_FORWARD", IAP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("REHABQ.LD_BLOCK_STD_NOTREADY", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("REHABQ.ST_SPLITS", IAP_EVENT_03H_04H) \ -__PMC_EV_ALIAS("REHABQ.LD_SPLITS", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("REHABQ.LOCK", IAP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("REHABQ.STA_FULL", IAP_EVENT_03H_20H) \ -__PMC_EV_ALIAS("REHABQ.ANY_LD", IAP_EVENT_03H_40H) \ -__PMC_EV_ALIAS("REHABQ.ANY_ST", IAP_EVENT_03H_80H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.L1_MISS_LOADS", IAP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.L2_HIT_LOADS", IAP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.L2_MISS_LOADS", IAP_EVENT_04H_04H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.DTLB_MISS_LOADS", IAP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.UTLB_MISS", IAP_EVENT_04H_10H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.HITM", IAP_EVENT_04H_20H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_04H_40H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_STORES", IAP_EVENT_04H_80H) \ -__PMC_EV_ALIAS("PAGE_WALKS.D_SIDE_CYCLES", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("PAGE_WALKS.I_SIDE_CYCLES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("PAGE_WALKS.WALKS", IAP_EVENT_05H_03H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("L2_REJECT_XQ.ALL", IAP_EVENT_30H_00H) \ -__PMC_EV_ALIAS("CORE_REJECT_L2Q.ALL", IAP_EVENT_31H_00H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.CORE_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.REF_P", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("ICACHE.HIT", IAP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ICACHE.ACCESSES", IAP_EVENT_80H_03H) \ -__PMC_EV_ALIAS("NIP_STALL.ICACHE_MISS", IAP_EVENT_B6H_04H) \ -__PMC_EV_ALIAS("OFFCORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFFCORE_RESPONSE_1", IAP_EVENT_B7H_02H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.MS", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_10H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.FP_ASSIST", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.ALL", IAP_EVENT_C3H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.JCC", IAP_EVENT_C4H_7EH) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_BFH) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NON_RETURN_IND", IAP_EVENT_C4H_EBH) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.RETURN", IAP_EVENT_C4H_F7H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CALL", IAP_EVENT_C4H_F9H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.IND_CALL", IAP_EVENT_C4H_FBH) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.REL_CALL", IAP_EVENT_C4H_FDH) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.TAKEN_JCC", IAP_EVENT_C4H_FEH) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.JCC", IAP_EVENT_C5H_7EH) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.FAR", IAP_EVENT_C5H_BFH) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NON_RETURN_IND", IAP_EVENT_C5H_EBH) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.RETURN", IAP_EVENT_C5H_F7H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CALL", IAP_EVENT_C5H_F9H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.IND_CALL", IAP_EVENT_C5H_FBH) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.REL_CALL", IAP_EVENT_C5H_FDH) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN_JCC", IAP_EVENT_C5H_FEH) \ -__PMC_EV_ALIAS("NO_ALLOC_CYCLES.ROB_FULL", IAP_EVENT_CAH_01H) \ -__PMC_EV_ALIAS("NO_ALLOC_CYCLES.RAT_STALL", IAP_EVENT_CAH_20H) \ -__PMC_EV_ALIAS("NO_ALLOC_CYCLES.ALL", IAP_EVENT_CAH_3FH) \ -__PMC_EV_ALIAS("NO_ALLOC_CYCLES.NOT_DELIVERED", IAP_EVENT_CAH_50H) \ -__PMC_EV_ALIAS("RS_FULL_STALL.MEC", IAP_EVENT_CBH_01H) \ -__PMC_EV_ALIAS("RS_FULL_STALL.ALL", IAP_EVENT_CBH_1FH) \ -__PMC_EV_ALIAS("CYCLES_DIV_BUSY.ANY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("BACLEARS.ALL", IAP_EVENT_E6H_01H) \ -__PMC_EV_ALIAS("BACLEARS.RETURN", IAP_EVENT_E6H_08H) \ -__PMC_EV_ALIAS("BACLEARS.COND", IAP_EVENT_E6H_10H) \ -__PMC_EV_ALIAS("MS_DECODED.MS_ENTRY", IAP_EVENT_E7H_01H) - -/* - * Aliases for Broadwell PMC events. - */ -#define __PMC_EV_ALIAS_BROADWELL() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_4K", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_MISS", IAP_EVENT_24H_21H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_41H) \ -__PMC_EV_ALIAS("L2_RQSTS.L2_PF_HIT", IAP_EVENT_24H_50H) \ -__PMC_EV_ALIAS("L2_RQSTS.L2_PF_MISS", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ -__PMC_EV_ALIAS("L2_DEMAND_RQSTS.WB_HIT", IAP_EVENT_27H_50H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_4K", \ - IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_4K", IAP_EVENT_49H_20H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("EPT.WALK_CYCLES", IAP_EVENT_4FH_10H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ - IAP_EVENT_58H_04H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_NOT_ELIMINATED", \ - IAP_EVENT_58H_08H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_ELIMINATED", IAP_EVENT_58H_02H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ - IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_4K", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_4K", IAP_EVENT_85H_20H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT", IAP_EVENT_88H_02H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NON_CALL", IAP_EVENT_88H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXE.COND", IAP_EVENT_89H_01H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NON_CALL", IAP_EVENT_89H_04H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_2", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_3", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_4", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_5", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_6", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_7", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L1", IAP_EVENT_BCH_11H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L1", IAP_EVENT_BCH_21H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L2", IAP_EVENT_BCH_12H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L2", IAP_EVENT_BCH_22H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L3", IAP_EVENT_BCH_14H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L3", IAP_EVENT_BCH_24H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_MEMORY", IAP_EVENT_BCH_18H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ANY_WB_ASSIST", IAP_EVENT_C1H_40H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_U_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.LOCK_LOADS", IAP_EVENT_D0H_21H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_MISS", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_05H) - -/* - * Aliases for Broadwell XEON PMC events. - */ -#define __PMC_EV_ALIAS_BROADWELL_XEON() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_4K", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) /**/ \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_MISS", IAP_EVENT_24H_21H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_41H) \ -__PMC_EV_ALIAS("L2_RQSTS.L2_PF_HIT", IAP_EVENT_24H_50H) \ -__PMC_EV_ALIAS("L2_RQSTS.L2_PF_MISS", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ -__PMC_EV_ALIAS("L2_DEMAND_RQSTS.WB_HIT", IAP_EVENT_27H_50H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_4K", \ - IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_4K", IAP_EVENT_49H_20H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("EPT.WALK_CYCLES", IAP_EVENT_4FH_10H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ - IAP_EVENT_58H_04H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_NOT_ELIMINATED", \ - IAP_EVENT_58H_08H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_ELIMINATED", IAP_EVENT_58H_02H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ - IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_4K", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_4K", IAP_EVENT_85H_20H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT", IAP_EVENT_88H_02H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NON_CALL", IAP_EVENT_88H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXE.COND", IAP_EVENT_89H_01H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NON_CALL", IAP_EVENT_89H_04H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_2", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_3", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_4", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_5", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_6", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_7", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L1", IAP_EVENT_BCH_11H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L1", IAP_EVENT_BCH_21H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L2", IAP_EVENT_BCH_12H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L2", IAP_EVENT_BCH_22H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L3", IAP_EVENT_BCH_14H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L3", IAP_EVENT_BCH_24H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_MEMORY", IAP_EVENT_BCH_18H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ANY_WB_ASSIST", IAP_EVENT_C1H_40H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_U_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.LOCK_LOADS", IAP_EVENT_D0H_21H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_MISS", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_05H) - -/* - * Alisases for Skylake - */ -#define __PMC_EV_ALIAS_SKYLAKE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_0EH) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_PENDING", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_01H) \ -__PMC_EV_ALIAS("INT_MISC.CLEAR_RESTEER_CYCLES", IAP_EVENT_0DH_80H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.VECTORS_WIDTH_MISMATCH", IAP_EVENT_0EH_02H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_MISS", IAP_EVENT_24H_21H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_22H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_24H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_MISS", IAP_EVENT_24H_27H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_38H) \ -__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_3FH) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_41H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_42H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_44H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_D8H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_REFERENCES", IAP_EVENT_24H_E7H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ -__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_EFH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE", \ - IAP_EVENT_3CH_02H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.FB_FULL", IAP_EVENT_48H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_0EH) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_PENDING", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_20H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("EPT.WALK_CYCLES", IAP_EVENT_4FH_10H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD", \ - IAP_EVENT_60H_10H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("ICACHE_16B.IFDATA_STALL", IAP_EVENT_80H_04H) \ -__PMC_EV_ALIAS("ICACHE_64B.IFTAG_HIT", IAP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("ICACHE_64B.IFTAG_MISS", IAP_EVENT_83H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_0EH) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_PENDING", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_20H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_2", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_3", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_4", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_5", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_6", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_7", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_MISS", IAP_EVENT_A3H_01H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L3_MISS", IAP_EVENT_A3H_02H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_TOTAL", IAP_EVENT_A3H_04H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L2_MISS", IAP_EVENT_A3H_05H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L3_MISS", IAP_EVENT_A3H_06H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_MISS", IAP_EVENT_A3H_08H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L1D_MISS", IAP_EVENT_A3H_0CH) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_MEM_ANY", IAP_EVENT_A3H_10H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_MEM_ANY", IAP_EVENT_A3H_14H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.EXE_BOUND_0_PORTS", IAP_EVENT_A6H_01H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.1_PORTS_UTIL", IAP_EVENT_A6H_02H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.2_PORTS_UTIL", IAP_EVENT_A6H_04H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.3_PORTS_UTIL", IAP_EVENT_A6H_08H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.4_PORTS_UTIL", IAP_EVENT_A6H_10H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.BOUND_ON_STORES", IAP_EVENT_A6H_40H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", \ - IAP_EVENT_B0H_10H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_REQUESTS", IAP_EVENT_B0H_80H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.X87", IAP_EVENT_B1H_10H) \ -__PMC_EV_ALIAS("OFF_CORE_REQUEST_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ANY", IAP_EVENT_C1H_3FH) \ -__PMC_EV_ALIAS("UOPS_RETIRED.STALL_CYCLES", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_U_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FRONTEND_RETIRED.DSB_MISS", IAP_EVENT_C6H_01H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_01H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.128B_PACKED_DOUBLE", \ - IAP_EVENT_C7H_04H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.128B_PACKED_SINGLE", \ - IAP_EVENT_C7H_08H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.256B_PACKED_DOUBLE", \ - IAP_EVENT_C7H_10H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.256B_PACKED_SINGLE", \ - IAP_EVENT_C7H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("HW_INTERRUPTS.RECEIVED", IAP_EVENT_CBH_01H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.LOCK_LOADS", IAP_EVENT_D0H_21H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_MISS", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.FB_HIT", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) - -/* - * Alisases for Skylake Xeon (Intel Xeon Scalable Processors). - */ -#define __PMC_EV_ALIAS_SKYLAKE_XEON() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M", \ - IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_1G", IAP_EVENT_08H_08H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_0EH) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_PENDING", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_01H) \ -__PMC_EV_ALIAS("INT_MISC.CLEAR_RESTEER_CYCLES", IAP_EVENT_0DH_80H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.VECTORS_WIDTH_MISMATCH", IAP_EVENT_0EH_02H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ -__PMC_EV_ALIAS("ARITH.DIVIDER_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_MISS", IAP_EVENT_24H_21H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_22H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_24H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_MISS", IAP_EVENT_24H_27H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_38H) \ -__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_3FH) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_41H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_42H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_44H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_D8H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_REFERENCES", IAP_EVENT_24H_E7H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ -__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ -__PMC_EV_ALIAS("CORE_POWER.LVL0_TURBO_LICENSE", IAP_EVENT_28H_07H) \ -__PMC_EV_ALIAS("CORE_POWER.LVL1_TURBO_LICENSE", IAP_EVENT_28H_18H) \ -__PMC_EV_ALIAS("CORE_POWER.LVL2_TURBO_LICENSE", IAP_EVENT_28H_20H) \ -__PMC_EV_ALIAS("CORE_POWER.THROTTLE", IAP_EVENT_28H_40H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE", \ - IAP_EVENT_3CH_02H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.FB_FULL", IAP_EVENT_48H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_4K", \ - IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", \ - IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_1G", \ - IAP_EVENT_49H_08H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_0EH) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_PENDING", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_20H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("EPT.WALK_PENDING", IAP_EVENT_4FH_10H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("TX_MEM.ABORT_CONFLICT", IAP_EVENT_54H_01H) \ -__PMC_EV_ALIAS("TX_MEM.ABORT_CAPACITY", IAP_EVENT_54H_02H) \ -__PMC_EV_ALIAS("TX_MEM.ABORT_HLE_STORE_TO_ELIDED_LOCK", \ - IAP_EVENT_54H_04H) \ -__PMC_EV_ALIAS("TX_MEM.ABORT_HLE_ELISION_BUFFER_NOT_EMPTY", \ - IAP_EVENT_54H_08H) \ -__PMC_EV_ALIAS("TX_MEM.ABORT_HLE_ELISION_BUFFER_MISMATCH", \ - IAP_EVENT_54H_10H) \ -__PMC_EV_ALIAS("TX_MEM.ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT", \ - IAP_EVENT_54H_20H) \ -__PMC_EV_ALIAS("TX_MEM.ABORT_HLE_ELISION_BUFFER_FULL", \ - IAP_EVENT_54H_40H) \ -__PMC_EV_ALIAS("TX_EXEC.MISC1", IAP_EVENT_5DH_01H) \ -__PMC_EV_ALIAS("TX_EXEC.MISC2", IAP_EVENT_5DH_02H) \ -__PMC_EV_ALIAS("TX_EXEC.MISC3", IAP_EVENT_5DH_04H) \ -__PMC_EV_ALIAS("TX_EXEC.MISC4", IAP_EVENT_5DH_08H) \ -__PMC_EV_ALIAS("TX_EXEC.MISC5", IAP_EVENT_5DH_10H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD", \ - IAP_EVENT_60H_10H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("ICACHE_16B.IFDATA_STALL", IAP_EVENT_80H_04H) \ -__PMC_EV_ALIAS("ICACHE_64B.IFTAG_HIT", IAP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("ICACHE_64B.IFTAG_MISS", IAP_EVENT_83H_02H) \ -__PMC_EV_ALIAS("ICACHE_64B.IFTAG_STALL", IAP_EVENT_83H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_4K", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_2M_4M", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_1G", IAP_EVENT_85H_08H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_0EH) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_PENDING", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_20H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_6", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_7", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_MISS", IAP_EVENT_A3H_01H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L3_MISS", IAP_EVENT_A3H_02H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_TOTAL", IAP_EVENT_A3H_04H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L2_MISS", IAP_EVENT_A3H_05H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L3_MISS", IAP_EVENT_A3H_06H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_MISS", IAP_EVENT_A3H_08H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L1D_MISS", IAP_EVENT_A3H_0CH) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_MEM_ANY", IAP_EVENT_A3H_10H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_MEM_ANY", IAP_EVENT_A3H_14H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.EXE_BOUND_0_PORTS", IAP_EVENT_A6H_01H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.1_PORTS_UTIL", IAP_EVENT_A6H_02H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.2_PORTS_UTIL", IAP_EVENT_A6H_04H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.3_PORTS_UTIL", IAP_EVENT_A6H_08H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.4_PORTS_UTIL", IAP_EVENT_A6H_10H) \ -__PMC_EV_ALIAS("EXE_ACTIVITY.BOUND_ON_STORES", IAP_EVENT_A6H_40H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", \ - IAP_EVENT_B0H_10H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_REQUESTS", IAP_EVENT_B0H_80H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.X87", IAP_EVENT_B1H_10H) \ -__PMC_EV_ALIAS("OFF_CORE_REQUEST_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ANY", IAP_EVENT_C1H_3FH) \ -__PMC_EV_ALIAS("UOPS_RETIRED.STALL_CYCLES", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.COUNT", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FRONTEND_RETIRED.DSB_MISS", IAP_EVENT_C6H_01H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_01H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.128B_PACKED_DOUBLE", \ - IAP_EVENT_C7H_04H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.128B_PACKED_SINGLE", \ - IAP_EVENT_C7H_08H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.256B_PACKED_DOUBLE", \ - IAP_EVENT_C7H_10H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.256B_PACKED_SINGLE", \ - IAP_EVENT_C7H_20H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.512B_PACKED_DOUBLE", \ - IAP_EVENT_C7H_40H) \ -__PMC_EV_ALIAS("FP_ARIT_INST_RETIRED.512B_PACKED_SINGLE", \ - IAP_EVENT_C7H_80H) \ -__PMC_EV_ALIAS("HLE_RETIRED.START", IAP_EVENT_C8H_01H) \ -__PMC_EV_ALIAS("HLE_RETIRED.COMMIT", IAP_EVENT_C8H_02H) \ -__PMC_EV_ALIAS("HLE_RETIRED.ABORTED", IAP_EVENT_C8H_04H) \ -__PMC_EV_ALIAS("HLE_RETIRED.ABORTED_MEM", IAP_EVENT_C8H_08H) \ -__PMC_EV_ALIAS("HLE_RETIRED.ABORTED_TIMER", IAP_EVENT_C8H_10H) \ -__PMC_EV_ALIAS("HLE_RETIRED.ABORTED_UNFRIENDLY", IAP_EVENT_C8H_20H) \ -__PMC_EV_ALIAS("HLE_RETIRED.ABORTED_MEMTYPE", IAP_EVENT_C8H_40H) \ -__PMC_EV_ALIAS("HLE_RETIRED.ABORTED_EVENTS", IAP_EVENT_C8H_80H) \ -__PMC_EV_ALIAS("RTM_RETIRED.START", IAP_EVENT_C9H_01H) \ -__PMC_EV_ALIAS("RTM_RETIRED.COMMIT", IAP_EVENT_C9H_02H) \ -__PMC_EV_ALIAS("RTM_RETIRED.ABORTED", IAP_EVENT_C9H_04H) \ -__PMC_EV_ALIAS("RTM_RETIRED.ABORTED_MEM", IAP_EVENT_C9H_08H) \ -__PMC_EV_ALIAS("RTM_RETIRED.ABORTED_TIMER", IAP_EVENT_C9H_10H) \ -__PMC_EV_ALIAS("RTM_RETIRED.ABORTED_UNFRIENDLY", IAP_EVENT_C9H_20H) \ -__PMC_EV_ALIAS("RTM_RETIRED.ABORTED_MEMTYPE", IAP_EVENT_C9H_40H) \ -__PMC_EV_ALIAS("RTM_RETIRED.ABORTED_EVENTS", IAP_EVENT_C9H_80H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("HW_INTERRUPTS.RECEIVED", IAP_EVENT_CBH_01H) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.LOCK_LOADS", IAP_EVENT_D0H_21H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_MISS", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.FB_HIT", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM", \ - IAP_EVENT_D3H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM", \ - IAP_EVENT_D3H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD", \ - IAP_EVENT_D3H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_MISC_RETIRED.UC", IAP_EVENT_D4H_04H) \ -__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_1FH) \ -__PMC_EV_ALIAS("L2_LINES_OUT.SILENT", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.NON_SILENT", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.USELESS_PREF", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) \ -__PMC_EV_ALIAS("IDI_MISC.WB_UPGRADE", IAP_EVENT_FEH_02H) \ -__PMC_EV_ALIAS("IDI_MISC.WB_DOWNGRADE", IAP_EVENT_FEH_04H) - -/* - * Aliases for Core PMC events. - */ -#define __PMC_EV_ALIAS_CORE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("BAClears", IAP_EVENT_E6H_00H) \ -__PMC_EV_ALIAS("BTB_Misses", IAP_EVENT_E2H_00H) \ -__PMC_EV_ALIAS("Br_BAC_Missp_Exec", IAP_EVENT_8AH_00H) \ -__PMC_EV_ALIAS("Br_Bogus", IAP_EVENT_E4H_00H) \ -__PMC_EV_ALIAS("Br_Call_Exec", IAP_EVENT_92H_00H) \ -__PMC_EV_ALIAS("Br_Call_Missp_Exec", IAP_EVENT_93H_00H) \ -__PMC_EV_ALIAS("Br_Cnd_Exec", IAP_EVENT_8BH_00H) \ -__PMC_EV_ALIAS("Br_Cnd_Missp_Exec", IAP_EVENT_8CH_00H) \ -__PMC_EV_ALIAS("Br_Ind_Call_Exec", IAP_EVENT_94H_00H) \ -__PMC_EV_ALIAS("Br_Ind_Exec", IAP_EVENT_8DH_00H) \ -__PMC_EV_ALIAS("Br_Ind_Missp_Exec", IAP_EVENT_8EH_00H) \ -__PMC_EV_ALIAS("Br_Inst_Exec", IAP_EVENT_88H_00H) \ -__PMC_EV_ALIAS("Br_Instr_Decoded", IAP_EVENT_E0H_00H) \ -__PMC_EV_ALIAS("Br_Instr_Ret", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("Br_MisPred_Ret", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("Br_MisPred_Taken_Ret", IAP_EVENT_CAH_00H) \ -__PMC_EV_ALIAS("Br_Missp_Exec", IAP_EVENT_89H_00H) \ -__PMC_EV_ALIAS("Br_Ret_BAC_Missp_Exec", IAP_EVENT_91H_00H) \ -__PMC_EV_ALIAS("Br_Ret_Exec", IAP_EVENT_8FH_00H) \ -__PMC_EV_ALIAS("Br_Ret_Missp_Exec", IAP_EVENT_90H_00H) \ -__PMC_EV_ALIAS("Br_Taken_Ret", IAP_EVENT_C9H_00H) \ -__PMC_EV_ALIAS("Bus_BNR_Clocks", IAP_EVENT_61H_00H) \ -__PMC_EV_ALIAS("Bus_DRDY_Clocks", IAP_EVENT_62H_00H) \ -__PMC_EV_ALIAS("Bus_Data_Rcv", IAP_EVENT_64H_40H) \ -__PMC_EV_ALIAS("Bus_Locks_Clocks", IAP_EVENT_63H) \ -__PMC_EV_ALIAS("Bus_Not_In_Use", IAP_EVENT_7DH) \ -__PMC_EV_ALIAS("Bus_Req_Outstanding", IAP_EVENT_60H) \ -__PMC_EV_ALIAS("Bus_Snoop_Stall", IAP_EVENT_7EH_00H) \ -__PMC_EV_ALIAS("Bus_Snoops", IAP_EVENT_77H) \ -__PMC_EV_ALIAS("Bus_Trans_Any", IAP_EVENT_70H) \ -__PMC_EV_ALIAS("Bus_Trans_Brd", IAP_EVENT_65H) \ -__PMC_EV_ALIAS("Bus_Trans_Burst", IAP_EVENT_6EH) \ -__PMC_EV_ALIAS("Bus_Trans_Def", IAP_EVENT_6DH) \ -__PMC_EV_ALIAS("Bus_Trans_IO", IAP_EVENT_6CH) \ -__PMC_EV_ALIAS("Bus_Trans_Ifetch", IAP_EVENT_68H) \ -__PMC_EV_ALIAS("Bus_Trans_Inval", IAP_EVENT_69H) \ -__PMC_EV_ALIAS("Bus_Trans_Mem", IAP_EVENT_6FH) \ -__PMC_EV_ALIAS("Bus_Trans_P", IAP_EVENT_6BH) \ -__PMC_EV_ALIAS("Bus_Trans_Pwr", IAP_EVENT_6AH) \ -__PMC_EV_ALIAS("Bus_Trans_RFO", IAP_EVENT_66H) \ -__PMC_EV_ALIAS("Bus_Trans_WB", IAP_EVENT_67H) \ -__PMC_EV_ALIAS("Cycles_Div_Busy", IAP_EVENT_14H_00H) \ -__PMC_EV_ALIAS("Cycles_Int_Masked", IAP_EVENT_C6H_00H) \ -__PMC_EV_ALIAS("Cycles_Int_Pending_Masked", IAP_EVENT_C7H_00H) \ -__PMC_EV_ALIAS("DCU_Snoop_To_Share", IAP_EVENT_78H) \ -__PMC_EV_ALIAS("DCache_Cache_LD", IAP_EVENT_40H) \ -__PMC_EV_ALIAS("DCache_Cache_Lock", IAP_EVENT_42H) \ -__PMC_EV_ALIAS("DCache_Cache_ST", IAP_EVENT_41H) \ -__PMC_EV_ALIAS("DCache_M_Evict", IAP_EVENT_47H_00H) \ -__PMC_EV_ALIAS("DCache_M_Repl", IAP_EVENT_46H_00H) \ -__PMC_EV_ALIAS("DCache_Pend_Miss", IAP_EVENT_48H_00H) \ -__PMC_EV_ALIAS("DCache_Repl", IAP_EVENT_45H_0FH) \ -__PMC_EV_ALIAS("Data_Mem_Cache_Ref", IAP_EVENT_44H_02H) \ -__PMC_EV_ALIAS("Data_Mem_Ref", IAP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("Dbus_Busy", IAP_EVENT_22H) \ -__PMC_EV_ALIAS("Dbus_Busy_Rd", IAP_EVENT_23H) \ -__PMC_EV_ALIAS("Div", IAP_EVENT_13H_00H) \ -__PMC_EV_ALIAS("Dtlb_Miss", IAP_EVENT_49H_00H) \ -__PMC_EV_ALIAS("ESP_Uops", IAP_EVENT_D7H_00H) \ -__PMC_EV_ALIAS("EST_Trans", IAP_EVENT_3AH) \ -__PMC_EV_ALIAS("FP_Assist", IAP_EVENT_11H_00H) \ -__PMC_EV_ALIAS("FP_Comp_Instr_Ret", IAP_EVENT_C1H_00H) \ -__PMC_EV_ALIAS("FP_Comps_Op_Exe", IAP_EVENT_10H_00H) \ -__PMC_EV_ALIAS("FP_MMX_Trans", IAP_EVENT_CCH_01H) \ -__PMC_EV_ALIAS("Fused_Ld_Uops_Ret", IAP_EVENT_DAH_01H) \ -__PMC_EV_ALIAS("Fused_St_Uops_Ret", IAP_EVENT_DAH_02H) \ -__PMC_EV_ALIAS("Fused_Uops_Ret", IAP_EVENT_DAH_00H) \ -__PMC_EV_ALIAS("HW_Int_Rx", IAP_EVENT_C8H_00H) \ -__PMC_EV_ALIAS("ICache_Misses", IAP_EVENT_81H_00H) \ -__PMC_EV_ALIAS("ICache_Reads", IAP_EVENT_80H_00H) \ -__PMC_EV_ALIAS("IFU_Mem_Stall", IAP_EVENT_86H_00H) \ -__PMC_EV_ALIAS("ILD_Stall", IAP_EVENT_87H_00H) \ -__PMC_EV_ALIAS("ITLB_Misses", IAP_EVENT_85H_00H) \ -__PMC_EV_ALIAS("Instr_Decoded", IAP_EVENT_D0H_00H) \ -__PMC_EV_ALIAS("Instr_Ret", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("L1_Pref_Req", IAP_EVENT_4FH_00H) \ -__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \ -__PMC_EV_ALIAS("L2_IFetch", IAP_EVENT_28H) \ -__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \ -__PMC_EV_ALIAS("L2_Lines_In", IAP_EVENT_24H) \ -__PMC_EV_ALIAS("L2_Lines_Out", IAP_EVENT_26H) \ -__PMC_EV_ALIAS("L2_M_Lines_In", IAP_EVENT_25H) \ -__PMC_EV_ALIAS("L2_M_Lines_Out", IAP_EVENT_27H) \ -__PMC_EV_ALIAS("L2_No_Request_Cycles", IAP_EVENT_32H) \ -__PMC_EV_ALIAS("L2_Reject_Cycles", IAP_EVENT_30H) \ -__PMC_EV_ALIAS("L2_Rqsts", IAP_EVENT_2EH) \ -__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \ -__PMC_EV_ALIAS("LD_Blocks", IAP_EVENT_03H_00H) \ -__PMC_EV_ALIAS("LLC_Misses", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("LLC_Reference", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("MMX_Assist", IAP_EVENT_CDH_00H) \ -__PMC_EV_ALIAS("MMX_FP_Trans", IAP_EVENT_CCH_00H) \ -__PMC_EV_ALIAS("MMX_Instr_Exec", IAP_EVENT_B0H_00H) \ -__PMC_EV_ALIAS("MMX_Instr_Ret", IAP_EVENT_CEH_00H) \ -__PMC_EV_ALIAS("Misalign_Mem_Ref", IAP_EVENT_05H_00H) \ -__PMC_EV_ALIAS("Mul", IAP_EVENT_12H_00H) \ -__PMC_EV_ALIAS("NonHlt_Ref_Cycles", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("Pref_Rqsts_Dn", IAP_EVENT_F8H_00H) \ -__PMC_EV_ALIAS("Pref_Rqsts_Up", IAP_EVENT_F0H_00H) \ -__PMC_EV_ALIAS("Resource_Stall", IAP_EVENT_A2H_00H) \ -__PMC_EV_ALIAS("SD_Drains", IAP_EVENT_04H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_P_Comp_Ret", IAP_EVENT_D9H_02H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_P_Ret", IAP_EVENT_D8H_02H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_S_Comp_Ret", IAP_EVENT_D9H_03H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_S_Ret", IAP_EVENT_D8H_03H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_P_Comp_Ret", IAP_EVENT_D9H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_Ret", IAP_EVENT_D8H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_S_Comp_Ret", IAP_EVENT_D9H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_S_Ret", IAP_EVENT_D8H_01H) \ -__PMC_EV_ALIAS("SIMD_Int_128_Ret", IAP_EVENT_D8H_04H) \ -__PMC_EV_ALIAS("SIMD_Int_Pari_Exec", IAP_EVENT_B3H_20H) \ -__PMC_EV_ALIAS("SIMD_Int_Pck_Exec", IAP_EVENT_B3H_04H) \ -__PMC_EV_ALIAS("SIMD_Int_Plog_Exec", IAP_EVENT_B3H_10H) \ -__PMC_EV_ALIAS("SIMD_Int_Pmul_Exec", IAP_EVENT_B3H_01H) \ -__PMC_EV_ALIAS("SIMD_Int_Psft_Exec", IAP_EVENT_B3H_02H) \ -__PMC_EV_ALIAS("SIMD_Int_Sat_Exec", IAP_EVENT_B1H_00H) \ -__PMC_EV_ALIAS("SIMD_Int_Upck_Exec", IAP_EVENT_B3H_08H) \ -__PMC_EV_ALIAS("SMC_Detected", IAP_EVENT_C3H_00H) \ -__PMC_EV_ALIAS("SSE_NTStores_Miss", IAP_EVENT_4BH_03H) \ -__PMC_EV_ALIAS("SSE_NTStores_Ret", IAP_EVENT_07H_03H) \ -__PMC_EV_ALIAS("SSE_PrefNta_Miss", IAP_EVENT_4BH_00H) \ -__PMC_EV_ALIAS("SSE_PrefNta_Ret", IAP_EVENT_07H_00H) \ -__PMC_EV_ALIAS("SSE_PrefT1_Miss", IAP_EVENT_4BH_01H) \ -__PMC_EV_ALIAS("SSE_PrefT1_Ret", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("SSE_PrefT2_Miss", IAP_EVENT_4BH_02H) \ -__PMC_EV_ALIAS("SSE_PrefT2_Ret", IAP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("Seg_Reg_Loads", IAP_EVENT_06H_00H) \ -__PMC_EV_ALIAS("Serial_Execution_Cycles", IAP_EVENT_3CH_02H) \ -__PMC_EV_ALIAS("Thermal_Trip", IAP_EVENT_3BH_C0H) \ -__PMC_EV_ALIAS("Unfusion", IAP_EVENT_DBH_00H) \ -__PMC_EV_ALIAS("Unhalted_Core_Cycles", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("Uops_Ret", IAP_EVENT_C2H_00H) - -/* - * Aliases for Core2 PMC events. - */ -#define __PMC_EV_ALIAS_CORE2() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("BACLEARS", IAP_EVENT_E6H_00H) \ -__PMC_EV_ALIAS("BOGUS_BR", IAP_EVENT_E4H_00H) \ -__PMC_EV_ALIAS("BR_BAC_MISSP_EXEC", IAP_EVENT_8AH_00H) \ -__PMC_EV_ALIAS("BR_CALL_EXEC", IAP_EVENT_92H_00H) \ -__PMC_EV_ALIAS("BR_CALL_MISSP_EXEC", IAP_EVENT_93H_00H) \ -__PMC_EV_ALIAS("BR_CND_EXEC", IAP_EVENT_8BH_00H) \ -__PMC_EV_ALIAS("BR_CND_MISSP_EXEC", IAP_EVENT_8CH_00H) \ -__PMC_EV_ALIAS("BR_IND_CALL_EXEC", IAP_EVENT_94H_00H) \ -__PMC_EV_ALIAS("BR_IND_EXEC", IAP_EVENT_8DH_00H) \ -__PMC_EV_ALIAS("BR_IND_MISSP_EXEC", IAP_EVENT_8EH_00H) \ -__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_00H) \ -__PMC_EV_ALIAS("BR_INST_EXEC", IAP_EVENT_88H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ANY", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_NOT_TAKEN", \ - IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_TAKEN", \ - IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_NOT_TAKEN", \ - IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_TAKEN", \ - IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.TAKEN", IAP_EVENT_C4H_0CH) \ -__PMC_EV_ALIAS("BR_MISSP_EXEC", IAP_EVENT_89H_00H) \ -__PMC_EV_ALIAS("BR_RET_BAC_MISSP_EXEC", IAP_EVENT_91H_00H) \ -__PMC_EV_ALIAS("BR_RET_EXEC", IAP_EVENT_8FH_00H) \ -__PMC_EV_ALIAS("BR_RET_MISSP_EXEC", IAP_EVENT_90H_00H) \ -__PMC_EV_ALIAS("BR_TKN_BUBBLE_1", IAP_EVENT_97H_00H) \ -__PMC_EV_ALIAS("BR_TKN_BUBBLE_2", IAP_EVENT_98H_00H) \ -__PMC_EV_ALIAS("BUSQ_EMPTY", IAP_EVENT_7DH) \ -__PMC_EV_ALIAS("BUS_BNR_DRV", IAP_EVENT_61H) \ -__PMC_EV_ALIAS("BUS_DATA_RCV", IAP_EVENT_64H) \ -__PMC_EV_ALIAS("BUS_DRDY_CLOCKS", IAP_EVENT_62H) \ -__PMC_EV_ALIAS("BUS_HITM_DRV", IAP_EVENT_7BH) \ -__PMC_EV_ALIAS("BUS_HIT_DRV", IAP_EVENT_7AH) \ -__PMC_EV_ALIAS("BUS_IO_WAIT", IAP_EVENT_7FH) \ -__PMC_EV_ALIAS("BUS_LOCK_CLOCKS", IAP_EVENT_63H) \ -__PMC_EV_ALIAS("BUS_REQUEST_OUTSTANDING", \ - IAP_EVENT_60H) \ -__PMC_EV_ALIAS("BUS_TRANS_ANY", IAP_EVENT_70H) \ -__PMC_EV_ALIAS("BUS_TRANS_BRD", IAP_EVENT_65H) \ -__PMC_EV_ALIAS("BUS_TRANS_BURST", IAP_EVENT_6EH) \ -__PMC_EV_ALIAS("BUS_TRANS_DEF", IAP_EVENT_6DH) \ -__PMC_EV_ALIAS("BUS_TRANS_IFETCH", IAP_EVENT_68H) \ -__PMC_EV_ALIAS("BUS_TRANS_INVAL", IAP_EVENT_69H) \ -__PMC_EV_ALIAS("BUS_TRANS_IO", IAP_EVENT_6CH) \ -__PMC_EV_ALIAS("BUS_TRANS_MEM", IAP_EVENT_6FH) \ -__PMC_EV_ALIAS("BUS_TRANS_P", IAP_EVENT_6BH) \ -__PMC_EV_ALIAS("BUS_TRANS_PWR", IAP_EVENT_6AH) \ -__PMC_EV_ALIAS("BUS_TRANS_RFO", IAP_EVENT_66H) \ -__PMC_EV_ALIAS("BUS_TRANS_WB", IAP_EVENT_67H) \ -__PMC_EV_ALIAS("CMP_SNOOP", IAP_EVENT_78H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.BUS", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.CORE_P", \ - IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.NO_OTHER", \ - IAP_EVENT_3CH_02H) \ -__PMC_EV_ALIAS("CYCLES_DIV_BUSY", IAP_EVENT_14H_00H) \ -__PMC_EV_ALIAS("CYCLES_INT_MASKED", IAP_EVENT_C6H_01H) \ -__PMC_EV_ALIAS("CYCLES_INT_PENDING_AND_MASKED", \ - IAP_EVENT_C6H_02H) \ -__PMC_EV_ALIAS("CYCLES_L1I_MEM_STALLED", IAP_EVENT_86H_00H) \ -__PMC_EV_ALIAS("DELAYED_BYPASS.FP", IAP_EVENT_19H_00H) \ -__PMC_EV_ALIAS("DELAYED_BYPASS.LOAD", IAP_EVENT_19H_01H) \ -__PMC_EV_ALIAS("DELAYED_BYPASS.SIMD", IAP_EVENT_19H_02H) \ -__PMC_EV_ALIAS("DIV", IAP_EVENT_13H_00H) \ -__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("DTLB_MISSES.L0_MISS_LD", IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_MISSES.MISS_LD", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_MISSES.MISS_ST", IAP_EVENT_08H_08H) \ -__PMC_EV_ALIAS("EIST_TRANS", IAP_EVENT_3AH_00H) \ -__PMC_EV_ALIAS("ESP.ADDITIONS", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("ESP.SYNCH", IAP_EVENT_ABH_01H) \ -__PMC_EV_ALIAS("EXT_SNOOP", IAP_EVENT_77H) \ -__PMC_EV_ALIAS("FP_ASSIST", IAP_EVENT_11H_00H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE", IAP_EVENT_10H_00H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS_TO_FP", IAP_EVENT_CCH_02H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS_TO_MMX", IAP_EVENT_CCH_01H) \ -__PMC_EV_ALIAS("HW_INT_RCV", IAP_EVENT_C8H_00H) \ -__PMC_EV_ALIAS("IDLE_DURING_DIV", IAP_EVENT_18H_00H) \ -__PMC_EV_ALIAS("ILD_STALL", IAP_EVENT_87H_00H) \ -__PMC_EV_ALIAS("INST_QUEUE.FULL", IAP_EVENT_83H_02H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.LOADS", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.OTHER", IAP_EVENT_C0H_04H) \ -__PMC_EV_ALIAS("INST_RETIRED.STORES", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("INST_RETIRED.VM_H", IAP_EVENT_C0H_08H) \ -__PMC_EV_ALIAS("ITLB.FLUSH", IAP_EVENT_82H_40H) \ -__PMC_EV_ALIAS("ITLB.LARGE_MISS", IAP_EVENT_82H_10H) \ -__PMC_EV_ALIAS("ITLB.MISSES", IAP_EVENT_82H_12H) \ -__PMC_EV_ALIAS("ITLB.SMALL_MISS", IAP_EVENT_82H_02H) \ -__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C9H_00H) \ -__PMC_EV_ALIAS("L1D_ALL_CACHE_REF", IAP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("L1D_ALL_REF", IAP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD", IAP_EVENT_40H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK", IAP_EVENT_42H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK_DURATION", IAP_EVENT_42H_10H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST", IAP_EVENT_41H) \ -__PMC_EV_ALIAS("L1D_M_EVICT", IAP_EVENT_47H_00H) \ -__PMC_EV_ALIAS("L1D_M_REPL", IAP_EVENT_46H_00H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS", IAP_EVENT_48H_00H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_10H) \ -__PMC_EV_ALIAS("L1D_REPL", IAP_EVENT_45H_0FH) \ -__PMC_EV_ALIAS("L1D_SPLIT.LOADS", IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("L1D_SPLIT.STORES", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("L1I_MISSES", IAP_EVENT_81H_00H) \ -__PMC_EV_ALIAS("L1I_READS", IAP_EVENT_80H_00H) \ -__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \ -__PMC_EV_ALIAS("L2_DBUS_BUSY_RD", IAP_EVENT_23H) \ -__PMC_EV_ALIAS("L2_IFETCH", IAP_EVENT_28H) \ -__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \ -__PMC_EV_ALIAS("L2_LINES_IN", IAP_EVENT_24H) \ -__PMC_EV_ALIAS("L2_LINES_OUT", IAP_EVENT_26H) \ -__PMC_EV_ALIAS("L2_LOCK", IAP_EVENT_2BH) \ -__PMC_EV_ALIAS("L2_M_LINES_IN", IAP_EVENT_25H) \ -__PMC_EV_ALIAS("L2_M_LINES_OUT", IAP_EVENT_27H) \ -__PMC_EV_ALIAS("L2_NO_REQ", IAP_EVENT_32H) \ -__PMC_EV_ALIAS("L2_REJECT_BUSQ", IAP_EVENT_30H) \ -__PMC_EV_ALIAS("L2_RQSTS", IAP_EVENT_2EH) \ -__PMC_EV_ALIAS("L2_RQSTS.SELF.DEMAND.I_STATE", \ - IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("L2_RQSTS.SELF.DEMAND.MESI", \ - IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \ -__PMC_EV_ALIAS("LOAD_BLOCK.L1D", IAP_EVENT_03H_20H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.OVERLAP_STORE", \ - IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.STA", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.STD", IAP_EVENT_03H_04H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.UNTIL_RETIRE", IAP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_00H) \ -__PMC_EV_ALIAS("MACHINE_NUKES.MEM_ORDER", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_NUKES.SMC", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACRO_INSTS.CISC_DECODED", IAP_EVENT_AAH_08H) \ -__PMC_EV_ALIAS("MACRO_INSTS.DECODED", IAP_EVENT_AAH_01H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGUATION.RESET", \ - IAP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGUATION.SUCCESS", \ - IAP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", \ - IAP_EVENT_CBH_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_LINE_MISS", \ - IAP_EVENT_CBH_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_MISS", \ - IAP_EVENT_CBH_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_LINE_MISS", \ - IAP_EVENT_CBH_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_MISS", \ - IAP_EVENT_CBH_04H) \ -__PMC_EV_ALIAS("MUL", IAP_EVENT_12H_00H) \ -__PMC_EV_ALIAS("PAGE_WALKS.COUNT", IAP_EVENT_0CH_01H) \ -__PMC_EV_ALIAS("PAGE_WALKS.CYCLES", IAP_EVENT_0CH_02H) \ -__PMC_EV_ALIAS("PREF_RQSTS_DN", IAP_EVENT_F8H_00H) \ -__PMC_EV_ALIAS("PREF_RQSTS_UP", IAP_EVENT_F0H_00H) \ -__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("RAT_STALLS.FPSW", IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("RAT_STALLS.OTHER_SERIALIZATION_STALLS", \ - IAP_EVENT_D2H_10H) \ -__PMC_EV_ALIAS("RAT_STALLS.PARTIAL_CYCLES", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_DCH_1FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.BR_MISS_CLEAR", \ - IAP_EVENT_DCH_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_DCH_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LD_ST", IAP_EVENT_DCH_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", \ - IAP_EVENT_DCH_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_DCH_02H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED", IAP_EVENT_A0H_00H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT2", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT3", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT4", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("RS_UOPS_DISPATCHED.PORT5", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("SB_DRAIN_CYCLES", IAP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("SEGMENT_REG_LOADS", IAP_EVENT_06H_00H) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.ANY", IAP_EVENT_D5H_0FH) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.DS", IAP_EVENT_D5H_02H) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.ES", IAP_EVENT_D5H_01H) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.FS", IAP_EVENT_D5H_04H) \ -__PMC_EV_ALIAS("SEG_REG_RENAMES.GS", IAP_EVENT_D5H_08H) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.ANY", IAP_EVENT_D4H_0FH) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.DS", IAP_EVENT_D4H_02H) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.ES", IAP_EVENT_D4H_01H) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.FS", IAP_EVENT_D4H_04H) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS.GS", IAP_EVENT_D4H_08H) \ -__PMC_EV_ALIAS("SIMD_ASSIST", IAP_EVENT_CDH_00H) \ -__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.PACKED_DOUBLE", \ - IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.PACKED_SINGLE", \ - IAP_EVENT_CAH_01H) \ -__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.SCALAR_DOUBLE", \ - IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("SIMD_COMP_INST_RETIRED.SCALAR_SINGLE", \ - IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("SIMD_INSTR_RETIRED", IAP_EVENT_CEH_00H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.ANY", IAP_EVENT_C7H_1FH) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.PACKED_DOUBLE", \ - IAP_EVENT_C7H_04H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.PACKED_SINGLE", \ - IAP_EVENT_C7H_01H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.SCALAR_DOUBLE", \ - IAP_EVENT_C7H_08H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.SCALAR_SINGLE", \ - IAP_EVENT_C7H_02H) \ -__PMC_EV_ALIAS("SIMD_INST_RETIRED.VECTOR", IAP_EVENT_C7H_10H) \ -__PMC_EV_ALIAS("SIMD_SAT_INSTR_RETIRED", IAP_EVENT_CFH_00H) \ -__PMC_EV_ALIAS("SIMD_SAT_UOP_EXEC", IAP_EVENT_B1H_00H) \ -__PMC_EV_ALIAS("SIMD_UOPS_EXEC", IAP_EVENT_B0H_00H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.ARITHMETIC", IAP_EVENT_B3H_20H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.LOGICAL", IAP_EVENT_B3H_10H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.MUL", IAP_EVENT_B3H_01H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.PACK", IAP_EVENT_B3H_04H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.SHIFT", IAP_EVENT_B3H_02H) \ -__PMC_EV_ALIAS("SIMD_UOP_TYPE_EXEC.UNPACK", IAP_EVENT_B3H_08H) \ -__PMC_EV_ALIAS("SNOOP_STALL_DRV", IAP_EVENT_7EH) \ -__PMC_EV_ALIAS("SSE_PRE_EXEC.L1", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("SSE_PRE_EXEC.L2", IAP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("SSE_PRE_EXEC.NTA", IAP_EVENT_07H_00H) \ -__PMC_EV_ALIAS("SSE_PRE_EXEC.STORES", IAP_EVENT_07H_03H) \ -__PMC_EV_ALIAS("SSE_PRE_MISS.L1", IAP_EVENT_4BH_01H) \ -__PMC_EV_ALIAS("SSE_PRE_MISS.L2", IAP_EVENT_4BH_02H) \ -__PMC_EV_ALIAS("SSE_PRE_MISS.NTA", IAP_EVENT_4BH_00H) \ -__PMC_EV_ALIAS("STORE_BLOCK.ORDER", IAP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("STORE_BLOCK.SNOOP", IAP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("THERMAL_TRIP", IAP_EVENT_3BH_C0H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_0FH) \ -__PMC_EV_ALIAS("UOPS_RETIRED.FUSED", IAP_EVENT_C2H_07H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.LD_IND_BR", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSION", IAP_EVENT_C2H_04H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.NON_FUSED", IAP_EVENT_C2H_08H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.STD_STA", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("X87_OPS_RETIRED.ANY", IAP_EVENT_C1H_FEH) \ -__PMC_EV_ALIAS("X87_OPS_RETIRED.FXCH", IAP_EVENT_C1H_01H) - -/* - * Core i7 and Xeon 5500 events removed between 253669-031US June 2009 - * and 253669-040US October 2011. - */ -#define __PMC_EV_ALIAS_COREI7_OLD() \ -__PMC_EV_ALIAS("SB_FORWARD.ANY", IAP_EVENT_02H_01H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.STD", IAP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.ADDRESS_OFFSET", IAP_EVENT_03H_04H) \ -__PMC_EV_ALIAS("SB_DRAIN.CYCLES", IAP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOAD", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORE", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.ANY", IAP_EVENT_05H_03H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.NOT_STA", IAP_EVENT_06H_01H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.STA", IAP_EVENT_06H_02H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.ANY", IAP_EVENT_06H_0FH) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDP_MISS", IAP_EVENT_08H_40H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.RESET", IAP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.SUCCESS", IAP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.WATCHDOG", IAP_EVENT_09H_04H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.WATCH_CYCLES", IAP_EVENT_09H_08H)\ -__PMC_EV_ALIAS("HW_INT.RCV", IAP_EVENT_1DH_01H) \ -__PMC_EV_ALIAS("HW_INT.CYCLES_MASKED", IAP_EVENT_1DH_02H) \ -__PMC_EV_ALIAS("HW_INT.CYCLES_PENDING_AND_MASKED", IAP_EVENT_1DH_04H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.E_STATE", IAP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("UOPS_DECODED.DEC0", IAP_EVENT_3DH_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.I_STATE", IAP_EVENT_41H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.MESI", IAP_EVENT_41H_0FH) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.LOAD_BUFFERS_FULL", IAP_EVENT_48H_02H) \ -__PMC_EV_ALIAS("DTLB_MISSES.PDP_MISS", IAP_EVENT_49H_40H) \ -__PMC_EV_ALIAS("SSE_MEM_EXEC.NTA", IAP_EVENT_4BH_01H) \ -__PMC_EV_ALIAS("SSE_MEM_EXEC.STREAMING_STORES", IAP_EVENT_4BH_08H) \ -__PMC_EV_ALIAS("SFENCE_CYCLES", IAP_EVENT_4DH_01H) \ -__PMC_EV_ALIAS("EPT.EPDE_MISS", IAP_EVENT_4FH_02H) \ -__PMC_EV_ALIAS("EPT.EPDPE_HIT", IAP_EVENT_4FH_04H) \ -__PMC_EV_ALIAS("EPT.EPDPE_MISS", IAP_EVENT_4FH_08H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ANY.READ", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("IFU_IVC.FULL", IAP_EVENT_81H_01H) \ -__PMC_EV_ALIAS("IFU_IVC.L1I_EVICTION", IAP_EVENT_81H_02H) \ -__PMC_EV_ALIAS("L1I_OPPORTUNISTIC_HITS", IAP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_CYCLES", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.PMH_BUSY_CYCLES", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ITLB_MISSES.PDE_MISS", IAP_EVENT_85H_20H) \ -__PMC_EV_ALIAS("ITLB_MISSES.PDP_MISS", IAP_EVENT_85H_40H) \ -__PMC_EV_ALIAS("ITLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_85H_80H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_DATA", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_CODE", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.READ", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.RFO", IAP_EVENT_B0H_10H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.UNCACHED_MEM", IAP_EVENT_B0H_20H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY", IAP_EVENT_B0H_80H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.DATA", IAP_EVENT_B3H_01H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE", \ - IAP_EVENT_B3H_02H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.CODE", IAP_EVENT_B3H_04H) \ -__PMC_EV_ALIAS("PIC_ACCESSES.TPR_READS", IAP_EVENT_BAH_01H) \ -__PMC_EV_ALIAS("PIC_ACCESSES.TPR_WRITES", IAP_EVENT_BAH_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.FUSION_ASSIST", IAP_EVENT_C3H_10H) \ -__PMC_EV_ALIAS("BOGUS_BR", IAP_EVENT_E4H_01H) \ -__PMC_EV_ALIAS("BPU_CLEARS.ANY", IAP_EVENT_E8H_03H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.HIT", IAP_EVENT_F3H_01H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.ALLOC", IAP_EVENT_F3H_02H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.DATA_TRIGGER", IAP_EVENT_F3H_04H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.CODE_TRIGGER", IAP_EVENT_F3H_08H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.DCA_TRIGGER", IAP_EVENT_F3H_10H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.KICK_START", IAP_EVENT_F3H_20H) \ -__PMC_EV_ALIAS("SQ_MISC.PROMOTION", IAP_EVENT_F4H_01H) \ -__PMC_EV_ALIAS("SQ_MISC.PROMOTION_POST_GO", IAP_EVENT_F4H_02H) \ -__PMC_EV_ALIAS("SQ_MISC.LRU_HINTS", IAP_EVENT_F4H_04H) \ -__PMC_EV_ALIAS("SQ_MISC.FILL_DROPPED", IAP_EVENT_F4H_08H) \ -__PMC_EV_ALIAS("SEGMENT_REG_LOADS", IAP_EVENT_F8H_01H) - -/* - * Aliases for Core i7 and Xeon 5500 PMC events (253669-033US December 2009) - */ -#define __PMC_EV_ALIAS_COREI7() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("SB_DRAIN.ANY", IAP_EVENT_04H_07H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.AT_RET", IAP_EVENT_06H_04H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.L1D_BLOCK", IAP_EVENT_06H_08H) \ -__PMC_EV_ALIAS("PARTIAL_ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.ANY", IAP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_MISS", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED", \ - IAP_EVENT_08H_80H) \ -__PMC_EV_ALIAS("MEM_INST_RETIRED.LOADS", IAP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("MEM_INST_RETIRED.STORES", IAP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD", \ - IAP_EVENT_0BH_10H) \ -__PMC_EV_ALIAS("MEM_STORE_RETIRED.DTLB_MISS", IAP_EVENT_0CH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.STALLED_CYCLES", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FUSED", IAP_EVENT_0EH_02H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.L3_DATA_MISS_UNKNOWN", \ - IAP_EVENT_0FH_01H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.OTHER_CORE_L2_HITM", \ - IAP_EVENT_0FH_02H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.REMOTE_CACHE_LOCAL_HOME_HIT", \ - IAP_EVENT_0FH_08H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.REMOTE_DRAM", \ - IAP_EVENT_0FH_10H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_DRAM", IAP_EVENT_0FH_20H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.UNCACHEABLE", IAP_EVENT_0FH_80H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.MMX", IAP_EVENT_10H_02H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP", IAP_EVENT_10H_04H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE2_INTEGER", IAP_EVENT_10H_08H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED", IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR", IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION", \ - IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION", \ - IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_MPY", IAP_EVENT_12H_01H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_SHIFT", IAP_EVENT_12H_02H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACK", IAP_EVENT_12H_04H) \ -__PMC_EV_ALIAS("SIMD_INT_128.UNPACK", IAP_EVENT_12H_08H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_LOGICAL", IAP_EVENT_12H_10H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_ARITH", IAP_EVENT_12H_20H) \ -__PMC_EV_ALIAS("SIMD_INT_128.SHUFFLE_MOVE", IAP_EVENT_12H_40H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.RS", IAP_EVENT_13H_01H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.RS_DELAYED", IAP_EVENT_13H_02H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.MOB", IAP_EVENT_13H_04H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.ANY", IAP_EVENT_13H_07H) \ -__PMC_EV_ALIAS("ARITH.CYCLES_DIV_BUSY", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("ARITH.MUL", IAP_EVENT_14H_02H) \ -__PMC_EV_ALIAS("INST_QUEUE_WRITES", IAP_EVENT_17H_01H) \ -__PMC_EV_ALIAS("INST_DECODED.DEC0", IAP_EVENT_18H_01H) \ -__PMC_EV_ALIAS("TWO_UOP_INSTS_DECODED", IAP_EVENT_19H_01H) \ -__PMC_EV_ALIAS("INST_QUEUE_WRITE_CYCLES", IAP_EVENT_1EH_01H) \ -__PMC_EV_ALIAS("LSD_OVERFLOW", IAP_EVENT_20H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.LD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.LD_MISS", IAP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("L2_RQSTS.LOADS", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFOS", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCH_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCH_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCHES", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCHES", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_AAH) \ -__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.I_STATE", IAP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.S_STATE", IAP_EVENT_26H_02H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.E_STATE", IAP_EVENT_26H_04H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.M_STATE", IAP_EVENT_26H_08H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.MESI", IAP_EVENT_26H_0FH) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.I_STATE", IAP_EVENT_26H_10H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.S_STATE", IAP_EVENT_26H_20H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.E_STATE", IAP_EVENT_26H_40H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.M_STATE", IAP_EVENT_26H_80H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.MESI", IAP_EVENT_26H_F0H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.ANY", IAP_EVENT_26H_FFH) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.I_STATE", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.S_STATE", IAP_EVENT_27H_02H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.M_STATE", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.HIT", IAP_EVENT_27H_0EH) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.MESI", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.I_STATE", IAP_EVENT_27H_10H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.S_STATE", IAP_EVENT_27H_20H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.E_STATE", IAP_EVENT_27H_40H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.M_STATE", IAP_EVENT_27H_80H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.HIT", IAP_EVENT_27H_E0H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.MESI", IAP_EVENT_27H_F0H) \ -__PMC_EV_ALIAS("L1D_WB_L2.I_STATE", IAP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("L1D_WB_L2.S_STATE", IAP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("L1D_WB_L2.E_STATE", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L1D_WB_L2.M_STATE", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("L1D_WB_L2.MESI", IAP_EVENT_28H_0FH) \ -__PMC_EV_ALIAS("L3_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("L3_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.REF_P", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.I_STATE", IAP_EVENT_40H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.S_STATE", IAP_EVENT_40H_02H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.E_STATE", IAP_EVENT_40H_04H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.M_STATE", IAP_EVENT_40H_08H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.MESI", IAP_EVENT_40H_0FH) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.S_STATE", IAP_EVENT_41H_02H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.E_STATE", IAP_EVENT_41H_04H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.M_STATE", IAP_EVENT_41H_08H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK.HIT", IAP_EVENT_42H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK.S_STATE", IAP_EVENT_42H_02H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK.E_STATE", IAP_EVENT_42H_04H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK.M_STATE", IAP_EVENT_42H_08H) \ -__PMC_EV_ALIAS("L1D_ALL_REF.ANY", IAP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("L1D_ALL_REF.CACHEABLE", IAP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_MISSES.PDE_MISS", IAP_EVENT_49H_20H) \ -__PMC_EV_ALIAS("DTLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_49H_80H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_01H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.MISS", IAP_EVENT_4EH_02H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.TRIGGERS", IAP_EVENT_4EH_04H) \ -__PMC_EV_ALIAS("L1D.REPL", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("L1D.M_REPL", IAP_EVENT_51H_02H) \ -__PMC_EV_ALIAS("L1D.M_EVICT", IAP_EVENT_51H_04H) \ -__PMC_EV_ALIAS("L1D.M_SNOOP_EVICT", IAP_EVENT_51H_08H) \ -__PMC_EV_ALIAS("L1D_CACHE_PREFETCH_LOCK_FB_HIT", IAP_EVENT_52H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK_FB_HIT", IAP_EVENT_53H_01H) \ -__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D_L2", IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IO_TRANSACTIONS", IAP_EVENT_6CH_01H) \ -__PMC_EV_ALIAS("L1I.HITS", IAP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("L1I.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("L1I.READS", IAP_EVENT_80H_03H) \ -__PMC_EV_ALIAS("L1I.CYCLES_STALLED", IAP_EVENT_80H_04H) \ -__PMC_EV_ALIAS("LARGE_ITLB.HIT", IAP_EVENT_82H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.ANY", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.MRU", IAP_EVENT_87H_02H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("ILD_STALL.REGEN", IAP_EVENT_87H_08H) \ -__PMC_EV_ALIAS("ILD_STALL.ANY", IAP_EVENT_87H_0FH) \ -__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT", IAP_EVENT_88H_02H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NON_CALL", IAP_EVENT_88H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NON_CALLS", IAP_EVENT_88H_07H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NEAR_CALLS", IAP_EVENT_88H_30H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_40H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ANY", IAP_EVENT_88H_7FH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT", IAP_EVENT_89H_02H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NON_CALL", IAP_EVENT_89H_04H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NON_CALLS", IAP_EVENT_89H_07H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NEAR_CALLS", IAP_EVENT_89H_30H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_40H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ANY", IAP_EVENT_89H_7FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LOAD", IAP_EVENT_A2H_02H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.STORE", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_A2H_20H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ -__PMC_EV_ALIAS("MACRO_INSTS.FUSIONS_DECODED", IAP_EVENT_A6H_01H) \ -__PMC_EV_ALIAS("BACLEAR_FORCE_IQ", IAP_EVENT_A7H_01H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.L1D_WRITEBACK", IAP_EVENT_B0H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT0", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT1", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT2_CORE", IAP_EVENT_B1H_04H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT3_CORE", IAP_EVENT_B1H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT4_CORE", IAP_EVENT_B1H_10H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5", \ - IAP_EVENT_B1H_1FH) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT5", IAP_EVENT_B1H_20H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE_ACTIVE_CYCLES", IAP_EVENT_B1H_3FH) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT015", IAP_EVENT_B1H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT234", IAP_EVENT_B1H_80H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HIT", IAP_EVENT_B8H_01H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HITE", IAP_EVENT_B8H_02H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HITM", IAP_EVENT_B8H_04H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("INST_RETIRED.MMX", IAP_EVENT_C0H_04H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSED", IAP_EVENT_C2H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEM_ORDER", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_SINGLE", IAP_EVENT_C7H_01H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_DOUBLE", IAP_EVENT_C7H_04H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_08H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.VECTOR_INTEGER", IAP_EVENT_C7H_10H) \ -__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C8H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_HIT", IAP_EVENT_CBH_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_HIT", IAP_EVENT_CBH_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L3_UNSHARED_HIT", IAP_EVENT_CBH_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM", \ - IAP_EVENT_CBH_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L3_MISS", IAP_EVENT_CBH_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.HIT_LFB", IAP_EVENT_CBH_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", IAP_EVENT_CBH_80H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.TO_FP", IAP_EVENT_CCH_01H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.TO_MMX", IAP_EVENT_CCH_02H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.ANY", IAP_EVENT_CCH_03H) \ -__PMC_EV_ALIAS("MACRO_INSTS.DECODED", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("UOPS_DECODED.MS", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("UOPS_DECODED.ESP_FOLDING", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("UOPS_DECODED.ESP_SYNC", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("RAT_STALLS.REGISTERS", IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("RAT_STALLS.SCOREBOARD", IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS", IAP_EVENT_D4H_01H) \ -__PMC_EV_ALIAS("ES_REG_RENAMES", IAP_EVENT_D5H_01H) \ -__PMC_EV_ALIAS("UOP_UNFUSION", IAP_EVENT_DBH_01H) \ -__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_01H) \ -__PMC_EV_ALIAS("BPU_MISSED_CALL_RET", IAP_EVENT_E5H_01H) \ -__PMC_EV_ALIAS("BACLEAR.CLEAR", IAP_EVENT_E6H_01H) \ -__PMC_EV_ALIAS("BACLEAR.BAD_TARGET", IAP_EVENT_E6H_02H) \ -__PMC_EV_ALIAS("BPU_CLEARS.EARLY", IAP_EVENT_E8H_01H) \ -__PMC_EV_ALIAS("BPU_CLEARS.LATE", IAP_EVENT_E8H_02H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.LOAD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.IFETCH", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.PREFETCH", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.ANY", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S_STATE", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E_STATE", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ANY", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_DIRTY", IAP_EVENT_F2H_08H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.ANY", IAP_EVENT_F2H_0FH) \ -__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) \ -__PMC_EV_ALIAS("SQ_FULL_STALL_CYCLES", IAP_EVENT_F6H_01H) \ -__PMC_EV_ALIAS("FP_ASSIST.ALL", IAP_EVENT_F7H_01H) \ -__PMC_EV_ALIAS("FP_ASSIST.OUTPUT", IAP_EVENT_F7H_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.INPUT", IAP_EVENT_F7H_04H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_MPY", IAP_EVENT_FDH_01H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_SHIFT", IAP_EVENT_FDH_02H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACK", IAP_EVENT_FDH_04H) \ -__PMC_EV_ALIAS("SIMD_INT_64.UNPACK", IAP_EVENT_FDH_08H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_LOGICAL", IAP_EVENT_FDH_10H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_ARITH", IAP_EVENT_FDH_20H) \ -__PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) \ -__PMC_EV_ALIAS_COREI7_OLD() - -/* - * Aliases for Westmere PMC events (253669-033US December 2009) - */ -#define __PMC_EV_ALIAS_WESTMERE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LOAD_BLOCK.OVERLAP_STORE", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("SB_DRAIN.ANY", IAP_EVENT_04H_07H) \ -__PMC_EV_ALIAS("MISALIGN_MEMORY.STORE", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.AT_RET", IAP_EVENT_06H_04H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.L1D_BLOCK", IAP_EVENT_06H_08H) \ -__PMC_EV_ALIAS("PARTIAL_ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.ANY", IAP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_CYCLES", IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_MISS", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("MEM_INST_RETIRED.LOADS", IAP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("MEM_INST_RETIRED.STORES", IAP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD", \ - IAP_EVENT_0BH_10H) \ -__PMC_EV_ALIAS("MEM_STORE_RETIRED.DTLB_MISS", IAP_EVENT_0CH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.STALLED_CYCLES", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FUSED", IAP_EVENT_0EH_02H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_HITM", IAP_EVENT_0FH_02H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_DRAM_AND_REMOTE_CACHE_HIT", \ - IAP_EVENT_0FH_08H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_DRAM", IAP_EVENT_0FH_10H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.REMOTE_DRAM", IAP_EVENT_0FH_20H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.UNCACHEABLE", IAP_EVENT_0FH_80H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.MMX", IAP_EVENT_10H_02H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP", IAP_EVENT_10H_04H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE2_INTEGER", IAP_EVENT_10H_08H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED", IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR", IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION", \ - IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION", \ - IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_MPY", IAP_EVENT_12H_01H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_SHIFT", IAP_EVENT_12H_02H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACK", IAP_EVENT_12H_04H) \ -__PMC_EV_ALIAS("SIMD_INT_128.UNPACK", IAP_EVENT_12H_08H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_LOGICAL", IAP_EVENT_12H_10H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_ARITH", IAP_EVENT_12H_20H) \ -__PMC_EV_ALIAS("SIMD_INT_128.SHUFFLE_MOVE", IAP_EVENT_12H_40H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.RS", IAP_EVENT_13H_01H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.RS_DELAYED", IAP_EVENT_13H_02H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.MOB", IAP_EVENT_13H_04H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.ANY", IAP_EVENT_13H_07H) \ -__PMC_EV_ALIAS("ARITH.CYCLES_DIV_BUSY", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("ARITH.MUL", IAP_EVENT_14H_02H) \ -__PMC_EV_ALIAS("INST_QUEUE_WRITES", IAP_EVENT_17H_01H) \ -__PMC_EV_ALIAS("INST_DECODED.DEC0", IAP_EVENT_18H_01H) \ -__PMC_EV_ALIAS("TWO_UOP_INSTS_DECODED", IAP_EVENT_19H_01H) \ -__PMC_EV_ALIAS("INST_QUEUE_WRITE_CYCLES", IAP_EVENT_1EH_01H) \ -__PMC_EV_ALIAS("LSD_OVERFLOW", IAP_EVENT_20H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.LD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.LD_MISS", IAP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("L2_RQSTS.LOADS", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFOS", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCH_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCH_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCHES", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCHES", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_AAH) \ -__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.I_STATE", IAP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.S_STATE", IAP_EVENT_26H_02H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.E_STATE", IAP_EVENT_26H_04H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.M_STATE", IAP_EVENT_26H_08H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.MESI", IAP_EVENT_26H_0FH) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.I_STATE", IAP_EVENT_26H_10H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.S_STATE", IAP_EVENT_26H_20H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.E_STATE", IAP_EVENT_26H_40H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.M_STATE", IAP_EVENT_26H_80H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.MESI", IAP_EVENT_26H_F0H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.ANY", IAP_EVENT_26H_FFH) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.I_STATE", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.S_STATE", IAP_EVENT_27H_02H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.M_STATE", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.HIT", IAP_EVENT_27H_0EH) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.MESI", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.I_STATE", IAP_EVENT_27H_10H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.S_STATE", IAP_EVENT_27H_20H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.E_STATE", IAP_EVENT_27H_40H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.M_STATE", IAP_EVENT_27H_80H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.HIT", IAP_EVENT_27H_E0H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.MESI", IAP_EVENT_27H_F0H) \ -__PMC_EV_ALIAS("L1D_WB_L2.I_STATE", IAP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("L1D_WB_L2.S_STATE", IAP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("L1D_WB_L2.E_STATE", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L1D_WB_L2.M_STATE", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("L1D_WB_L2.MESI", IAP_EVENT_28H_0FH) \ -__PMC_EV_ALIAS("L3_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_02H) \ -__PMC_EV_ALIAS("L3_LAT_CACHE.MISS", IAP_EVENT_2EH_01H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.REF_P", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_MISSES.WALK_CYCLES", IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_49H_80H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_01H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.MISS", IAP_EVENT_4EH_02H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.TRIGGERS", IAP_EVENT_4EH_04H) \ -__PMC_EV_ALIAS("EPT.WALK_CYCLES", IAP_EVENT_4FH_10H) \ -__PMC_EV_ALIAS("L1D.REPL", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("L1D.M_REPL", IAP_EVENT_51H_02H) \ -__PMC_EV_ALIAS("L1D.M_EVICT", IAP_EVENT_51H_04H) \ -__PMC_EV_ALIAS("L1D.M_SNOOP_EVICT", IAP_EVENT_51H_08H) \ -__PMC_EV_ALIAS("L1D_CACHE_PREFETCH_LOCK_FB_HIT", IAP_EVENT_52H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK_FB_HIT", IAP_EVENT_53H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ANY.READ", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D_L2", IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IO_TRANSACTIONS", IAP_EVENT_6CH_01H) \ -__PMC_EV_ALIAS("L1I.HITS", IAP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("L1I.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("L1I.READS", IAP_EVENT_80H_03H) \ -__PMC_EV_ALIAS("L1I.CYCLES_STALLED", IAP_EVENT_80H_04H) \ -__PMC_EV_ALIAS("LARGE_ITLB.HIT", IAP_EVENT_82H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.ANY", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_CYCLES", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_85H_80H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.MRU", IAP_EVENT_87H_02H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("ILD_STALL.REGEN", IAP_EVENT_87H_08H) \ -__PMC_EV_ALIAS("ILD_STALL.ANY", IAP_EVENT_87H_0FH) \ -__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT", IAP_EVENT_88H_02H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NON_CALL", IAP_EVENT_88H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NON_CALLS", IAP_EVENT_88H_07H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NEAR_CALLS", IAP_EVENT_88H_30H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_40H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ANY", IAP_EVENT_88H_7FH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT", IAP_EVENT_89H_02H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NON_CALL", IAP_EVENT_89H_04H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NON_CALLS", IAP_EVENT_89H_07H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NEAR_CALLS", IAP_EVENT_89H_30H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_40H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ANY", IAP_EVENT_89H_7FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LOAD", IAP_EVENT_A2H_02H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.STORE", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_A2H_20H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ -__PMC_EV_ALIAS("MACRO_INSTS.FUSIONS_DECODED", IAP_EVENT_A6H_01H) \ -__PMC_EV_ALIAS("BACLEAR_FORCE_IQ", IAP_EVENT_A7H_01H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_DATA", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_CODE", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.READ", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.RFO", IAP_EVENT_B0H_10H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.L1D_WRITEBACK", IAP_EVENT_B0H_40H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY", IAP_EVENT_B0H_80H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT0", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT1", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT2_CORE", IAP_EVENT_B1H_04H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT3_CORE", IAP_EVENT_B1H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT4_CORE", IAP_EVENT_B1H_10H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5", \ - IAP_EVENT_B1H_1FH) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT5", IAP_EVENT_B1H_20H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE_ACTIVE_CYCLES", IAP_EVENT_B1H_3FH) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT015", IAP_EVENT_B1H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT234", IAP_EVENT_B1H_80H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.DATA", IAP_EVENT_B3H_01H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE", \ - IAP_EVENT_B3H_02H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.CODE", IAP_EVENT_B3H_04H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS.CODE", IAP_EVENT_B4H_01H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS.DATA", IAP_EVENT_B4H_02H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS.INVALIDATE", IAP_EVENT_B4H_04H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HIT", IAP_EVENT_B8H_01H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HITE", IAP_EVENT_B8H_02H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HITM", IAP_EVENT_B8H_04H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("INST_RETIRED.MMX", IAP_EVENT_C0H_04H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSED", IAP_EVENT_C2H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEM_ORDER", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ANY_P", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ANY_P", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_SINGLE", IAP_EVENT_C7H_01H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_DOUBLE", IAP_EVENT_C7H_04H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_08H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.VECTOR_INTEGER", IAP_EVENT_C7H_10H) \ -__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C8H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_HIT", IAP_EVENT_CBH_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_HIT", IAP_EVENT_CBH_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L3_UNSHARED_HIT", IAP_EVENT_CBH_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM", \ - IAP_EVENT_CBH_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L3_MISS", IAP_EVENT_CBH_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.HIT_LFB", IAP_EVENT_CBH_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", IAP_EVENT_CBH_80H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.TO_FP", IAP_EVENT_CCH_01H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.TO_MMX", IAP_EVENT_CCH_02H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.ANY", IAP_EVENT_CCH_03H) \ -__PMC_EV_ALIAS("MACRO_INSTS.DECODED", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("UOPS_DECODED.STALL_CYCLES", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("UOPS_DECODED.MS", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("UOPS_DECODED.ESP_FOLDING", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("UOPS_DECODED.ESP_SYNC", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("RAT_STALLS.REGISTERS", IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("RAT_STALLS.SCOREBOARD", IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS", IAP_EVENT_D4H_01H) \ -__PMC_EV_ALIAS("ES_REG_RENAMES", IAP_EVENT_D5H_01H) \ -__PMC_EV_ALIAS("UOP_UNFUSION", IAP_EVENT_DBH_01H) \ -__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_01H) \ -__PMC_EV_ALIAS("BPU_MISSED_CALL_RET", IAP_EVENT_E5H_01H) \ -__PMC_EV_ALIAS("BACLEAR.CLEAR", IAP_EVENT_E6H_01H) \ -__PMC_EV_ALIAS("BACLEAR.BAD_TARGET", IAP_EVENT_E6H_02H) \ -__PMC_EV_ALIAS("BPU_CLEARS.EARLY", IAP_EVENT_E8H_01H) \ -__PMC_EV_ALIAS("BPU_CLEARS.LATE", IAP_EVENT_E8H_02H) \ -__PMC_EV_ALIAS("THREAD_ACTIVE", IAP_EVENT_ECH_01H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.LOAD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.IFETCH", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.PREFETCH", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.ANY", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S_STATE", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E_STATE", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ANY", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_DIRTY", IAP_EVENT_F2H_08H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.ANY", IAP_EVENT_F2H_0FH) \ -__PMC_EV_ALIAS("SQ_MISC.LRU_HINTS", IAP_EVENT_F4H_04H) \ -__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) \ -__PMC_EV_ALIAS("SQ_FULL_STALL_CYCLES", IAP_EVENT_F6H_01H) \ -__PMC_EV_ALIAS("FP_ASSIST.ALL", IAP_EVENT_F7H_01H) \ -__PMC_EV_ALIAS("FP_ASSIST.OUTPUT", IAP_EVENT_F7H_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.INPUT", IAP_EVENT_F7H_04H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_MPY", IAP_EVENT_FDH_01H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_SHIFT", IAP_EVENT_FDH_02H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACK", IAP_EVENT_FDH_04H) \ -__PMC_EV_ALIAS("SIMD_INT_64.UNPACK", IAP_EVENT_FDH_08H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_LOGICAL", IAP_EVENT_FDH_10H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_ARITH", IAP_EVENT_FDH_20H) \ -__PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) - -/* - * Aliases for Haswell core PMC events - */ -#define __PMC_EV_ALIAS_HASWELL_XEON() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M", \ - IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_0EH) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_4K", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_2M", IAP_EVENT_08H_40H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_60H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_CACHE_MISS", IAP_EVENT_08H_80H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_MISS", IAP_EVENT_24H_21H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_41H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_42H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_22H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_44H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_24H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_MISS", IAP_EVENT_24H_27H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_REFERENCES", IAP_EVENT_24H_E7H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ -__PMC_EV_ALIAS("L2_RQSTS.L2_PF_HIT", IAP_EVENT_24H_50H) \ -__PMC_EV_ALIAS("L2_RQSTS.L2_PF_MISS", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ -__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_3FH) \ -__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ -__PMC_EV_ALIAS("L2_DEMAND_RQSTS.WB_HIT", IAP_EVENT_27H_50H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_4K", \ - IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", \ - IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_0EH) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_4K", IAP_EVENT_49H_20H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_2M", IAP_EVENT_49H_40H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_60H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.PDE_CACHE_MISS", IAP_EVENT_49H_80H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ - IAP_EVENT_58H_04H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_NOT_ELIMINATED", \ - IAP_EVENT_58H_08H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_ELIMINATED", IAP_EVENT_58H_02H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ - IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_4K", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("TLB_MISSES.WALK_COMPLETED_2M_4M", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_0EH) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_4K", IAP_EVENT_85H_20H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_2M", IAP_EVENT_85H_40H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_60H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_88H_84H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_89H_84H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_2", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_3", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_4", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_5", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_6", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_7", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_LDM_PENDING", IAP_EVENT_A3H_02H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L2_PENDING", IAP_EVENT_A3H_05H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_08H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L1D_PENDING", IAP_EVENT_A3H_0CH) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L1", IAP_EVENT_BCH_11H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L1", IAP_EVENT_BCH_21H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L2", IAP_EVENT_BCH_12H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L2", IAP_EVENT_BCH_22H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L3", IAP_EVENT_BCH_14H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L3", IAP_EVENT_BCH_24H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_MEMORY", IAP_EVENT_BCH_18H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_MEMORY", IAP_EVENT_BCH_28H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ANY_WB_ASSIST", IAP_EVENT_C1H_40H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_U_RETIRED.CONDITIONAL", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_MISS", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.ALL", \ - IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_01H) \ -__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_1FH) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_05H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_06H) - - -#define __PMC_EV_ALIAS_HASWELL() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M", \ - IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_0EH) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_4K", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_2M", IAP_EVENT_08H_40H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_60H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_CACHE_MISS", IAP_EVENT_08H_80H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_MISS", IAP_EVENT_24H_21H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_41H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_42H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_22H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_44H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_24H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_MISS", IAP_EVENT_24H_27H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_REFERENCES", IAP_EVENT_24H_E7H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ -__PMC_EV_ALIAS("L2_RQSTS.L2_PF_HIT", IAP_EVENT_24H_50H) \ -__PMC_EV_ALIAS("L2_RQSTS.L2_PF_MISS", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ -__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_3FH) \ -__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ -__PMC_EV_ALIAS("L2_DEMAND_RQSTS.WB_HIT", IAP_EVENT_27H_50H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_4K", \ - IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", \ - IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_0EH) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_4K", IAP_EVENT_49H_20H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_2M", IAP_EVENT_49H_40H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_60H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.PDE_CACHE_MISS", IAP_EVENT_49H_80H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ - IAP_EVENT_58H_04H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_NOT_ELIMINATED", \ - IAP_EVENT_58H_08H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_ELIMINATED", IAP_EVENT_58H_02H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ - IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_4K", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("TLB_MISSES.WALK_COMPLETED_2M_4M", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_0EH) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_4K", IAP_EVENT_85H_20H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_2M", IAP_EVENT_85H_40H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_60H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_88H_84H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_89H_84H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_2", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_3", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_4", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_5", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_6", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_7", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_LDM_PENDING", IAP_EVENT_A3H_02H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L2_PENDING", IAP_EVENT_A3H_05H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_08H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L1D_PENDING", IAP_EVENT_A3H_0CH) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L1", IAP_EVENT_BCH_11H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L1", IAP_EVENT_BCH_21H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L2", IAP_EVENT_BCH_12H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L2", IAP_EVENT_BCH_22H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L3", IAP_EVENT_BCH_14H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L3", IAP_EVENT_BCH_24H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_MEMORY", IAP_EVENT_BCH_18H) \ -__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_MEMORY", IAP_EVENT_BCH_28H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ANY_WB_ASSIST", IAP_EVENT_C1H_40H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_U_RETIRED.CONDITIONAL", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_MISS", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L3_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.ALL", \ - IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_01H) \ -__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_1FH) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_05H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_06H) - - -#define __PMC_EV_ALIAS_IVYBRIDGE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_81H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_82H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_84H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.LARGE_PG_WALK_DURATION", \ - IAP_EVENT_08H_88H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", \ - IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", \ - IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ - IAP_EVENT_58H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_NOT_ELIMINATED", \ - IAP_EVENT_58H_02H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_04H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_ELIMINATED", IAP_EVENT_58H_08H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_5FH_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ - IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ICACHE.IFETCH_STALL", IAP_EVENT_80H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_88H_84H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_89H_84H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_LDM_PENDING", IAP_EVENT_A3H_02H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_NO_EXECUTE", IAP_EVENT_A3H_04H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_08H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.WB", IAP_EVENT_C1H_80H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("BR_MISP_U_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_MISS", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.ALL", \ - IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_01H) \ -__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_1FH) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) - -/* - * Aliases for Ivy Bridge Xeon PMC events (325462-045US January 2013) - */ -#define __PMC_EV_ALIAS_IVYBRIDGE_XEON() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_81H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_82H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_84H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.LARGE_PG_WALK_DURATION", \ - IAP_EVENT_08H_88H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", \ - IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", \ - IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", IAP_EVENT_58H_01H)\ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_NOT_ELIMINATED", \ - IAP_EVENT_58H_02H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_04H) \ -__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_ELIMINATED", IAP_EVENT_58H_08H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_5FH_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ - IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ - IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ -__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ICACHE.IFETCH_STALL", IAP_EVENT_80H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_88H_84H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_89H_84H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_LDM_PENDING", IAP_EVENT_A3H_02H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_NO_EXECUTE", IAP_EVENT_A3H_04H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_08H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.WB", IAP_EVENT_C1H_80H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("BR_MISP_U_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_MISS", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_03H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM", \ - IAP_EVENT_D3H_0CH) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_HITM", \ - IAP_EVENT_D3H_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_FWD", \ - IAP_EVENT_D3H_20H) \ -__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_1FH) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) - -/* - * Aliases for Sandy Bridge PMC events (253669-039US May 2011) - */ -#define __PMC_EV_ALIAS_SANDYBRIDGE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.DATA_UNKNOWN", IAP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("LD_BLOCKS.ALL_BLOCK", IAP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ALL_STA_BLOCK", IAP_EVENT_07H_08H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("INT_MISC.RAT_STALL_CYCLES", IAP_EVENT_0DH_40H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", \ - IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", \ - IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("INSTS_WRITTEN_TO_IQ.INSTS", IAP_EVENT_17H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_E", IAP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("HW_PRE_REQ.DL1_MISS", IAP_EVENT_4EH_02H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("L1D.ALLOCATED_IN_M", IAP_EVENT_51H_02H) \ -__PMC_EV_ALIAS("L1D.EVICTION", IAP_EVENT_51H_04H) \ -__PMC_EV_ALIAS("L1D.ALL_M_REPLACEMENT", IAP_EVENT_51H_08H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP", IAP_EVENT_59H_20H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW", IAP_EVENT_59H_40H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.MUL_SINGLE_UOP", IAP_EVENT_59H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_FL_EMPTY", IAP_EVENT_5BH_0CH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_PRF_CONTROL", IAP_EVENT_5BH_0FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.BOB_FULL", IAP_EVENT_5BH_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.OOO_RSRC", IAP_EVENT_5BH_4FH) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ - IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_88H_84H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_89H_84H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LB", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FCSW", IAP_EVENT_A2H_20H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.OTHER_CANCEL", IAP_EVENT_ACH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ -__PMC_EV_ALIAS("DSB_FILL.ALL_CANCEL", IAP_EVENT_ACH_0AH) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("AGU_BYPASS_CANCEL.COUNT", IAP_EVENT_B6H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("L1D_BLOCKS.BANK_CONFLICT_CYCLES", IAP_EVENT_BFH_05H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ITLB_MISS_RETIRED", IAP_EVENT_C1H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCH", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES_PS", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK_LOADS", IAP_EVENT_D0H_21H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS", \ - IAP_EVENT_D4H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) \ -__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) - -/* - * Aliases for Sandy Bridge Xeon PMC events (253669-044US August 2012) - */ -#define __PMC_EV_ALIAS_SANDYBRIDGE_XEON() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.DATA_UNKNOWN", IAP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("LD_BLOCKS.ALL_BLOCK", IAP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ALL_STA_BLOCK", IAP_EVENT_07H_08H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("INT_MISC.RAT_STALL_CYCLES", IAP_EVENT_0DH_40H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", \ - IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", \ - IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("INSTS_WRITTEN_TO_IQ.INSTS", IAP_EVENT_17H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_E", IAP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_S", IAP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ - IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("HW_PRE_REQ.DL1_MISS", IAP_EVENT_4EH_02H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("L1D.ALLOCATED_IN_M", IAP_EVENT_51H_02H) \ -__PMC_EV_ALIAS("L1D.EVICTION", IAP_EVENT_51H_04H) \ -__PMC_EV_ALIAS("L1D.ALL_M_REPLACEMENT", IAP_EVENT_51H_08H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP", IAP_EVENT_59H_20H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW", IAP_EVENT_59H_40H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.MUL_SINGLE_UOP", IAP_EVENT_59H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_FL_EMPTY", IAP_EVENT_5BH_0CH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_PRF_CONTROL", IAP_EVENT_5BH_0FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.BOB_FULL", IAP_EVENT_5BH_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.OOO_RSRC", IAP_EVENT_5BH_4FH) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ - IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ - IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ - IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ - IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN_COND", IAP_EVENT_88H_41H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN_COND", IAP_EVENT_88H_81H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_82H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_88H_84H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_88H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_90H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_A0H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN_COND", IAP_EVENT_89H_41H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN_COND", IAP_EVENT_89H_81H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ - IAP_EVENT_89H_84H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_88H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_90H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_A0H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LB", IAP_EVENT_A2H_02H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FCSW", IAP_EVENT_A2H_20H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_02H) \ -__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_NO_DISPATCH", IAP_EVENT_A3H_04H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.OTHER_CANCEL", IAP_EVENT_ACH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ -__PMC_EV_ALIAS("DSB_FILL.ALL_CANCEL", IAP_EVENT_ACH_0AH) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("AGU_BYPASS_CANCEL.COUNT", IAP_EVENT_B6H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("L1D_BLOCKS.BANK_CONFLICT_CYCLES", IAP_EVENT_BFH_05H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ITLB_MISS_RETIRED", IAP_EVENT_C1H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCH", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES_PS", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS_LOADS", IAP_EVENT_D0H_11H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS_STORES", IAP_EVENT_D0H_12H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK_LOADS", IAP_EVENT_D0H_21H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_LOADS", IAP_EVENT_D0H_41H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT_STORES", IAP_EVENT_D0H_42H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_LOADS", IAP_EVENT_D0H_81H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_STORES", IAP_EVENT_D0H_82H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_MISS", IAP_EVENT_D1H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ - IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ - IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ - IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ - IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.ALL", \ - IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ - IAP_EVENT_D3H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM", \ - IAP_EVENT_D3H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS", \ - IAP_EVENT_D4H_02H) \ -__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) \ -__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) - -/* timestamp counters. */ -#define __PMC_EV_TSC() \ - __PMC_EV(TSC, TSC) - -#define PMC_EV_TSC_FIRST PMC_EV_TSC_TSC -#define PMC_EV_TSC_LAST PMC_EV_TSC_TSC - -/* - * Software events are dynamically defined. - */ - -#define PMC_EV_DYN_COUNT 0x1000 - -#define PMC_EV_SOFT_FIRST 0x20000 -#define PMC_EV_SOFT_LAST (PMC_EV_SOFT_FIRST + PMC_EV_DYN_COUNT - 1) - -#define __PMC_EV_UCF() \ -__PMC_EV(UCF, UCLOCK) - -#define PMC_EV_UCF_FIRST PMC_EV_UCF_UCLOCK -#define PMC_EV_UCF_LAST PMC_EV_UCF_UCLOCK - -#define __PMC_EV_UCP() \ -__PMC_EV(UCP, EVENT_00H_01H) \ -__PMC_EV(UCP, EVENT_00H_02H) \ -__PMC_EV(UCP, EVENT_00H_04H) \ -__PMC_EV(UCP, EVENT_01H_01H) \ -__PMC_EV(UCP, EVENT_01H_02H) \ -__PMC_EV(UCP, EVENT_01H_04H) \ -__PMC_EV(UCP, EVENT_02H_01H) \ -__PMC_EV(UCP, EVENT_03H_01H) \ -__PMC_EV(UCP, EVENT_03H_02H) \ -__PMC_EV(UCP, EVENT_03H_04H) \ -__PMC_EV(UCP, EVENT_03H_08H) \ -__PMC_EV(UCP, EVENT_03H_10H) \ -__PMC_EV(UCP, EVENT_03H_20H) \ -__PMC_EV(UCP, EVENT_03H_40H) \ -__PMC_EV(UCP, EVENT_04H_01H) \ -__PMC_EV(UCP, EVENT_04H_02H) \ -__PMC_EV(UCP, EVENT_04H_04H) \ -__PMC_EV(UCP, EVENT_04H_08H) \ -__PMC_EV(UCP, EVENT_04H_10H) \ -__PMC_EV(UCP, EVENT_05H_01H) \ -__PMC_EV(UCP, EVENT_05H_02H) \ -__PMC_EV(UCP, EVENT_05H_04H) \ -__PMC_EV(UCP, EVENT_06H_01H) \ -__PMC_EV(UCP, EVENT_06H_02H) \ -__PMC_EV(UCP, EVENT_06H_04H) \ -__PMC_EV(UCP, EVENT_06H_08H) \ -__PMC_EV(UCP, EVENT_06H_10H) \ -__PMC_EV(UCP, EVENT_06H_20H) \ -__PMC_EV(UCP, EVENT_07H_01H) \ -__PMC_EV(UCP, EVENT_07H_02H) \ -__PMC_EV(UCP, EVENT_07H_04H) \ -__PMC_EV(UCP, EVENT_07H_08H) \ -__PMC_EV(UCP, EVENT_07H_10H) \ -__PMC_EV(UCP, EVENT_07H_20H) \ -__PMC_EV(UCP, EVENT_07H_24H) \ -__PMC_EV(UCP, EVENT_08H_01H) \ -__PMC_EV(UCP, EVENT_08H_02H) \ -__PMC_EV(UCP, EVENT_08H_04H) \ -__PMC_EV(UCP, EVENT_08H_03H) \ -__PMC_EV(UCP, EVENT_09H_01H) \ -__PMC_EV(UCP, EVENT_09H_02H) \ -__PMC_EV(UCP, EVENT_09H_04H) \ -__PMC_EV(UCP, EVENT_09H_03H) \ -__PMC_EV(UCP, EVENT_0AH_01H) \ -__PMC_EV(UCP, EVENT_0AH_02H) \ -__PMC_EV(UCP, EVENT_0AH_04H) \ -__PMC_EV(UCP, EVENT_0AH_08H) \ -__PMC_EV(UCP, EVENT_0AH_0FH) \ -__PMC_EV(UCP, EVENT_0BH_01H) \ -__PMC_EV(UCP, EVENT_0BH_02H) \ -__PMC_EV(UCP, EVENT_0BH_04H) \ -__PMC_EV(UCP, EVENT_0BH_08H) \ -__PMC_EV(UCP, EVENT_0BH_10H) \ -__PMC_EV(UCP, EVENT_0BH_1FH) \ -__PMC_EV(UCP, EVENT_0CH_01H) \ -__PMC_EV(UCP, EVENT_0CH_02H) \ -__PMC_EV(UCP, EVENT_0CH_04H_E) \ -__PMC_EV(UCP, EVENT_0CH_04H_F) \ -__PMC_EV(UCP, EVENT_0CH_04H_M) \ -__PMC_EV(UCP, EVENT_0CH_04H_S) \ -__PMC_EV(UCP, EVENT_0CH_08H_E) \ -__PMC_EV(UCP, EVENT_0CH_08H_F) \ -__PMC_EV(UCP, EVENT_0CH_08H_M) \ -__PMC_EV(UCP, EVENT_0CH_08H_S) \ -__PMC_EV(UCP, EVENT_20H_01H) \ -__PMC_EV(UCP, EVENT_20H_02H) \ -__PMC_EV(UCP, EVENT_20H_04H) \ -__PMC_EV(UCP, EVENT_20H_08H) \ -__PMC_EV(UCP, EVENT_20H_10H) \ -__PMC_EV(UCP, EVENT_20H_20H) \ -__PMC_EV(UCP, EVENT_21H_01H) \ -__PMC_EV(UCP, EVENT_21H_02H) \ -__PMC_EV(UCP, EVENT_21H_04H) \ -__PMC_EV(UCP, EVENT_22H_01H) \ -__PMC_EV(UCP, EVENT_22H_02H) \ -__PMC_EV(UCP, EVENT_22H_04H) \ -__PMC_EV(UCP, EVENT_22H_08H) \ -__PMC_EV(UCP, EVENT_22H_10H) \ -__PMC_EV(UCP, EVENT_22H_20H) \ -__PMC_EV(UCP, EVENT_22H_40H) \ -__PMC_EV(UCP, EVENT_22H_80H) \ -__PMC_EV(UCP, EVENT_23H_01H) \ -__PMC_EV(UCP, EVENT_23H_02H) \ -__PMC_EV(UCP, EVENT_23H_04H) \ -__PMC_EV(UCP, EVENT_24H_02H) \ -__PMC_EV(UCP, EVENT_24H_04H) \ -__PMC_EV(UCP, EVENT_25H_01H) \ -__PMC_EV(UCP, EVENT_25H_02H) \ -__PMC_EV(UCP, EVENT_25H_04H) \ -__PMC_EV(UCP, EVENT_26H_01H) \ -__PMC_EV(UCP, EVENT_27H_01H) \ -__PMC_EV(UCP, EVENT_27H_02H) \ -__PMC_EV(UCP, EVENT_27H_04H) \ -__PMC_EV(UCP, EVENT_27H_08H) \ -__PMC_EV(UCP, EVENT_27H_10H) \ -__PMC_EV(UCP, EVENT_27H_20H) \ -__PMC_EV(UCP, EVENT_28H_01H) \ -__PMC_EV(UCP, EVENT_28H_02H) \ -__PMC_EV(UCP, EVENT_28H_04H) \ -__PMC_EV(UCP, EVENT_28H_08H) \ -__PMC_EV(UCP, EVENT_28H_10H) \ -__PMC_EV(UCP, EVENT_28H_20H) \ -__PMC_EV(UCP, EVENT_29H_01H) \ -__PMC_EV(UCP, EVENT_29H_02H) \ -__PMC_EV(UCP, EVENT_29H_04H) \ -__PMC_EV(UCP, EVENT_29H_08H) \ -__PMC_EV(UCP, EVENT_29H_10H) \ -__PMC_EV(UCP, EVENT_29H_20H) \ -__PMC_EV(UCP, EVENT_2AH_01H) \ -__PMC_EV(UCP, EVENT_2AH_02H) \ -__PMC_EV(UCP, EVENT_2AH_04H) \ -__PMC_EV(UCP, EVENT_2AH_07H) \ -__PMC_EV(UCP, EVENT_2BH_01H) \ -__PMC_EV(UCP, EVENT_2BH_02H) \ -__PMC_EV(UCP, EVENT_2BH_04H) \ -__PMC_EV(UCP, EVENT_2BH_07H) \ -__PMC_EV(UCP, EVENT_2CH_01H) \ -__PMC_EV(UCP, EVENT_2CH_02H) \ -__PMC_EV(UCP, EVENT_2CH_04H) \ -__PMC_EV(UCP, EVENT_2CH_07H) \ -__PMC_EV(UCP, EVENT_2DH_01H) \ -__PMC_EV(UCP, EVENT_2DH_02H) \ -__PMC_EV(UCP, EVENT_2DH_04H) \ -__PMC_EV(UCP, EVENT_2DH_07H) \ -__PMC_EV(UCP, EVENT_2EH_01H) \ -__PMC_EV(UCP, EVENT_2EH_02H) \ -__PMC_EV(UCP, EVENT_2EH_04H) \ -__PMC_EV(UCP, EVENT_2EH_07H) \ -__PMC_EV(UCP, EVENT_2FH_01H) \ -__PMC_EV(UCP, EVENT_2FH_02H) \ -__PMC_EV(UCP, EVENT_2FH_04H) \ -__PMC_EV(UCP, EVENT_2FH_07H) \ -__PMC_EV(UCP, EVENT_2FH_08H) \ -__PMC_EV(UCP, EVENT_2FH_10H) \ -__PMC_EV(UCP, EVENT_2FH_20H) \ -__PMC_EV(UCP, EVENT_2FH_38H) \ -__PMC_EV(UCP, EVENT_30H_01H) \ -__PMC_EV(UCP, EVENT_30H_02H) \ -__PMC_EV(UCP, EVENT_30H_04H) \ -__PMC_EV(UCP, EVENT_30H_07H) \ -__PMC_EV(UCP, EVENT_31H_01H) \ -__PMC_EV(UCP, EVENT_31H_02H) \ -__PMC_EV(UCP, EVENT_31H_04H) \ -__PMC_EV(UCP, EVENT_31H_07H) \ -__PMC_EV(UCP, EVENT_32H_01H) \ -__PMC_EV(UCP, EVENT_32H_02H) \ -__PMC_EV(UCP, EVENT_32H_04H) \ -__PMC_EV(UCP, EVENT_32H_07H) \ -__PMC_EV(UCP, EVENT_33H_01H) \ -__PMC_EV(UCP, EVENT_33H_02H) \ -__PMC_EV(UCP, EVENT_33H_04H) \ -__PMC_EV(UCP, EVENT_33H_07H) \ -__PMC_EV(UCP, EVENT_34H_01H) \ -__PMC_EV(UCP, EVENT_34H_02H) \ -__PMC_EV(UCP, EVENT_34H_04H) \ -__PMC_EV(UCP, EVENT_34H_06H) \ -__PMC_EV(UCP, EVENT_34H_08H) \ -__PMC_EV(UCP, EVENT_34H_10H) \ -__PMC_EV(UCP, EVENT_34H_20H) \ -__PMC_EV(UCP, EVENT_34H_40H) \ -__PMC_EV(UCP, EVENT_34H_80H) \ -__PMC_EV(UCP, EVENT_35H_01H) \ -__PMC_EV(UCP, EVENT_35H_02H) \ -__PMC_EV(UCP, EVENT_35H_04H) \ -__PMC_EV(UCP, EVENT_40H_01H) \ -__PMC_EV(UCP, EVENT_40H_02H) \ -__PMC_EV(UCP, EVENT_40H_04H) \ -__PMC_EV(UCP, EVENT_40H_08H) \ -__PMC_EV(UCP, EVENT_40H_10H) \ -__PMC_EV(UCP, EVENT_40H_20H) \ -__PMC_EV(UCP, EVENT_40H_07H) \ -__PMC_EV(UCP, EVENT_40H_38H) \ -__PMC_EV(UCP, EVENT_41H_01H) \ -__PMC_EV(UCP, EVENT_41H_02H) \ -__PMC_EV(UCP, EVENT_41H_04H) \ -__PMC_EV(UCP, EVENT_41H_08H) \ -__PMC_EV(UCP, EVENT_41H_10H) \ -__PMC_EV(UCP, EVENT_41H_20H) \ -__PMC_EV(UCP, EVENT_41H_07H) \ -__PMC_EV(UCP, EVENT_41H_38H) \ -__PMC_EV(UCP, EVENT_42H_01H) \ -__PMC_EV(UCP, EVENT_42H_02H) \ -__PMC_EV(UCP, EVENT_42H_04H) \ -__PMC_EV(UCP, EVENT_42H_08H) \ -__PMC_EV(UCP, EVENT_43H_01H) \ -__PMC_EV(UCP, EVENT_43H_02H) \ -__PMC_EV(UCP, EVENT_60H_01H) \ -__PMC_EV(UCP, EVENT_60H_02H) \ -__PMC_EV(UCP, EVENT_60H_04H) \ -__PMC_EV(UCP, EVENT_61H_01H) \ -__PMC_EV(UCP, EVENT_61H_02H) \ -__PMC_EV(UCP, EVENT_61H_04H) \ -__PMC_EV(UCP, EVENT_62H_01H) \ -__PMC_EV(UCP, EVENT_62H_02H) \ -__PMC_EV(UCP, EVENT_62H_04H) \ -__PMC_EV(UCP, EVENT_63H_01H) \ -__PMC_EV(UCP, EVENT_63H_02H) \ -__PMC_EV(UCP, EVENT_63H_04H) \ -__PMC_EV(UCP, EVENT_63H_08H) \ -__PMC_EV(UCP, EVENT_63H_10H) \ -__PMC_EV(UCP, EVENT_63H_20H) \ -__PMC_EV(UCP, EVENT_64H_01H) \ -__PMC_EV(UCP, EVENT_64H_02H) \ -__PMC_EV(UCP, EVENT_64H_04H) \ -__PMC_EV(UCP, EVENT_64H_08H) \ -__PMC_EV(UCP, EVENT_64H_10H) \ -__PMC_EV(UCP, EVENT_64H_20H) \ -__PMC_EV(UCP, EVENT_65H_01H) \ -__PMC_EV(UCP, EVENT_65H_02H) \ -__PMC_EV(UCP, EVENT_65H_04H) \ -__PMC_EV(UCP, EVENT_66H_01H) \ -__PMC_EV(UCP, EVENT_66H_02H) \ -__PMC_EV(UCP, EVENT_66H_04H) \ -__PMC_EV(UCP, EVENT_67H_01H) \ -__PMC_EV(UCP, EVENT_80H_01H) \ -__PMC_EV(UCP, EVENT_80H_02H) \ -__PMC_EV(UCP, EVENT_80H_04H) \ -__PMC_EV(UCP, EVENT_80H_08H) \ -__PMC_EV(UCP, EVENT_81H_01H) \ -__PMC_EV(UCP, EVENT_81H_02H) \ -__PMC_EV(UCP, EVENT_81H_04H) \ -__PMC_EV(UCP, EVENT_81H_08H) \ -__PMC_EV(UCP, EVENT_81H_20H) \ -__PMC_EV(UCP, EVENT_81H_80H) \ -__PMC_EV(UCP, EVENT_82H_01H) \ -__PMC_EV(UCP, EVENT_83H_01H) \ -__PMC_EV(UCP, EVENT_83H_02H) \ -__PMC_EV(UCP, EVENT_83H_04H) \ -__PMC_EV(UCP, EVENT_83H_08H) \ -__PMC_EV(UCP, EVENT_84H_01H) \ -__PMC_EV(UCP, EVENT_84H_02H) \ -__PMC_EV(UCP, EVENT_84H_04H) \ -__PMC_EV(UCP, EVENT_84H_08H) \ -__PMC_EV(UCP, EVENT_85H_02H) \ -__PMC_EV(UCP, EVENT_86H_01H) - -#define PMC_EV_UCP_FIRST PMC_EV_UCP_EVENT_00H_01H -#define PMC_EV_UCP_LAST PMC_EV_UCP_EVENT_86H_01H - -/* - * Aliases for Broadwell uncore PMC events - */ -#define __PMC_EV_ALIAS_BROADWELLUC() \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.MISS", UCP_EVENT_22H_01H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.INVAL", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.HIT", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.HITM", UCP_EVENT_22H_08H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.INVAL_M", UCP_EVENT_22H_10H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.EXTERNAL_FILTER", \ - UCP_EVENT_22H_20H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.XCORE_FILTER", UCP_EVENT_22H_40H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.EVICTION_FILTER", \ - UCP_EVENT_22H_80H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.ES", UCP_EVENT_34H_06H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.READ_FILTER", UCP_EVENT_34H_10H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.WRITE_FILTER", UCP_EVENT_34H_20H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.EXTSNP_FILTER", UCP_EVENT_34H_40H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.ANY_REQUEST_FILTER", \ - UCP_EVENT_34H_80H) \ -__PMC_EV_ALIAS("UNC_ARB_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ -__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ -__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ -__PMC_EV_ALIAS("UNC_ARB_COH_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("UNC_ARB_COH_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) - -#define __PMC_EV_ALIAS_COREI7UC() \ -__PMC_EV_ALIAS("GQ_CYCLES_FULL.READ_TRACKER", UCP_EVENT_00H_01H) \ -__PMC_EV_ALIAS("GQ_CYCLES_FULL.WRITE_TRACKER", UCP_EVENT_00H_02H) \ -__PMC_EV_ALIAS("GQ_CYCLES_FULL.PEER_PROBE_TRACKER", UCP_EVENT_00H_04H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.READ_TRACKER", UCP_EVENT_01H_01H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.WRITE_TRACKER", UCP_EVENT_01H_02H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", \ - UCP_EVENT_01H_04H) \ -__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_RTID_ACQUIRED", UCP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("GQ_ALLOC.WT_TO_RTID_ACQUIRED", UCP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ -__PMC_EV_ALIAS("GQ_ALLOC.PEER_PROBE_TRACKER", UCP_EVENT_03H_40H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.I_STATE", UCP_EVENT_06H_01H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.S_STATE", UCP_EVENT_06H_02H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_S_STATE", UCP_EVENT_06H_04H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_I_STATE", UCP_EVENT_06H_08H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.CONFLICT", UCP_EVENT_06H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.I_STATE", UCP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.S_STATE", UCP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H)\ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H)\ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.CONFLICT", UCP_EVENT_07H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.HITM", UCP_EVENT_07H_24H) \ -__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ -__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ -__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ -__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ -__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ -__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ -__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ -__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ -__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.REMOTE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ -__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH0", UCP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH1", UCP_EVENT_27H_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH2", UCP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH0", UCP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH1", UCP_EVENT_27H_10H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH2", UCP_EVENT_27H_20H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ -__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH0", UCP_EVENT_2DH_01H) \ -__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH1", UCP_EVENT_2DH_02H) \ -__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH2", UCP_EVENT_2DH_04H) \ -__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.ANY", UCP_EVENT_2DH_07H) \ -__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH0", UCP_EVENT_2EH_01H) \ -__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH1", UCP_EVENT_2EH_02H) \ -__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH2", UCP_EVENT_2EH_04H) \ -__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.ANY", UCP_EVENT_2EH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ -__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", \ - UCP_EVENT_40H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", \ - UCP_EVENT_40H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", \ - UCP_EVENT_40H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", \ - UCP_EVENT_40H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", \ - UCP_EVENT_40H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", \ - UCP_EVENT_40H_20H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_0", UCP_EVENT_40H_07H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_1", UCP_EVENT_40H_38H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", \ - UCP_EVENT_41H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", \ - UCP_EVENT_41H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", \ - UCP_EVENT_41H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", \ - UCP_EVENT_41H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", \ - UCP_EVENT_41H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", \ - UCP_EVENT_41H_20H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_0", UCP_EVENT_41H_07H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_1", UCP_EVENT_41H_38H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ -__PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_0", UCP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_1", UCP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) - -/* - * Aliases for Haswell uncore PMC events - */ -#define __PMC_EV_ALIAS_HASWELLUC() \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.MISS", UCP_EVENT_22H_01H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.INVAL", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.HIT", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.HITM", UCP_EVENT_22H_08H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.INVAL_M", UCP_EVENT_22H_10H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.EXTERNAL_FILTER", \ - UCP_EVENT_22H_20H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.XCORE_FILTER", UCP_EVENT_22H_40H) \ -__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.EVICTION_FILTER", \ - UCP_EVENT_22H_80H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.ES", UCP_EVENT_34H_06H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.READ_FILTER", UCP_EVENT_34H_10H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.WRITE_FILTER", UCP_EVENT_34H_20H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.EXTSNP_FILTER", UCP_EVENT_34H_40H) \ -__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.ANY_REQUEST_FILTER", \ - UCP_EVENT_34H_80H) \ -__PMC_EV_ALIAS("UNC_ARB_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ -__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ -__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ -__PMC_EV_ALIAS("UNC_ARB_COH_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("UNC_ARB_COH_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) - - -#define __PMC_EV_ALIAS_WESTMEREUC() \ -__PMC_EV_ALIAS("GQ_CYCLES_FULL.READ_TRACKER", UCP_EVENT_00H_01H) \ -__PMC_EV_ALIAS("GQ_CYCLES_FULL.WRITE_TRACKER", UCP_EVENT_00H_02H) \ -__PMC_EV_ALIAS("GQ_CYCLES_FULL.PEER_PROBE_TRACKER", UCP_EVENT_00H_04H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.READ_TRACKER", UCP_EVENT_01H_01H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.WRITE_TRACKER", UCP_EVENT_01H_02H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", \ - UCP_EVENT_01H_04H) \ -__PMC_EV_ALIAS("GQ_OCCUPANCY.READ_TRACKER", UCP_EVENT_02H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_RTID_ACQUIRED", UCP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("GQ_ALLOC.WT_TO_RTID_ACQUIRED", UCP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ -__PMC_EV_ALIAS("GQ_ALLOC.PEER_PROBE_TRACKER", UCP_EVENT_03H_40H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.I_STATE", UCP_EVENT_06H_01H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.S_STATE", UCP_EVENT_06H_02H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_S_STATE", UCP_EVENT_06H_04H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_I_STATE", UCP_EVENT_06H_08H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.CONFLICT", UCP_EVENT_06H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.I_STATE", UCP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.S_STATE", UCP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H)\ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H)\ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.CONFLICT", UCP_EVENT_07H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.HITM", UCP_EVENT_07H_24H) \ -__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ -__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ -__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ -__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ -__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ -__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ -__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ -__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ -__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S", UCP_EVENT_0CH_01H) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I", UCP_EVENT_0CH_02H) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_E", UCP_EVENT_0CH_04H_E) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_F", UCP_EVENT_0CH_04H_F) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_M", UCP_EVENT_0CH_04H_M) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_S", UCP_EVENT_0CH_04H_S) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_E", UCP_EVENT_0CH_08H_E) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_F", UCP_EVENT_0CH_08H_F) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_M", UCP_EVENT_0CH_08H_M) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_S", UCP_EVENT_0CH_08H_S) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.REMOTE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ -__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.ANY", UCP_EVENT_2AH_07H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ -__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH0", UCP_EVENT_2DH_01H) \ -__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH1", UCP_EVENT_2DH_02H) \ -__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH2", UCP_EVENT_2DH_04H) \ -__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.ANY", UCP_EVENT_2DH_07H) \ -__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH0", UCP_EVENT_2EH_01H) \ -__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH1", UCP_EVENT_2EH_02H) \ -__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH2", UCP_EVENT_2EH_04H) \ -__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.ANY", UCP_EVENT_2EH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ -__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH0", UCP_EVENT_32H_01H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH1", UCP_EVENT_32H_02H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH2", UCP_EVENT_32H_04H) \ -__PMC_EV_ALIAS("IMC_RETRY.ANY", UCP_EVENT_32H_07H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.IOH", UCP_EVENT_33H_01H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.REMOTE", UCP_EVENT_33H_02H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.ANY", UCP_EVENT_33H_07H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.IOH_ORDER", UCP_EVENT_34H_01H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_ORDER", UCP_EVENT_34H_02H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_ORDER", UCP_EVENT_34H_04H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.IOH_CONFLICT", UCP_EVENT_34H_08H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_CONFLICT", UCP_EVENT_34H_10H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_CONFLICT", UCP_EVENT_34H_20H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.IOH", UCP_EVENT_35H_01H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.REMOTE", UCP_EVENT_35H_02H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.LOCAL", UCP_EVENT_35H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", \ - UCP_EVENT_40H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", \ - UCP_EVENT_40H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", \ - UCP_EVENT_40H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", \ - UCP_EVENT_40H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", \ - UCP_EVENT_40H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", \ - UCP_EVENT_40H_20H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_0", UCP_EVENT_40H_07H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_1", UCP_EVENT_40H_38H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", \ - UCP_EVENT_41H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", \ - UCP_EVENT_41H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", \ - UCP_EVENT_41H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", \ - UCP_EVENT_41H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", \ - UCP_EVENT_41H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", \ - UCP_EVENT_41H_20H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_0", UCP_EVENT_41H_07H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_1", UCP_EVENT_41H_38H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_0", UCP_EVENT_42H_01H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_1", UCP_EVENT_42H_04H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ -__PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_0", UCP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_1", UCP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) \ -__PMC_EV_ALIAS("DRAM_THERMAL_THROTTLED", UCP_EVENT_67H_01H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_0", UCP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_1", UCP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_2", UCP_EVENT_80H_04H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_3", UCP_EVENT_80H_08H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_0", UCP_EVENT_81H_01H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_1", UCP_EVENT_81H_02H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_2", UCP_EVENT_81H_04H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_3", UCP_EVENT_81H_08H) \ -__PMC_EV_ALIAS("PROCHOT_ASSERTION", UCP_EVENT_82H_01H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_0", UCP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_1", UCP_EVENT_83H_02H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_2", UCP_EVENT_83H_04H) \ -__PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_3", UCP_EVENT_83H_08H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_0", UCP_EVENT_84H_01H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_1", UCP_EVENT_84H_02H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_2", UCP_EVENT_84H_04H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_3", UCP_EVENT_84H_08H) \ -__PMC_EV_ALIAS("CYCLES_UNHALTED_L3_FLL_ENABLE", UCP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("CYCLES_UNHALTED_L3_FLL_DISABLE", UCP_EVENT_86H_01H) - - -#define __PMC_EV_ALIAS_SANDYBRIDGEUC() \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITI", UCP_EVENT_22H_01H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITFSE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSHITFSE", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSFWDM", UCP_EVENT_22H_08H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_EXTERNAL", UCP_EVENT_22H_20H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_XCORE", UCP_EVENT_22H_40H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE_AND_XCORE2", UCP_EVENT_22H_80H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.E", UCP_EVENT_34H_02H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.S", UCP_EVENT_34H_04H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_READ", UCP_EVENT_34H_10H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP_AND_READ2", UCP_EVENT_34H_20H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_EXTSNP", UCP_EVENT_34H_40H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_ANY", UCP_EVENT_34H_80H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ -__PMC_EV_ALIAS("IMPH_C0H_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) +#define __PMC_EV_UCP() \ + __PMC_EV(UCP, EVENT_0CH_04H_E) \ + __PMC_EV(UCP, EVENT_0CH_04H_F) \ + __PMC_EV(UCP, EVENT_0CH_04H_M) \ + __PMC_EV(UCP, EVENT_0CH_04H_S) \ + __PMC_EV(UCP, EVENT_0CH_08H_E) \ + __PMC_EV(UCP, EVENT_0CH_08H_F) \ + __PMC_EV(UCP, EVENT_0CH_08H_M) \ + __PMC_EV(UCP, EVENT_0CH_08H_S) \ /* * Intel XScale events from: @@ -7162,31 +1784,21 @@ __PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) #define __PMC_EVENTS() \ __PMC_EV_BLOCK(TSC, 0x01000) \ __PMC_EV_TSC() \ + __PMC_EV_BLOCK(IAF, 0x10000) \ + __PMC_EV_IAF() \ __PMC_EV_BLOCK(K7, 0x2000) \ __PMC_EV_K7() \ - __PMC_EV_BLOCK(K8, 0x2080) \ + __PMC_EV_BLOCK(K8, 0x2080) \ __PMC_EV_K8() \ - __PMC_EV_BLOCK(IAF, 0x10000) \ - __PMC_EV_IAF() \ - __PMC_EV_BLOCK(IAP, 0x10080) \ - __PMC_EV_IAP() \ - __PMC_EV_BLOCK(P4, 0x11000) \ - __PMC_EV_P4() \ - __PMC_EV_BLOCK(P5, 0x11080) \ - __PMC_EV_P5() \ - __PMC_EV_BLOCK(P6, 0x11100) \ - __PMC_EV_P6() \ __PMC_EV_BLOCK(XSCALE, 0x11200) \ __PMC_EV_XSCALE() \ __PMC_EV_BLOCK(MIPS24K, 0x11300) \ __PMC_EV_MIPS24K() \ __PMC_EV_BLOCK(OCTEON, 0x11400) \ __PMC_EV_OCTEON() \ - __PMC_EV_BLOCK(MIPS74K, 0x11500) \ + __PMC_EV_BLOCK(MIPS74K, 0x11500) \ __PMC_EV_MIPS74K() \ - __PMC_EV_BLOCK(UCF, 0x12000) \ - __PMC_EV_UCF() \ - __PMC_EV_BLOCK(UCP, 0x12080) \ + __PMC_EV_BLOCK(UCP, 0x12080) \ __PMC_EV_UCP() \ __PMC_EV_BLOCK(PPC7450, 0x13000) \ __PMC_EV_PPC7450() \ diff --git a/sys/i386/include/pmc_mdep.h b/sys/i386/include/pmc_mdep.h index 9b874ebabcf4..8ea7a0f9e120 100644 --- a/sys/i386/include/pmc_mdep.h +++ b/sys/i386/include/pmc_mdep.h @@ -57,9 +57,6 @@ struct pmc_mdep; #include /* K7 and K8 */ #include -#include -#include -#include #include #include @@ -71,9 +68,6 @@ struct pmc_mdep; #define PMC_MDEP_CLASS_INDEX_TSC 1 #define PMC_MDEP_CLASS_INDEX_K7 2 #define PMC_MDEP_CLASS_INDEX_K8 2 -#define PMC_MDEP_CLASS_INDEX_P4 2 -#define PMC_MDEP_CLASS_INDEX_P5 2 -#define PMC_MDEP_CLASS_INDEX_P6 2 #define PMC_MDEP_CLASS_INDEX_IAP 2 #define PMC_MDEP_CLASS_INDEX_IAF 3 #define PMC_MDEP_CLASS_INDEX_UCP 4 @@ -89,9 +83,6 @@ union pmc_md_op_pmcallocate { struct pmc_md_iap_op_pmcallocate pm_iap; struct pmc_md_ucf_op_pmcallocate pm_ucf; struct pmc_md_ucp_op_pmcallocate pm_ucp; - struct pmc_md_p4_op_pmcallocate pm_p4; - struct pmc_md_pentium_op_pmcallocate pm_pentium; - struct pmc_md_ppro_op_pmcallocate pm_ppro; uint64_t __pad[4]; }; @@ -108,9 +99,6 @@ union pmc_md_pmc { struct pmc_md_iap_pmc pm_iap; struct pmc_md_ucf_pmc pm_ucf; struct pmc_md_ucp_pmc pm_ucp; - struct pmc_md_p4_pmc pm_p4; - struct pmc_md_pentium_pmc pm_pentium; - struct pmc_md_ppro_pmc pm_ppro; }; struct pmc; diff --git a/sys/modules/hwpmc/Makefile b/sys/modules/hwpmc/Makefile index 1db7a661c09c..df5422808c24 100644 --- a/sys/modules/hwpmc/Makefile +++ b/sys/modules/hwpmc/Makefile @@ -13,7 +13,7 @@ SRCS+= hwpmc_arm64.c hwpmc_arm64_md.c .endif .if ${MACHINE_CPUARCH} == "amd64" -SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_tsc.c +SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_tsc.c SRCS+= hwpmc_x86.c hwpmc_uncore.c SRCS+= device_if.h bus_if.h .endif @@ -23,8 +23,8 @@ SRCS+= hwpmc_arm.c .endif .if ${MACHINE_CPUARCH} == "i386" -SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_ppro.c -SRCS+= hwpmc_pentium.c hwpmc_tsc.c hwpmc_x86.c hwpmc_uncore.c +SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c +SRCS+= hwpmc_tsc.c hwpmc_x86.c hwpmc_uncore.c SRCS+= device_if.h bus_if.h .endif