Implement AR724x USB initialisation code.
This (again) still requires an offset for the AR913x/AR724x before USB will function. Submitted by: Luiz Otavio O Souzau <loos.br@gmail.com>
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@ -59,6 +59,7 @@ __FBSDID("$FreeBSD$");
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#include <mips/atheros/ar724xreg.h>
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#include <mips/atheros/ar71xx_cpudef.h>
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#include <mips/atheros/ar71xx_setup.h>
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#include <mips/atheros/ar724x_chip.h>
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static void
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@ -151,6 +152,50 @@ ar724x_chip_get_eth_pll(unsigned int mac, int speed)
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return 0;
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}
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static void
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ar724x_chip_init_usb_peripheral(void)
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{
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR7240:
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ar71xx_device_stop(AR724X_RESET_MODULE_USB_OHCI_DLL |
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AR724X_RESET_USB_HOST);
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DELAY(1000);
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ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL |
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AR724X_RESET_USB_HOST);
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DELAY(1000);
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/*
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* WAR for HW bug. Here it adjusts the duration
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* between two SOFS.
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*/
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ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ,
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(3 << USB_CTRL_FLADJ_A0_SHIFT));
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break;
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL);
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DELAY(100);
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ar71xx_device_start(AR724X_RESET_USB_HOST);
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DELAY(100);
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ar71xx_device_start(AR724X_RESET_USB_PHY);
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DELAY(100);
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break;
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default:
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/* fallthrough */
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break;
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}
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}
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struct ar71xx_cpu_def ar724x_chip_def = {
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&ar724x_chip_detect_mem_size,
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&ar724x_chip_detect_sys_frequency,
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@ -163,5 +208,5 @@ struct ar71xx_cpu_def ar724x_chip_def = {
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&ar724x_chip_ddr_flush_ge1,
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&ar724x_chip_get_eth_pll,
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NULL, /* ar71xx_chip_irq_flush_ip2 */
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NULL /* ar71xx_chip_init_usb_peripheral */
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&ar724x_chip_init_usb_peripheral
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};
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@ -51,6 +51,8 @@
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#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80)
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#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c
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#define AR724X_RESET_USB_HOST (1 << 5)
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#define AR724X_RESET_USB_PHY (1 << 4)
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#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3)
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/* XXX so USB requires different init code? -adrian */
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