Add beripic1, msgdma and softdma instances.
Sponsored by: DARPA, AFRL
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@ -107,6 +107,23 @@
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interrupt-parent = <&cpuintc>;
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};
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/*
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beripic1: beripic@7f808000 {
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compatible = "sri-cambridge,beri-pic";
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = <0x7f808000 0x400
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0x7f80a000 0x10
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0x7f80a080 0x10
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0x7f80a100 0x10>;
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interrupts = < 2 3 4 5 6 >;
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hard-interrupt-sources = <64>;
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soft-interrupt-sources = <64>;
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interrupt-parent = <&cpuintc>;
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};
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*/
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -192,6 +209,62 @@
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};
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};
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msgdma0: msgdma@80004080 {
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compatible = "altr,msgdma-16.0", "altr,msgdma-1.0";
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reg = <0x80004080 0x00000020>,
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<0x800040a0 0x00000020>;
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reg-names = "csr", "descriptor_slave";
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interrupts = <14>;
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interrupt-parent = <&beripic0>;
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#dma-cells = <3>;
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};
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msgdma1: msgdma@80004000 {
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compatible = "altr,msgdma-16.0", "altr,msgdma-1.0";
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reg = <0x80004000 0x00000020>,
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<0x80004020 0x00000020>;
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reg-names = "csr", "descriptor_slave";
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interrupts = <13>;
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interrupt-parent = <&beripic0>;
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#dma-cells = <3>;
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};
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softdma0: softdma@7f007400 {
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compatible = "altr,softdma";
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reg = < 0x7f007400 0x8 /* tx */
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0x7f007420 0x20 >; /* txc */
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interrupts = <2>;
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interrupt-parent = <&beripic0>;
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#dma-cells = <3>;
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};
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softdma1: softdma@7f007500 {
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compatible = "altr,softdma";
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reg = < 0x7f007500 0x8 /* rx */
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0x7f007520 0x20 >; /* rxc */
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interrupts = <1>;
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interrupt-parent = <&beripic0>;
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#dma-cells = <3>;
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};
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softdma2: softdma@7f005400 {
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compatible = "altr,softdma";
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reg = < 0x7f005400 0x8 /* tx */
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0x7f005420 0x20 >; /* txc */
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interrupts = <12>;
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interrupt-parent = <&beripic0>;
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#dma-cells = <3>;
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};
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softdma3: softdma@7f005500 {
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compatible = "altr,softdma";
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reg = < 0x7f005500 0x8 /* rx */
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0x7f005520 0x20 >; /* rxc */
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interrupts = <11>;
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interrupt-parent = <&beripic0>;
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#dma-cells = <3>;
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};
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ethernet@7f007000 {
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compatible = "altera,atse";
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// MAC, RX+RXC, TX+TXC.
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