Use the APSR_nzcv format of mrc. The clang integrated assembler doesn't
support the old usage of r15. Sponsored by: ABT Systems Ltd
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@ -58,7 +58,7 @@ ENTRY(armv5_ec_setttb)
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* do it directly and entirely avoid the problem.
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*/
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mcr p15, 0, r0, c7, c5, 0 /* Invalidate ICache */
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1: mrc p15, 0, r15, c7, c14, 3 /* Test, clean and invalidate DCache */
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1: mrc p15, 0, APSR_nzcv, c7, c14, 3 /* Test, clean and invalidate DCache */
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bne 1b /* More to do? */
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mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
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@ -105,7 +105,7 @@ ENTRY_NP(armv5_ec_icache_sync_all)
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.Larmv5_ec_dcache_wb:
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1:
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mrc p15, 0, r15, c7, c10, 3 /* Test and clean (don't invalidate) */
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mrc p15, 0, APSR_nzcv, c7, c10, 3 /* Test and clean (don't invalidate) */
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bne 1b /* More to do? */
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mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
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RET
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@ -208,7 +208,7 @@ END(armv5_ec_idcache_wbinv_all)
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ENTRY(armv5_ec_dcache_wbinv_all)
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.Larmv5_ec_dcache_wbinv_all:
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1: mrc p15, 0, r15, c7, c14, 3 /* Test, clean and invalidate DCache */
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1: mrc p15, 0, APSR_nzcv, c7, c14, 3 /* Test, clean and invalidate DCache */
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bne 1b /* More to do? */
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mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
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RET
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@ -48,7 +48,7 @@ ENTRY(sheeva_setttb)
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mov r1, #0
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mcr p15, 0, r1, c7, c5, 0 /* Invalidate ICache */
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1: mrc p15, 0, r15, c7, c14, 3 /* Test, clean and invalidate DCache */
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1: mrc p15, 0, APSR_nzcv, c7, c14, 3 /* Test, clean and invalidate DCache */
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bne 1b /* More to do? */
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mcr p15, 1, r1, c15, c9, 0 /* Clean L2 */
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