[ath_hal] add QCA9565 bluteooth antenna control.
This configures the LNA antenna diversity control, which should be on if wlan owns the LNA for bluetooth coexistence. Otherwise, make sure it's off. I think this is eventually intended to allow 1-antenna bluetooth + wifi setups for QCA9565, but I'm not sure where that's actually configured in ath9k. Obtained from: Linux ath9k
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@ -1643,6 +1643,10 @@ HAL_BOOL ar9300_ant_ctrl_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
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u_int32_t xlan_gpio_cfg;
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u_int8_t i;
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HALDEBUG(ah, HAL_DEBUG_BT_COEX, "%s: use_bt_ant_enable=%d\n",
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__func__, ahp->ah_lna_div_use_bt_ant_enable);
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/* XXX TODO: only if rx_gain_idx == 0 */
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if (AR_SREV_POSEIDON(ah)) {
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xlan_gpio_cfg = ah->ah_config.ath_hal_ext_lna_ctl_gpio;
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if (xlan_gpio_cfg) {
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@ -1733,7 +1737,7 @@ HAL_BOOL ar9300_ant_ctrl_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
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AR_PHY_SWITCH_CHAIN_2, AR_SWITCH_TABLE_ALL, value);
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}
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}
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if (AR_SREV_HORNET(ah) || AR_SREV_POSEIDON(ah)) {
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if (AR_SREV_HORNET(ah) || AR_SREV_POSEIDON(ah) || AR_SREV_APHRODITE(ah)) {
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value = ar9300_eeprom_get(ahp, EEP_ANTDIV_control);
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/* main_lnaconf, alt_lnaconf, main_tb, alt_tb */
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regval = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
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@ -1747,6 +1751,29 @@ HAL_BOOL ar9300_ant_ctrl_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
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if ( AR_SREV_POSEIDON(ah) && (ahp->ah_lna_div_use_bt_ant_enable == TRUE) ) {
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regval |= ANT_DIV_ENABLE;
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}
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if (AR_SREV_APHRODITE(ah)) {
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if (ahp->ah_lna_div_use_bt_ant_enable) {
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regval |= (1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_SW_RX_PROT__SHIFT);
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OS_REG_SET_BIT(ah, AR_PHY_RESTART,
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RESTART__ENABLE_ANT_FAST_DIV_M2FLAG__MASK);
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/* Force WLAN LNA diversity ON */
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OS_REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV,
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AR_BTCOEX_WL_LNADIV_FORCE_ON);
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} else {
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regval &= ~(1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_DIV_LNADIV__SHIFT);
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regval &= ~(1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_SW_RX_PROT__SHIFT);
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OS_REG_CLR_BIT(ah, AR_PHY_MC_GAIN_CTRL,
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(1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_SW_RX_PROT__SHIFT));
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/* Force WLAN LNA diversity OFF */
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OS_REG_CLR_BIT(ah, AR_BTCOEX_WL_LNADIV,
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AR_BTCOEX_WL_LNADIV_FORCE_ON);
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}
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}
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#endif /* ATH_ANT_DIV_COMB */
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OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
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@ -1756,7 +1783,8 @@ HAL_BOOL ar9300_ant_ctrl_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
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regval |= ((value >> 7) & 0x1) <<
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BBB_SIG_DETECT__ENABLE_ANT_FAST_DIV__SHIFT;
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#if ATH_ANT_DIV_COMB
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if ( AR_SREV_POSEIDON(ah) && (ahp->ah_lna_div_use_bt_ant_enable == TRUE) ) {
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if ((AR_SREV_POSEIDON(ah) || AR_SREV_APHRODITE(ah))
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&& (ahp->ah_lna_div_use_bt_ant_enable == TRUE) ) {
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regval |= FAST_DIV_ENABLE;
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}
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#endif /* ATH_ANT_DIV_COMB */
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