Introduce initial driver for PMSU on Armada38x
This is a stub for PMSU driver. Note that it cannot be used to set the secondary core boot address during attach because drivers are attached later than SI_SUB_CPU sysinit where cores are started. Setting the boot address should be done manually in platform_mp_start_ap(). SMP is working fine with this commit and was enabled in Armada38x kernel configuration file. Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Michal Stanek <mst@semihalf.com> Differential revision: https://reviews.freebsd.org/D4427
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@ -22,6 +22,8 @@ options ROOTDEVNAME=\"/dev/da0s1a\"
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options SCHED_ULE # ULE scheduler
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#options SCHED_4BSD # 4BSD scheduler
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options SMP
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# Debugging
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#options DEBUG
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#options VERBOSE_SYSINIT
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@ -41,6 +41,8 @@ __FBSDID("$FreeBSD$");
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#include <arm/mv/mvreg.h>
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#include "pmsu.h"
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int cpu_reset_deassert(void);
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int
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@ -2,4 +2,5 @@
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arm/mv/armada38x/armada38x.c standard
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arm/mv/armada38x/armada38x_mp.c optional smp
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arm/mv/armada38x/pmsu.c standard
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arm/mv/armada38x/rtc.c standard
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154
sys/arm/mv/armada38x/pmsu.c
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154
sys/arm/mv/armada38x/pmsu.c
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@ -0,0 +1,154 @@
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/*-
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* Copyright (c) 2015 Semihalf.
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* Copyright (c) 2015 Stormshield.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/rman.h>
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#include <sys/types.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/fdt.h>
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#include <machine/smp.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/mv/mvreg.h>
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#include "pmsu.h"
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static struct resource_spec pmsu_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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struct pmsu_softc {
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device_t dev;
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struct resource *res;
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};
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static int pmsu_probe(device_t dev);
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static int pmsu_attach(device_t dev);
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static int pmsu_detach(device_t dev);
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static device_method_t pmsu_methods[] = {
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DEVMETHOD(device_probe, pmsu_probe),
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DEVMETHOD(device_attach, pmsu_attach),
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DEVMETHOD(device_detach, pmsu_detach),
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{ 0, 0 }
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};
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static driver_t pmsu_driver = {
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"pmsu",
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pmsu_methods,
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sizeof(struct pmsu_softc)
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};
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static devclass_t pmsu_devclass;
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DRIVER_MODULE(pmsu, simplebus, pmsu_driver, pmsu_devclass, 0, 0);
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DRIVER_MODULE(pmsu, ofwbus, pmsu_driver, pmsu_devclass, 0, 0);
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static int
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pmsu_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "marvell,armada-380-pmsu"))
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return (ENXIO);
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device_set_desc(dev, "Power Management Service Unit");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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pmsu_attach(device_t dev)
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{
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struct pmsu_softc *sc;
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int err;
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sc = device_get_softc(dev);
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sc->dev = dev;
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err = bus_alloc_resources(dev, pmsu_spec, &sc->res);
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if (err != 0) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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return (0);
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}
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static int
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pmsu_detach(device_t dev)
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{
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struct pmsu_softc *sc;
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sc = device_get_softc(dev);
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bus_release_resources(dev, pmsu_spec, &sc->res);
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return (0);
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}
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#ifdef SMP
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int
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pmsu_boot_secondary_cpu(void)
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{
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bus_space_handle_t vaddr;
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int rv;
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rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_PMSU_BASE, MV_PMSU_REGS_LEN,
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0, &vaddr);
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if (rv != 0)
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return (rv);
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/* Boot cpu1 */
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bus_space_write_4(fdtbus_bs_tag, vaddr, PMSU_BOOT_ADDR_REDIRECT_OFFSET(1),
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pmap_kextract((vm_offset_t)mpentry));
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cpu_idcache_wbinv_all();
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cpu_l2cache_wbinv_all();
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armv7_sev();
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bus_space_unmap(fdtbus_bs_tag, vaddr, MV_PMSU_REGS_LEN);
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return (0);
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}
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#endif
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35
sys/arm/mv/armada38x/pmsu.h
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35
sys/arm/mv/armada38x/pmsu.h
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@ -0,0 +1,35 @@
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/*-
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* Copyright (c) 2015 Semihalf.
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* Copyright (c) 2015 Stormshield.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_global.h"
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#ifdef SMP
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/* Boot secondary core using PMSU */
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int pmsu_boot_secondary_cpu(void);
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#endif
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#define MV_SCU_REG_CTRL 0x00
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#define MV_SCU_REG_CONFIG 0x04
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#define MV_SCU_ENABLE 1
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#define SCU_CFG_REG_NCPU_MASK 0x3
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#endif
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/*
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