Several improvements to HPET driver:
- Add special check for case when time expires before being programmed. This fixes interrupt loss and respectively timer death on attempt to program very short interval. Increase minimal supported period to more realistic value. - Add support for hint.hpet.X.allowed_irqs tunable, allowing manually specify which interrupts driver allowed to use. Unluckily, many BIOSes program wrong allowed interrupts mask, so driver tries to stay on safe side by not using unshareable ISA IRQs. This option gives control over this limitation, allowing more per-CPU timers to be provided, when FSB interrupts are not supported. Value of this tunable is bitmask. - Do not use regular interrupts on virtual machines. QEMU and VirtualBox do not support them properly, that may cause problems. Stay safe by default. Same time both QEMU and VirtualBox work fine in legacy_route mode. VirtualBox also works fine if manually specify allowed ISA IRQs with above.
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@ -74,6 +74,7 @@ struct hpet_softc {
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int irq;
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int useirq;
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int legacy_route;
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uint32_t allowed_irqs;
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struct resource *mem_res;
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struct resource *intr_res;
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void *intr_handle;
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@ -146,7 +147,7 @@ hpet_start(struct eventtimer *et,
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struct hpet_timer *mt = (struct hpet_timer *)et->et_priv;
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struct hpet_timer *t;
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struct hpet_softc *sc = mt->sc;
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uint32_t fdiv;
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uint32_t fdiv, cmp;
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t = (mt->pcpu_master < 0) ? mt : &sc->t[mt->pcpu_slaves[curcpu]];
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if (period != NULL) {
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@ -164,23 +165,31 @@ hpet_start(struct eventtimer *et,
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fdiv += sc->freq * first->sec;
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} else
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fdiv = t->div;
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if (t->irq < 0)
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bus_write_4(sc->mem_res, HPET_ISR, 1 << t->num);
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t->caps |= HPET_TCNF_INT_ENB;
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t->last = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
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restart:
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cmp = t->last + fdiv;
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if (t->mode == 1 && (t->caps & HPET_TCAP_PER_INT)) {
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t->caps |= HPET_TCNF_TYPE;
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bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num),
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t->caps | HPET_TCNF_VAL_SET);
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bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
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t->last + fdiv);
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bus_read_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num));
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bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
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t->div);
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bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), cmp);
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bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), t->div);
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} else {
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bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num),
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t->last + fdiv);
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t->caps &= ~HPET_TCNF_TYPE;
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bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps);
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bus_write_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num), cmp);
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}
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if (fdiv < 5000) {
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bus_read_4(sc->mem_res, HPET_TIMER_COMPARATOR(t->num));
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t->last = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
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if ((int32_t)(t->last - cmp) < 0) {
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fdiv *= 2;
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goto restart;
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}
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}
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t->caps |= HPET_TCNF_INT_ENB;
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bus_write_4(sc->mem_res, HPET_ISR, 1 << t->num);
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bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(t->num), t->caps);
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return (0);
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}
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@ -321,7 +330,7 @@ hpet_attach(device_t dev)
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int i, j, num_msi, num_timers, num_percpu_et, num_percpu_t, cur_cpu;
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int pcpu_master;
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static int maxhpetet = 0;
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uint32_t val, val2, cvectors;
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uint32_t val, val2, cvectors, dvectors;
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uint16_t vendor, rev;
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ACPI_FUNCTION_TRACE((char *)(uintptr_t) __func__);
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@ -438,10 +447,9 @@ hpet_attach(device_t dev)
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sc->t[1].vectors = 0;
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}
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num_msi = 0;
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sc->useirq = 0;
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/* Find common legacy IRQ vectors for all timers. */
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cvectors = 0xffff0000;
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/* Check what IRQs we want use. */
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/* By default allow any PCI IRQs. */
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sc->allowed_irqs = 0xffff0000;
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/*
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* HPETs in AMD chipsets before SB800 have problems with IRQs >= 16
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* Lower are also not always working for different reasons.
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@ -450,7 +458,25 @@ hpet_attach(device_t dev)
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* interrupt loss. Avoid legacy IRQs for AMD.
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*/
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if (vendor == HPET_VENDID_AMD)
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cvectors = 0x00000000;
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sc->allowed_irqs = 0x00000000;
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/*
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* Neither QEMU nor VirtualBox report supported IRQs correctly.
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* The only way to use HPET there is to specify IRQs manually
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* and/or use legacy_route. Legacy_route mode work on both.
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*/
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if (vm_guest)
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sc->allowed_irqs = 0x00000000;
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/* Let user override. */
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resource_int_value(device_get_name(dev), device_get_unit(dev),
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"allowed_irqs", &sc->allowed_irqs);
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num_msi = 0;
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sc->useirq = 0;
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/* Find IRQ vectors for all timers. */
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cvectors = sc->allowed_irqs & 0xffff0000;
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dvectors = sc->allowed_irqs & 0x0000ffff;
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if (sc->legacy_route)
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dvectors &= 0x0000fefe;
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for (i = 0; i < num_timers; i++) {
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t = &sc->t[i];
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if (sc->legacy_route && i < 2)
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@ -465,6 +491,10 @@ hpet_attach(device_t dev)
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}
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}
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#endif
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else if (dvectors & t->vectors) {
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t->irq = ffs(dvectors & t->vectors) - 1;
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dvectors &= ~(1 << t->irq);
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}
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if (t->irq >= 0) {
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if (!(t->intr_res =
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bus_alloc_resource(dev, SYS_RES_IRQ, &t->intr_rid,
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@ -495,7 +525,7 @@ hpet_attach(device_t dev)
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if (sc->legacy_route)
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hpet_enable(sc);
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/* Group timers for per-CPU operation. */
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num_percpu_et = min(num_msi / mp_ncpus, 2);
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num_percpu_et = min(num_msi / mp_ncpus, 1);
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num_percpu_t = num_percpu_et * mp_ncpus;
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pcpu_master = 0;
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cur_cpu = CPU_FIRST();
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@ -510,7 +540,8 @@ hpet_attach(device_t dev)
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bus_bind_intr(dev, t->intr_res, cur_cpu);
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cur_cpu = CPU_NEXT(cur_cpu);
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num_percpu_t--;
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}
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} else if (t->irq >= 0)
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bus_bind_intr(dev, t->intr_res, CPU_FIRST());
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}
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bus_write_4(sc->mem_res, HPET_ISR, 0xffffffff);
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sc->irq = -1;
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@ -545,7 +576,7 @@ hpet_attach(device_t dev)
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/* Legacy route doesn't need more configuration. */
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} else
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#ifdef DEV_APIC
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if (t->irq >= 0) {
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if ((t->caps & HPET_TCAP_FSB_INT_DEL) && t->irq >= 0) {
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uint64_t addr;
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uint32_t data;
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@ -561,7 +592,9 @@ hpet_attach(device_t dev)
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t->irq = -2;
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} else
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#endif
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if (sc->irq >= 0 && (t->vectors & (1 << sc->irq)))
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if (t->irq >= 0)
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t->caps |= (t->irq << 9);
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else if (sc->irq >= 0 && (t->vectors & (1 << sc->irq)))
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t->caps |= (sc->irq << 9) | HPET_TCNF_INT_TYPE;
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bus_write_4(sc->mem_res, HPET_TIMER_CAP_CNF(i), t->caps);
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/* Skip event timers without set up IRQ. */
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@ -585,7 +618,7 @@ hpet_attach(device_t dev)
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t->et.et_quality -= 10;
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t->et.et_frequency = sc->freq;
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t->et.et_min_period.sec = 0;
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t->et.et_min_period.frac = 0x00004000LLU << 32;
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t->et.et_min_period.frac = 0x00008000LLU << 32;
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t->et.et_max_period.sec = 0xfffffffeLLU / sc->freq;
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t->et.et_max_period.frac =
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((0xfffffffeLLU << 32) / sc->freq) << 32;
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