Update PCI driver to match new dts tree
In new dts tree phy is a property of port, not the controller node, also the name was changed from "pcie" to "pcie-0"
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@ -266,6 +266,7 @@ struct tegra_pcib_port {
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int port_idx; /* chip port index */
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int num_lanes; /* number of lanes */
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bus_size_t afi_pex_ctrl; /* offset of afi_pex_ctrl */
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phy_t phy; /* port phy */
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/* Config space properties. */
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bus_addr_t rp_base_addr; /* PA of config window */
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@ -291,7 +292,6 @@ struct tegra_pcib_softc {
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struct ofw_pci_range pref_mem_range;
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struct ofw_pci_range io_range;
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phy_t phy;
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clk_t clk_pex;
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clk_t clk_afi;
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clk_t clk_pll_e;
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@ -963,6 +963,15 @@ tegra_pcib_parse_port(struct tegra_pcib_softc *sc, phandle_t node)
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port->afi_pex_ctrl = tegra_pcib_pex_ctrl(sc, port->port_idx);
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sc->lanes_cfg |= port->num_lanes << (4 * port->port_idx);
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/* Phy. */
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rv = phy_get_by_ofw_name(sc->dev, node, "pcie-0", &port->phy);
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if (rv != 0) {
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device_printf(sc->dev,
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"Cannot get 'pcie-0' phy for port %d\n",
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port->port_idx);
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goto fail;
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}
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return (port);
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fail:
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free(port, M_DEVBUF);
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@ -1067,13 +1076,6 @@ tegra_pcib_parse_fdt_resources(struct tegra_pcib_softc *sc, phandle_t node)
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return (ENXIO);
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}
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/* Phy. */
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rv = phy_get_by_ofw_name(sc->dev, 0, "pcie", &sc->phy);
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if (rv != 0) {
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device_printf(sc->dev, "Cannot get 'pcie' phy\n");
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return (ENXIO);
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}
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/* Ports */
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sc->num_ports = 0;
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for (child = OF_child(node); child != 0; child = OF_peer(child)) {
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@ -1306,13 +1308,19 @@ tegra_pcib_enable(struct tegra_pcib_softc *sc)
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reg &= ~AFI_FUSE_PCIE_T0_GEN2_DIS;
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AFI_WR4(sc, AFI_FUSE, reg);
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/* Enable PCIe phy. */
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rv = phy_enable(sc->dev, sc->phy);
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if (rv != 0) {
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device_printf(sc->dev, "Cannot enable phy\n");
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return (rv);
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for (i = 0; i < TEGRA_PCIB_MAX_PORTS; i++) {
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if (sc->ports[i] != NULL) {
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rv = phy_enable(sc->dev, sc->ports[i]->phy);
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if (rv != 0) {
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device_printf(sc->dev,
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"Cannot enable phy for port %d\n",
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sc->ports[i]->port_idx);
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return (rv);
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}
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}
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}
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rv = hwreset_deassert(sc->hwreset_pcie_x);
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if (rv != 0) {
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device_printf(sc->dev, "Cannot unreset 'pci_x' reset\n");
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