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Attempt to set write combining mode for graphics devices.

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This commit is contained in:
John Dyson 1998-05-11 01:06:08 +00:00
parent 9b6f1a185f
commit f0175db1ee
12 changed files with 268 additions and 420 deletions
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64
sys/amd64/amd64/mp_machdep.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.72 1998/04/06 08:25:30 phk Exp $
* $Id: mp_machdep.c,v 1.73 1998/04/06 15:48:30 peter Exp $
*/
#include "opt_smp.h"
@ -286,13 +286,6 @@ int io_num_to_apic_id[NAPICID];
int apic_id_to_logical[NAPICID];
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
static struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
u_int all_cpus;
@ -342,10 +335,6 @@ static void init_locks(void);
static int start_all_aps(u_int boot_addr);
static void install_ap_tramp(u_int boot_addr);
static int start_ap(int logicalCpu, u_int boot_addr);
static void getmtrr(void);
static void putmtrr(void);
static void putfmtrr(void);
/*
* Calculate usable address in base memory for AP trampoline code.
@ -494,7 +483,7 @@ init_secondary(void)
pmap_set_opt((unsigned *)PTD);
putmtrr();
putfmtrr();
pmap_setvidram();
invltlb();
}
@ -554,7 +543,7 @@ mp_enable(u_int boot_addr)
#endif /* APIC_IO */
getmtrr();
putfmtrr();
pmap_setvidram();
POSTCODE(MP_ENABLE_POST);
@ -2119,6 +2108,8 @@ ap_init()
panic("cpuid mismatch! boom!!");
}
getmtrr();
/* Init local apic for irq's */
apic_initialize();
@ -2134,51 +2125,6 @@ ap_init()
curproc = NULL; /* make sure */
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
putfmtrr()
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
#ifdef BETTER_CLOCK
#define CHECKSTATE_USER 0

64
sys/amd64/amd64/mptable.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.72 1998/04/06 08:25:30 phk Exp $
* $Id: mp_machdep.c,v 1.73 1998/04/06 15:48:30 peter Exp $
*/
#include "opt_smp.h"
@ -286,13 +286,6 @@ int io_num_to_apic_id[NAPICID];
int apic_id_to_logical[NAPICID];
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
static struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
u_int all_cpus;
@ -342,10 +335,6 @@ static void init_locks(void);
static int start_all_aps(u_int boot_addr);
static void install_ap_tramp(u_int boot_addr);
static int start_ap(int logicalCpu, u_int boot_addr);
static void getmtrr(void);
static void putmtrr(void);
static void putfmtrr(void);
/*
* Calculate usable address in base memory for AP trampoline code.
@ -494,7 +483,7 @@ init_secondary(void)
pmap_set_opt((unsigned *)PTD);
putmtrr();
putfmtrr();
pmap_setvidram();
invltlb();
}
@ -554,7 +543,7 @@ mp_enable(u_int boot_addr)
#endif /* APIC_IO */
getmtrr();
putfmtrr();
pmap_setvidram();
POSTCODE(MP_ENABLE_POST);
@ -2119,6 +2108,8 @@ ap_init()
panic("cpuid mismatch! boom!!");
}
getmtrr();
/* Init local apic for irq's */
apic_initialize();
@ -2134,51 +2125,6 @@ ap_init()
curproc = NULL; /* make sure */
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
putfmtrr()
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
#ifdef BETTER_CLOCK
#define CHECKSTATE_USER 0

87
sys/amd64/amd64/pmap.c
View File

@ -39,7 +39,7 @@
* SUCH DAMAGE.
*
* from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
* $Id: pmap.c,v 1.192 1998/04/15 17:45:02 bde Exp $
* $Id: pmap.c,v 1.193 1998/04/19 15:22:48 bde Exp $
*/
/*
@ -444,6 +444,91 @@ pmap_bootstrap(firstaddr, loadaddr)
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
pmap_setvidram(void)
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
void
pmap_setdevram(unsigned long long basea, vm_offset_t sizea)
{
int i, free, skip;
unsigned basepage, basepaget;
unsigned long long base;
unsigned long long mask;
if (cpu_class != CPUCLASS_686)
return;
free = -1;
skip = 0;
basea &= ~0xfff;
base = basea | 0x1;
mask = (long long) (0xfffffffffLL - ((long) sizea - 1)) | (long long) 0x800;
mask &= ~0x7ff;
basepage = (long long) (base >> 12);
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
basepaget = (long long) (PPro_vmtrr[i].base >> 12);
if (basepage == basepaget)
skip = 1;
if ((PPro_vmtrr[i].mask & 0x800) == 0) {
if (free == -1)
free = i;
}
}
if (!skip && free != -1) {
wbinvd();
PPro_vmtrr[free].base = base;
PPro_vmtrr[free].mask = mask;
wrmsr(PPRO_VMTRRphysBase0 + free * 2, base);
wrmsr(PPRO_VMTRRphysMask0 + free * 2, mask);
printf("pmap: added WC mapping at page: 0x%x %x, size: %d mask: 0x%x %x\n", base, sizea, mask);
}
}
/*
* Set 4mb pdir for mp startup, and global flags
*/

64
sys/amd64/include/mptable.h
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.72 1998/04/06 08:25:30 phk Exp $
* $Id: mp_machdep.c,v 1.73 1998/04/06 15:48:30 peter Exp $
*/
#include "opt_smp.h"
@ -286,13 +286,6 @@ int io_num_to_apic_id[NAPICID];
int apic_id_to_logical[NAPICID];
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
static struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
u_int all_cpus;
@ -342,10 +335,6 @@ static void init_locks(void);
static int start_all_aps(u_int boot_addr);
static void install_ap_tramp(u_int boot_addr);
static int start_ap(int logicalCpu, u_int boot_addr);
static void getmtrr(void);
static void putmtrr(void);
static void putfmtrr(void);
/*
* Calculate usable address in base memory for AP trampoline code.
@ -494,7 +483,7 @@ init_secondary(void)
pmap_set_opt((unsigned *)PTD);
putmtrr();
putfmtrr();
pmap_setvidram();
invltlb();
}
@ -554,7 +543,7 @@ mp_enable(u_int boot_addr)
#endif /* APIC_IO */
getmtrr();
putfmtrr();
pmap_setvidram();
POSTCODE(MP_ENABLE_POST);
@ -2119,6 +2108,8 @@ ap_init()
panic("cpuid mismatch! boom!!");
}
getmtrr();
/* Init local apic for irq's */
apic_initialize();
@ -2134,51 +2125,6 @@ ap_init()
curproc = NULL; /* make sure */
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
putfmtrr()
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
#ifdef BETTER_CLOCK
#define CHECKSTATE_USER 0

16
sys/amd64/include/pmap.h
View File

@ -42,7 +42,7 @@
*
* from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
* $Id: pmap.h,v 1.53 1997/08/05 00:42:01 dyson Exp $
* $Id: pmap.h,v 1.54 1997/11/20 19:30:35 bde Exp $
*/
#ifndef _MACHINE_PMAP_H_
@ -234,6 +234,15 @@ typedef struct pv_entry {
#ifdef KERNEL
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
extern caddr_t CADDR1;
extern pt_entry_t *CMAP1;
extern vm_offset_t avail_end;
@ -252,6 +261,11 @@ unsigned *pmap_pte __P((pmap_t, vm_offset_t)) __pure2;
vm_page_t pmap_use_pt __P((pmap_t, vm_offset_t));
void pmap_set_opt __P((unsigned *));
void pmap_set_opt_bsp __P((void));
void getmtrr __P((void));
void putmtrr __P((void));
void putfmtrr __P((void));
void pmap_setdevram __P((unsigned long long, unsigned));
void pmap_setvidram __P((void));
#endif /* KERNEL */

64
sys/i386/i386/mp_machdep.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.72 1998/04/06 08:25:30 phk Exp $
* $Id: mp_machdep.c,v 1.73 1998/04/06 15:48:30 peter Exp $
*/
#include "opt_smp.h"
@ -286,13 +286,6 @@ int io_num_to_apic_id[NAPICID];
int apic_id_to_logical[NAPICID];
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
static struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
u_int all_cpus;
@ -342,10 +335,6 @@ static void init_locks(void);
static int start_all_aps(u_int boot_addr);
static void install_ap_tramp(u_int boot_addr);
static int start_ap(int logicalCpu, u_int boot_addr);
static void getmtrr(void);
static void putmtrr(void);
static void putfmtrr(void);
/*
* Calculate usable address in base memory for AP trampoline code.
@ -494,7 +483,7 @@ init_secondary(void)
pmap_set_opt((unsigned *)PTD);
putmtrr();
putfmtrr();
pmap_setvidram();
invltlb();
}
@ -554,7 +543,7 @@ mp_enable(u_int boot_addr)
#endif /* APIC_IO */
getmtrr();
putfmtrr();
pmap_setvidram();
POSTCODE(MP_ENABLE_POST);
@ -2119,6 +2108,8 @@ ap_init()
panic("cpuid mismatch! boom!!");
}
getmtrr();
/* Init local apic for irq's */
apic_initialize();
@ -2134,51 +2125,6 @@ ap_init()
curproc = NULL; /* make sure */
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
putfmtrr()
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
#ifdef BETTER_CLOCK
#define CHECKSTATE_USER 0

64
sys/i386/i386/mptable.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.72 1998/04/06 08:25:30 phk Exp $
* $Id: mp_machdep.c,v 1.73 1998/04/06 15:48:30 peter Exp $
*/
#include "opt_smp.h"
@ -286,13 +286,6 @@ int io_num_to_apic_id[NAPICID];
int apic_id_to_logical[NAPICID];
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
static struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
u_int all_cpus;
@ -342,10 +335,6 @@ static void init_locks(void);
static int start_all_aps(u_int boot_addr);
static void install_ap_tramp(u_int boot_addr);
static int start_ap(int logicalCpu, u_int boot_addr);
static void getmtrr(void);
static void putmtrr(void);
static void putfmtrr(void);
/*
* Calculate usable address in base memory for AP trampoline code.
@ -494,7 +483,7 @@ init_secondary(void)
pmap_set_opt((unsigned *)PTD);
putmtrr();
putfmtrr();
pmap_setvidram();
invltlb();
}
@ -554,7 +543,7 @@ mp_enable(u_int boot_addr)
#endif /* APIC_IO */
getmtrr();
putfmtrr();
pmap_setvidram();
POSTCODE(MP_ENABLE_POST);
@ -2119,6 +2108,8 @@ ap_init()
panic("cpuid mismatch! boom!!");
}
getmtrr();
/* Init local apic for irq's */
apic_initialize();
@ -2134,51 +2125,6 @@ ap_init()
curproc = NULL; /* make sure */
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
putfmtrr()
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
#ifdef BETTER_CLOCK
#define CHECKSTATE_USER 0

87
sys/i386/i386/pmap.c
View File

@ -39,7 +39,7 @@
* SUCH DAMAGE.
*
* from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
* $Id: pmap.c,v 1.192 1998/04/15 17:45:02 bde Exp $
* $Id: pmap.c,v 1.193 1998/04/19 15:22:48 bde Exp $
*/
/*
@ -444,6 +444,91 @@ pmap_bootstrap(firstaddr, loadaddr)
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
pmap_setvidram(void)
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
void
pmap_setdevram(unsigned long long basea, vm_offset_t sizea)
{
int i, free, skip;
unsigned basepage, basepaget;
unsigned long long base;
unsigned long long mask;
if (cpu_class != CPUCLASS_686)
return;
free = -1;
skip = 0;
basea &= ~0xfff;
base = basea | 0x1;
mask = (long long) (0xfffffffffLL - ((long) sizea - 1)) | (long long) 0x800;
mask &= ~0x7ff;
basepage = (long long) (base >> 12);
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
basepaget = (long long) (PPro_vmtrr[i].base >> 12);
if (basepage == basepaget)
skip = 1;
if ((PPro_vmtrr[i].mask & 0x800) == 0) {
if (free == -1)
free = i;
}
}
if (!skip && free != -1) {
wbinvd();
PPro_vmtrr[free].base = base;
PPro_vmtrr[free].mask = mask;
wrmsr(PPRO_VMTRRphysBase0 + free * 2, base);
wrmsr(PPRO_VMTRRphysMask0 + free * 2, mask);
printf("pmap: added WC mapping at page: 0x%x %x, size: %d mask: 0x%x %x\n", base, sizea, mask);
}
}
/*
* Set 4mb pdir for mp startup, and global flags
*/

64
sys/i386/include/mptable.h
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.72 1998/04/06 08:25:30 phk Exp $
* $Id: mp_machdep.c,v 1.73 1998/04/06 15:48:30 peter Exp $
*/
#include "opt_smp.h"
@ -286,13 +286,6 @@ int io_num_to_apic_id[NAPICID];
int apic_id_to_logical[NAPICID];
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
static struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
u_int all_cpus;
@ -342,10 +335,6 @@ static void init_locks(void);
static int start_all_aps(u_int boot_addr);
static void install_ap_tramp(u_int boot_addr);
static int start_ap(int logicalCpu, u_int boot_addr);
static void getmtrr(void);
static void putmtrr(void);
static void putfmtrr(void);
/*
* Calculate usable address in base memory for AP trampoline code.
@ -494,7 +483,7 @@ init_secondary(void)
pmap_set_opt((unsigned *)PTD);
putmtrr();
putfmtrr();
pmap_setvidram();
invltlb();
}
@ -554,7 +543,7 @@ mp_enable(u_int boot_addr)
#endif /* APIC_IO */
getmtrr();
putfmtrr();
pmap_setvidram();
POSTCODE(MP_ENABLE_POST);
@ -2119,6 +2108,8 @@ ap_init()
panic("cpuid mismatch! boom!!");
}
getmtrr();
/* Init local apic for irq's */
apic_initialize();
@ -2134,51 +2125,6 @@ ap_init()
curproc = NULL; /* make sure */
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
putfmtrr()
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
#ifdef BETTER_CLOCK
#define CHECKSTATE_USER 0

16
sys/i386/include/pmap.h
View File

@ -42,7 +42,7 @@
*
* from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
* $Id: pmap.h,v 1.53 1997/08/05 00:42:01 dyson Exp $
* $Id: pmap.h,v 1.54 1997/11/20 19:30:35 bde Exp $
*/
#ifndef _MACHINE_PMAP_H_
@ -234,6 +234,15 @@ typedef struct pv_entry {
#ifdef KERNEL
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
extern caddr_t CADDR1;
extern pt_entry_t *CMAP1;
extern vm_offset_t avail_end;
@ -252,6 +261,11 @@ unsigned *pmap_pte __P((pmap_t, vm_offset_t)) __pure2;
vm_page_t pmap_use_pt __P((pmap_t, vm_offset_t));
void pmap_set_opt __P((unsigned *));
void pmap_set_opt_bsp __P((void));
void getmtrr __P((void));
void putmtrr __P((void));
void putfmtrr __P((void));
void pmap_setdevram __P((unsigned long long, unsigned));
void pmap_setvidram __P((void));
#endif /* KERNEL */

64
sys/kern/subr_smp.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.72 1998/04/06 08:25:30 phk Exp $
* $Id: mp_machdep.c,v 1.73 1998/04/06 15:48:30 peter Exp $
*/
#include "opt_smp.h"
@ -286,13 +286,6 @@ int io_num_to_apic_id[NAPICID];
int apic_id_to_logical[NAPICID];
#define NPPROVMTRR 8
#define PPRO_VMTRRphysBase0 0x200
#define PPRO_VMTRRphysMask0 0x201
static struct {
u_int64_t base, mask;
} PPro_vmtrr[NPPROVMTRR];
/* Bitmap of all available CPUs */
u_int all_cpus;
@ -342,10 +335,6 @@ static void init_locks(void);
static int start_all_aps(u_int boot_addr);
static void install_ap_tramp(u_int boot_addr);
static int start_ap(int logicalCpu, u_int boot_addr);
static void getmtrr(void);
static void putmtrr(void);
static void putfmtrr(void);
/*
* Calculate usable address in base memory for AP trampoline code.
@ -494,7 +483,7 @@ init_secondary(void)
pmap_set_opt((unsigned *)PTD);
putmtrr();
putfmtrr();
pmap_setvidram();
invltlb();
}
@ -554,7 +543,7 @@ mp_enable(u_int boot_addr)
#endif /* APIC_IO */
getmtrr();
putfmtrr();
pmap_setvidram();
POSTCODE(MP_ENABLE_POST);
@ -2119,6 +2108,8 @@ ap_init()
panic("cpuid mismatch! boom!!");
}
getmtrr();
/* Init local apic for irq's */
apic_initialize();
@ -2134,51 +2125,6 @@ ap_init()
curproc = NULL; /* make sure */
}
void
getmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
for(i = 0; i < NPPROVMTRR; i++) {
PPro_vmtrr[i].base = rdmsr(PPRO_VMTRRphysBase0 + i * 2);
PPro_vmtrr[i].mask = rdmsr(PPRO_VMTRRphysMask0 + i * 2);
}
}
}
void
putmtrr()
{
int i;
if (cpu_class == CPUCLASS_686) {
wbinvd();
for(i = 0; i < NPPROVMTRR; i++) {
wrmsr(PPRO_VMTRRphysBase0 + i * 2, PPro_vmtrr[i].base);
wrmsr(PPRO_VMTRRphysMask0 + i * 2, PPro_vmtrr[i].mask);
}
}
}
void
putfmtrr()
{
if (cpu_class == CPUCLASS_686) {
wbinvd();
/*
* Set memory between 0-640K to be WB
*/
wrmsr(0x250, 0x0606060606060606LL);
wrmsr(0x258, 0x0606060606060606LL);
/*
* Set normal, PC video memory to be WC
*/
wrmsr(0x259, 0x0101010101010101LL);
}
}
#ifdef BETTER_CLOCK
#define CHECKSTATE_USER 0

34
sys/pci/pcisupport.c
View File

@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcisupport.c,v 1.66 1998/05/04 08:16:03 kato Exp $
** $Id: pcisupport.c,v 1.67 1998/05/08 07:56:48 bde Exp $
**
** Device driver for DEC/INTEL PCI chipsets.
**
@ -49,6 +49,10 @@
#include <pci/pcivar.h>
#include <pci/pcireg.h>
#include <vm/vm.h>
#include <vm/vm_object.h>
#include <vm/pmap.h>
/*---------------------------------------------------------
**
** Intel chipsets for 486 / Pentium processor
@ -851,7 +855,7 @@ static struct pci_device vga_device = {
DATA_SET (pcidevice_set, vga_device);
static char* vga_probe (pcici_t tag, pcidi_t unused)
static char* vga_probe (pcici_t tag, pcidi_t typea)
{
int data = pci_conf_read(tag, PCI_CLASS_REG);
u_int id = pci_conf_read(tag, PCI_ID_REG);
@ -1077,9 +1081,33 @@ static char* vga_probe (pcici_t tag, pcidi_t unused)
if (vendor && chip) {
char *buf;
int len;
int i;
int reqmapmem;
if (type == 0)
if (type == 0) {
type = "SVGA controller";
}
reqmapmem = PCI_MAPMEM;
for (i = 0; i < tag->nummaps; i++) {
pcimap *m = &tag->map[i];
if (m->type & PCI_MAPMEMP)
reqmapmem |= PCI_MAPMEMP;
}
for (i = 0; i < tag->nummaps; i++) {
unsigned mapaddr;
pcimap *m = &tag->map[i];
mapaddr = (m->base >> 12);
if (m->type == reqmapmem) {
pmap_setdevram(m->base, (1 << m->ln2size));
}
}
#if defined(i386)
pmap_setvidram();
#endif
len = strlen(vendor) + strlen(chip) + strlen(type) + 4;
MALLOC(buf, char *, len, M_TEMP, M_NOWAIT);
sprintf(buf, "%s %s %s", vendor, chip, type);