Align td_frame as it will be placed into the sp register which must be
8 byte aligned on ARM EABI.
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@ -398,6 +398,12 @@ cpu_thread_alloc(struct thread *td)
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PAGE_SIZE) - 1;
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td->td_frame = (struct trapframe *)
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((u_int)td->td_kstack + USPACE_SVC_STACK_TOP - sizeof(struct pcb)) - 1;
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/*
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* Ensure td_frame is aligned to an 8 byte boundary as it will be
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* placed into the stack pointer which must be 8 byte aligned in
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* the ARM EABI.
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*/
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td->td_frame = (struct trapframe *)((u_int)td->td_frame & ~7);
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#ifdef __XSCALE__
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#ifndef CPU_XSCALE_CORE3
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pmap_use_minicache(td->td_kstack, td->td_kstack_pages * PAGE_SIZE);
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