Use the capability pointer to indicate whether the host controller is
PCI Express, rather than a bit-field (boolean). Saving the capability pointer this way makes access to capability-specific configuration registers easy and efficient.
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55f031bd90
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@ -94,7 +94,7 @@ struct pci_ocp_softc {
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int sc_rid;
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int sc_busnr;
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int sc_pcie:1;
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uint8_t sc_pcie_cap;
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/* Devices that need special attention. */
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int sc_devfn_tundra;
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@ -168,7 +168,7 @@ pci_ocp_cfgread(struct pci_ocp_softc *sc, u_int bus, u_int slot, u_int func,
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addr |= (slot & 0x1f) << 11;
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addr |= (func & 0x7) << 8;
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addr |= reg & 0xfc;
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if (sc->sc_pcie)
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if (sc->sc_pcie_cap)
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addr |= (reg & 0xf00) << 16;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_CFG_ADDR, addr);
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@ -206,7 +206,7 @@ pci_ocp_cfgwrite(struct pci_ocp_softc *sc, u_int bus, u_int slot, u_int func,
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addr |= (slot & 0x1f) << 11;
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addr |= (func & 0x7) << 8;
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addr |= reg & 0xfc;
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if (sc->sc_pcie)
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if (sc->sc_pcie_cap)
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addr |= (reg & 0xf00) << 16;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_CFG_ADDR, addr);
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@ -261,7 +261,7 @@ pci_ocp_maxslots(device_t dev)
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{
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struct pci_ocp_softc *sc = device_get_softc(dev);
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return ((sc->sc_pcie) ? 0 : 30);
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return ((sc->sc_pcie_cap) ? 0 : 30);
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}
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static uint32_t
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@ -271,7 +271,7 @@ pci_ocp_read_config(device_t dev, u_int bus, u_int slot, u_int func,
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struct pci_ocp_softc *sc = device_get_softc(dev);
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u_int devfn;
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if (bus == sc->sc_busnr && !sc->sc_pcie && slot < 10)
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if (bus == sc->sc_busnr && !sc->sc_pcie_cap && slot < 10)
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return (~0);
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devfn = DEVFN(bus, slot, func);
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if (devfn == sc->sc_devfn_tundra)
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@ -287,7 +287,7 @@ pci_ocp_write_config(device_t dev, u_int bus, u_int slot, u_int func,
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{
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struct pci_ocp_softc *sc = device_get_softc(dev);
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if (bus == sc->sc_busnr && !sc->sc_pcie && slot < 10)
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if (bus == sc->sc_busnr && !sc->sc_pcie_cap && slot < 10)
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return;
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pci_ocp_cfgwrite(sc, bus, slot, func, reg, val, bytes);
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}
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@ -302,6 +302,7 @@ pci_ocp_probe(device_t dev)
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u_long start, size;
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uintptr_t devtype;
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uint32_t cfgreg;
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uint8_t capptr;
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int error;
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parent = device_get_parent(dev);
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@ -341,19 +342,19 @@ pci_ocp_probe(device_t dev)
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goto out;
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type = "PCI";
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cfgreg = pci_ocp_cfgread(sc, 0, 0, 0, PCIR_CAP_PTR, 1);
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while (cfgreg != 0) {
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cfgreg = pci_ocp_cfgread(sc, 0, 0, 0, cfgreg, 2);
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capptr = pci_ocp_cfgread(sc, 0, 0, 0, PCIR_CAP_PTR, 1);
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while (capptr != 0) {
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cfgreg = pci_ocp_cfgread(sc, 0, 0, 0, capptr, 2);
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switch (cfgreg & 0xff) {
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case PCIY_PCIX: /* PCI-X */
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type = "PCI-X";
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break;
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case PCIY_EXPRESS: /* PCI Express */
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type = "PCI Express";
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sc->sc_pcie = 1;
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sc->sc_pcie_cap = capptr;
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break;
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}
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cfgreg = (cfgreg >> 8) & 0xff;
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capptr = (cfgreg >> 8) & 0xff;
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}
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error = bus_get_resource(dev, SYS_RES_MEMORY, 1, &start, &size);
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@ -738,7 +739,7 @@ pci_ocp_attach(device_t dev)
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sc->sc_devfn_tundra = -1;
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sc->sc_devfn_via_ide = -1;
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maxslot = (sc->sc_pcie) ? 1 : 31;
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maxslot = (sc->sc_pcie_cap) ? 1 : 31;
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pci_ocp_init(sc, sc->sc_busnr, maxslot);
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device_add_child(dev, "pci", -1);
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