Only calibrate ICR read loop when not in x2APIC mode. Run-time
switching between LAPIC modes is not supported, and there is no need to wait for IPI ack in x2APIC mode. So the calibrated delay is only needed for !x2APIC. This saves around a second of boot time on the real hardware for x2APIC. Sponsored by: The FreeBSD Foundation
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@ -525,19 +525,21 @@ native_lapic_init(vm_paddr_t addr)
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*/
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KASSERT((cpu_feature & CPUID_TSC) != 0 && tsc_freq != 0,
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("TSC not initialized"));
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r = rdtsc();
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for (rx = 0; rx < LOOPS; rx++) {
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(void)lapic_read_icr_lo();
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ia32_pause();
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}
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r = rdtsc() - r;
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r1 = tsc_freq * LOOPS;
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r2 = r * 1000000;
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lapic_ipi_wait_mult = r1 >= r2 ? r1 / r2 : 1;
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if (bootverbose) {
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printf("LAPIC: ipi_wait() us multiplier %ju (r %ju tsc %ju)\n",
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(uintmax_t)lapic_ipi_wait_mult, (uintmax_t)r,
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(uintmax_t)tsc_freq);
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if (!x2apic_mode) {
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r = rdtsc();
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for (rx = 0; rx < LOOPS; rx++) {
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(void)lapic_read_icr_lo();
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ia32_pause();
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}
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r = rdtsc() - r;
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r1 = tsc_freq * LOOPS;
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r2 = r * 1000000;
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lapic_ipi_wait_mult = r1 >= r2 ? r1 / r2 : 1;
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if (bootverbose) {
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printf("LAPIC: ipi_wait() us multiplier %ju (r %ju "
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"tsc %ju)\n", (uintmax_t)lapic_ipi_wait_mult,
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(uintmax_t)r, (uintmax_t)tsc_freq);
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}
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}
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#undef LOOPS
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#endif /* SMP */
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