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Hmmmm... This can't be right... But it looks like the DL100xx chips

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don't have one of the clock cycles (the turn cycle) that the AX88x90
chips have.  Make this conditional.  But this seems totally crazy and
can't possibly be right.  Commit the fix for the moment until I can
explore this mystery more deeply.

On the plus side, the DL10022-based cards I have (D-Link DEF-670TXD
and SMC8040TX) work after this fix.
This commit is contained in:
Warner Losh 2009-03-31 01:59:47 +00:00
parent 9cf4fe2ebe
commit f16f1caffc
1 changed files with 3 additions and 1 deletions

4
sys/dev/ed/if_ed_pccard.c

@ -1115,7 +1115,9 @@ ed_miibus_readreg(device_t dev, int phy, int reg)
(*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
(*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
(*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
(*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
if (sc->chip_type == ED_CHIP_TYPE_AX88790 ||
sc->chip_type == ED_CHIP_TYPE_AX88190)
(*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
(*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);