Bring over AR5416 specific RX filter get/set routines.
This in particular fixes radar PHY handling - on the AR5212 NIC, one enables the AR_PHY_ERR_RADAR bit in AR_PHY_ERR; the AR5416 and later also needs a bit set in AR_RX_FILTER. A follow-up commit is needed to convert the AR5416 ANI code to use this particular method, as it's currently using the AR5212 methods directly. Obtained from: Atheros Approved by: re (kib)
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@ -218,6 +218,8 @@ extern HAL_BOOL ar5416ResetKeyCacheEntry(struct ath_hal *ah, uint16_t entry);
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extern HAL_BOOL ar5416SetKeyCacheEntry(struct ath_hal *ah, uint16_t entry,
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const HAL_KEYVAL *k, const uint8_t *mac, int xorKey);
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extern uint32_t ar5416GetRxFilter(struct ath_hal *ah);
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extern void ar5416SetRxFilter(struct ath_hal *ah, uint32_t bits);
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extern void ar5416StartPcuReceive(struct ath_hal *ah);
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extern void ar5416StopPcuReceive(struct ath_hal *ah);
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extern HAL_BOOL ar5416SetupRxDesc(struct ath_hal *,
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@ -117,6 +117,8 @@ ar5416InitState(struct ath_hal_5416 *ahp5416, uint16_t devid, HAL_SOFTC sc,
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ah->ah_resetTxQueue = ar5416ResetTxQueue;
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/* Receive Functions */
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ah->ah_getRxFilter = ar5416GetRxFilter;
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ah->ah_setRxFilter = ar5416SetRxFilter;
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ah->ah_startPcuReceive = ar5416StartPcuReceive;
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ah->ah_stopPcuReceive = ar5416StopPcuReceive;
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ah->ah_setupRxDesc = ar5416SetupRxDesc;
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@ -26,6 +26,46 @@
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#include "ar5416/ar5416reg.h"
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#include "ar5416/ar5416desc.h"
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/*
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* Get the receive filter.
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*/
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uint32_t
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ar5416GetRxFilter(struct ath_hal *ah)
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{
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uint32_t bits = OS_REG_READ(ah, AR_RX_FILTER);
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uint32_t phybits = OS_REG_READ(ah, AR_PHY_ERR);
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if (phybits & AR_PHY_ERR_RADAR)
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bits |= HAL_RX_FILTER_PHYRADAR;
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if (phybits & (AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING))
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bits |= HAL_RX_FILTER_PHYERR;
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return bits;
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}
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/*
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* Set the receive filter.
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*/
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void
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ar5416SetRxFilter(struct ath_hal *ah, u_int32_t bits)
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{
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uint32_t phybits;
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OS_REG_WRITE(ah, AR_RX_FILTER, (bits & 0xffff));
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phybits = 0;
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if (bits & HAL_RX_FILTER_PHYRADAR)
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phybits |= AR_PHY_ERR_RADAR;
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if (bits & HAL_RX_FILTER_PHYERR)
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phybits |= AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING;
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OS_REG_WRITE(ah, AR_PHY_ERR, phybits);
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if (phybits) {
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OS_REG_WRITE(ah, AR_RXCFG,
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OS_REG_READ(ah, AR_RXCFG) | AR_RXCFG_ZLFDMA);
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} else {
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OS_REG_WRITE(ah, AR_RXCFG,
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OS_REG_READ(ah, AR_RXCFG) &~ AR_RXCFG_ZLFDMA);
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}
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}
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/*
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* Start receive at the PCU engine
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*/
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