MFC r274818:
Merge from CheriBSD (3422ebe71b6c06fe78b1be73623b240c219e08e3): Rename beripic to beripic0. Sponsored by: DARPA, AFRL
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@ -97,7 +97,7 @@
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reg = <0x0 0x4000000>; // 64M at 0x0
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};
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beripic: beripic@7f804000 {
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beripic0: beripic@7f804000 {
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compatible = "sri-cambridge,beri-pic";
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interrupt-controller;
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#address-cells = <0>;
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@ -115,7 +115,7 @@
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compatible = "altera,jtag_uart-11_0";
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reg = <0x7f000000 0x40>;
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interrupts = <0>;
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interrupt-parent = <&beripic>;
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interrupt-parent = <&beripic0>;
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};
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serial@7f001000 {
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@ -97,7 +97,7 @@
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reg = <0x0 0x40000000>; // 1G at 0x0
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};
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beripic: beripic@7f804000 {
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beripic0: beripic@7f804000 {
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compatible = "sri-cambridge,beri-pic";
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interrupt-controller;
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#address-cells = <0>;
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@ -117,14 +117,14 @@
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reg-shift = <2>;
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clock-frequency = <50000000>;
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interrupts = <6>;
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interrupt-parent = <&beripic>;
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interrupt-parent = <&beripic0>;
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};
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serial@7f000000 {
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compatible = "altera,jtag_uart-11_0";
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reg = <0x7f000000 0x40>;
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interrupts = <0>;
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interrupt-parent = <&beripic>;
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interrupt-parent = <&beripic0>;
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};
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serial@7f001000 {
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@ -198,7 +198,7 @@
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0x7f007420 0x20>;
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// RX, TX
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interrupts = <1 2>;
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interrupt-parent = <&beripic>;
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interrupt-parent = <&beripic0>;
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};
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ethernet@7f005000 {
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@ -211,7 +211,7 @@
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0x7f005420 0x20>;
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// RX, TX
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interrupts = <11 12>;
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interrupt-parent = <&beripic>;
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interrupt-parent = <&beripic0>;
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};
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touchscreen@70400000 {
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@ -227,7 +227,7 @@
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0x7f140000 0x4>;
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// IRQ 4 is DC, IRQ 5 is HC.
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interrupts = <4 5>;
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interrupt-parent = <&beripic>;
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interrupt-parent = <&beripic0>;
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};
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avgen@0x7f009000 {
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