MFC r274818:

Merge from CheriBSD (3422ebe71b6c06fe78b1be73623b240c219e08e3):

Rename beripic to beripic0.

Sponsored by:	DARPA, AFRL
This commit is contained in:
brooks 2014-12-02 20:28:05 +00:00
parent 67bd86774a
commit f27f3e0e8e
2 changed files with 8 additions and 8 deletions

View File

@ -97,7 +97,7 @@
reg = <0x0 0x4000000>; // 64M at 0x0
};
beripic: beripic@7f804000 {
beripic0: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
@ -115,7 +115,7 @@
compatible = "altera,jtag_uart-11_0";
reg = <0x7f000000 0x40>;
interrupts = <0>;
interrupt-parent = <&beripic>;
interrupt-parent = <&beripic0>;
};
serial@7f001000 {

View File

@ -97,7 +97,7 @@
reg = <0x0 0x40000000>; // 1G at 0x0
};
beripic: beripic@7f804000 {
beripic0: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
@ -117,14 +117,14 @@
reg-shift = <2>;
clock-frequency = <50000000>;
interrupts = <6>;
interrupt-parent = <&beripic>;
interrupt-parent = <&beripic0>;
};
serial@7f000000 {
compatible = "altera,jtag_uart-11_0";
reg = <0x7f000000 0x40>;
interrupts = <0>;
interrupt-parent = <&beripic>;
interrupt-parent = <&beripic0>;
};
serial@7f001000 {
@ -198,7 +198,7 @@
0x7f007420 0x20>;
// RX, TX
interrupts = <1 2>;
interrupt-parent = <&beripic>;
interrupt-parent = <&beripic0>;
};
ethernet@7f005000 {
@ -211,7 +211,7 @@
0x7f005420 0x20>;
// RX, TX
interrupts = <11 12>;
interrupt-parent = <&beripic>;
interrupt-parent = <&beripic0>;
};
touchscreen@70400000 {
@ -227,7 +227,7 @@
0x7f140000 0x4>;
// IRQ 4 is DC, IRQ 5 is HC.
interrupts = <4 5>;
interrupt-parent = <&beripic>;
interrupt-parent = <&beripic0>;
};
avgen@0x7f009000 {