Ensure the caches have the desired configuration (see especially

cheetah_cache_enable()).
This commit is contained in:
Marius Strobl 2008-09-04 20:08:21 +00:00
parent 597b17a0e0
commit f2ac8af4bc
2 changed files with 2 additions and 0 deletions

View File

@ -374,6 +374,7 @@ sparc64_init(caddr_t mdp, u_long o1, u_long o2, u_long o3, ofw_vec_t *vec)
}
cache_init(pc);
cache_enable();
uma_set_align(pc->pc_cache.dc_linesize - 1);
cpu_block_copy = bcopy;

View File

@ -386,6 +386,7 @@ cpu_mp_bootstrap(struct pcpu *pc)
csa = &cpu_start_args;
if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
cheetah_init();
cache_enable();
pmap_map_tsb();
/*
* Flush all non-locked TLB entries possibly left over by the