Convert fxp(4) to use the new bus_alloc_resources() API, it simplifies
the resource allocation code significantly.
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79870ba40b
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@ -282,6 +282,18 @@ DRIVER_MODULE(fxp, pci, fxp_driver, fxp_devclass, 0, 0);
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DRIVER_MODULE(fxp, cardbus, fxp_driver, fxp_devclass, 0, 0);
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DRIVER_MODULE(miibus, fxp, miibus_driver, miibus_devclass, 0, 0);
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static struct resource_spec fxp_res_spec_mem[] = {
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{ SYS_RES_MEMORY, FXP_PCI_MMBA, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
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{ -1, 0 }
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};
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static struct resource_spec fxp_res_spec_io[] = {
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{ SYS_RES_IOPORT, FXP_PCI_IOBA, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
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{ -1, 0 }
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};
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/*
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* Wait for the previous command to be accepted (but not necessarily
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* completed).
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@ -381,7 +393,7 @@ fxp_attach(device_t dev)
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uint32_t val;
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uint16_t data, myea[ETHER_ADDR_LEN / 2];
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u_char eaddr[ETHER_ADDR_LEN];
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int i, rid, m1, m2, prefer_iomap;
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int i, prefer_iomap;
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int error;
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error = 0;
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@ -411,48 +423,31 @@ fxp_attach(device_t dev)
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* We default to memory mapping. Then we accept an override from the
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* command line. Then we check to see which one is enabled.
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*/
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m1 = PCIM_CMD_MEMEN;
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m2 = PCIM_CMD_PORTEN;
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prefer_iomap = 0;
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"prefer_iomap", &prefer_iomap) == 0 && prefer_iomap != 0) {
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m1 = PCIM_CMD_PORTEN;
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m2 = PCIM_CMD_MEMEN;
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}
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resource_int_value(device_get_name(dev), device_get_unit(dev),
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"prefer_iomap", &prefer_iomap);
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if (prefer_iomap)
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sc->fxp_spec = fxp_res_spec_io;
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else
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sc->fxp_spec = fxp_res_spec_mem;
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sc->rtp = (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
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sc->rgd = (m1 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA;
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sc->mem = bus_alloc_resource_any(dev, sc->rtp, &sc->rgd, RF_ACTIVE);
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if (sc->mem == NULL) {
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sc->rtp =
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(m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
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sc->rgd = (m2 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA;
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sc->mem = bus_alloc_resource_any(dev, sc->rtp, &sc->rgd,
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RF_ACTIVE);
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error = bus_alloc_resources(dev, sc->fxp_spec, sc->fxp_res);
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if (error) {
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if (sc->fxp_spec == fxp_res_spec_mem)
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sc->fxp_spec = fxp_res_spec_io;
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else
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sc->fxp_spec = fxp_res_spec_mem;
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error = bus_alloc_resources(dev, sc->fxp_spec, sc->fxp_res);
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}
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if (!sc->mem) {
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if (error) {
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device_printf(dev, "could not allocate resources\n");
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error = ENXIO;
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goto fail;
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}
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}
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if (bootverbose) {
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device_printf(dev, "using %s space register mapping\n",
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sc->rtp == SYS_RES_MEMORY? "memory" : "I/O");
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}
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sc->sc_st = rman_get_bustag(sc->mem);
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sc->sc_sh = rman_get_bushandle(sc->mem);
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/*
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* Allocate our interrupt.
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*/
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rid = 0;
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sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_SHAREABLE | RF_ACTIVE);
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if (sc->irq == NULL) {
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device_printf(dev, "could not map interrupt\n");
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error = ENXIO;
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goto fail;
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sc->fxp_spec == fxp_res_spec_mem ? "memory" : "I/O");
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}
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/*
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@ -806,7 +801,7 @@ fxp_attach(device_t dev)
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/*
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* Hook our interrupt after all initialization is complete.
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*/
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error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
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error = bus_setup_intr(dev, sc->fxp_res[1], INTR_TYPE_NET | INTR_MPSAFE,
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fxp_intr, sc, &sc->ih);
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if (error) {
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device_printf(dev, "could not setup irq\n");
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@ -851,10 +846,7 @@ fxp_release(struct fxp_softc *sc)
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bus_dmamap_unload(sc->mcs_tag, sc->mcs_map);
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bus_dmamem_free(sc->mcs_tag, sc->mcsp, sc->mcs_map);
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}
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if (sc->irq)
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bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq);
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if (sc->mem)
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bus_release_resource(sc->dev, sc->rtp, sc->rgd, sc->mem);
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bus_release_resources(sc->dev, sc->fxp_spec, sc->fxp_res);
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if (sc->fxp_mtag) {
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for (i = 0; i < FXP_NRFABUFS; i++) {
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rxp = &sc->fxp_desc.rx_list[i];
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@ -918,7 +910,7 @@ fxp_detach(device_t dev)
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* Unhook interrupt before dropping lock. This is to prevent
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* races with fxp_intr().
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*/
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bus_teardown_intr(sc->dev, sc->irq, sc->ih);
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bus_teardown_intr(sc->dev, sc->fxp_res[1], sc->ih);
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sc->ih = NULL;
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/* Release our allocated resources. */
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@ -142,14 +142,10 @@ struct fxp_desc_list {
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*/
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struct fxp_softc {
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struct ifnet *ifp; /* per-interface network data */
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struct resource *mem; /* resource descriptor for registers */
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int rtp; /* register resource type */
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int rgd; /* register descriptor in use */
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struct resource *irq; /* resource descriptor for interrupt */
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struct resource *fxp_res[2]; /* I/O and IRQ resources */
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struct resource_spec *fxp_spec; /* the resource spec we used */
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void *ih; /* interrupt handler cookie */
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struct mtx sc_mtx;
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bus_space_tag_t sc_st; /* bus space tag */
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bus_space_handle_t sc_sh; /* bus space handle */
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bus_dma_tag_t fxp_mtag; /* bus DMA tag for mbufs */
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bus_dma_tag_t fxp_stag; /* bus DMA tag for stats */
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bus_dmamap_t fxp_smap; /* bus DMA map for stats */
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@ -198,15 +194,9 @@ struct fxp_softc {
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#define FXP_FLAG_SAVE_BAD 0x0800 /* save bad pkts: bad size, CRC, etc */
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/* Macros to ease CSR access. */
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_READ_2(sc, reg) \
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bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
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#define CSR_WRITE_1(sc, reg, val) \
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bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_WRITE_2(sc, reg, val) \
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bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
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#define CSR_READ_1(sc, reg) bus_read_1(sc->fxp_res[0], reg)
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#define CSR_READ_2(sc, reg) bus_read_2(sc->fxp_res[0], reg)
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#define CSR_READ_4(sc, reg) bus_read_4(sc->fxp_res[0], reg)
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#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->fxp_res[0], reg, val)
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#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->fxp_res[0], reg, val)
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#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->fxp_res[0], reg, val)
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