Move code macros from if_sis*reg*.h to if_sis.*c*
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@ -100,6 +100,22 @@ MODULE_DEPEND(sis, miibus, 1, 1, 1);
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/* "controller miibus0" required. See GENERIC if you get errors here. */
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/* "controller miibus0" required. See GENERIC if you get errors here. */
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#include "miibus_if.h"
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#include "miibus_if.h"
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#define SIS_LOCK(_sc) mtx_lock(&(_sc)->sis_mtx)
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#define SIS_UNLOCK(_sc) mtx_unlock(&(_sc)->sis_mtx)
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#define SIS_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sis_mtx, MA_OWNED)
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/*
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* register space access macros
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*/
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4(sc->sis_btag, sc->sis_bhandle, reg, val)
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4(sc->sis_btag, sc->sis_bhandle, reg)
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#define CSR_READ_2(sc, reg) \
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bus_space_read_2(sc->sis_btag, sc->sis_bhandle, reg)
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/*
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/*
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* Various supported device vendors/types and their names.
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* Various supported device vendors/types and their names.
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*/
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*/
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@ -466,22 +466,6 @@ struct sis_softc {
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struct mtx sis_mtx;
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struct mtx sis_mtx;
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};
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};
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#define SIS_LOCK(_sc) mtx_lock(&(_sc)->sis_mtx)
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#define SIS_UNLOCK(_sc) mtx_unlock(&(_sc)->sis_mtx)
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#define SIS_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sis_mtx, MA_OWNED)
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/*
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* register space access macros
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*/
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4(sc->sis_btag, sc->sis_bhandle, reg, val)
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4(sc->sis_btag, sc->sis_bhandle, reg)
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#define CSR_READ_2(sc, reg) \
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bus_space_read_2(sc->sis_btag, sc->sis_bhandle, reg)
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#define SIS_TIMEOUT 1000
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#define SIS_TIMEOUT 1000
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#define ETHER_ALIGN 2
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#define ETHER_ALIGN 2
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#define SIS_RXLEN 1536
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#define SIS_RXLEN 1536
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