MFp4: Merge in AX88790 support from my p4 tree. I've had this in my
tree since 2003/02/20, and I recently cleaned it up. I'd even closed the PR that I obtained this from Fri Jul 18 23:25:08 MDT 2003 since I looked at my p4 tree. PR: 46889 Submitted by: HASEGAWA Tomoki
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@ -477,13 +477,17 @@ ed_pccard_ax88190(device_t dev)
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iobase = rman_get_start(sc->port_res);
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ed_pccard_memwrite(dev, ED_AX88190_IOBASE0, iobase & 0xff);
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ed_pccard_memwrite(dev, ED_AX88190_IOBASE1, (iobase >> 8) & 0xff);
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sc->type_str = "AX88190";
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if (ed_asic_inb(sc, ED_ASIX_TEST) != 0) {
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ed_pccard_memwrite(dev, ED_AX88790_CSR, ED_AX88790_CSR_PWRDWN);
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sc->type_str = "AX88790";
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}
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ax88190_geteprom(sc);
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ed_release_resources(dev);
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error = ed_probe_Novell(dev, 0, flags);
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if (error == 0) {
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sc->vendor = ED_VENDOR_NOVELL;
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sc->type = ED_TYPE_NE2000;
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sc->type_str = "AX88190";
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}
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return (error);
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}
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@ -1117,12 +1117,22 @@ struct ed_ring {
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#define ED_CHIP_TYPE_DL100XX 0x03
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/*
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* AX88190 IOBASE registers.
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* AX88190 configuration status register.
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*/
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#define ED_AX88790_CSR 0x3c2
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#define ED_AX88790_CSR_PWRDWN 0x04
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/*
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* AX88190 IOBASE registers, I'm pretty sure these don't need to be written
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* to to make the card work by ed.
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*/
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#define ED_AX88190_IOBASE0 0x3ca
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#define ED_AX88190_IOBASE1 0x3cc
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/*
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* Test for AX88790 vs 88190 cards.
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*/
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#define ED_ASIX_TEST 0x05
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/*
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* MII bus definitions.
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*/
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