diff --git a/sys/ia64/ia64/interrupt.c b/sys/ia64/ia64/interrupt.c index 6b82a7ca5d20..720dbee1f688 100644 --- a/sys/ia64/ia64/interrupt.c +++ b/sys/ia64/ia64/interrupt.c @@ -207,11 +207,12 @@ struct ia64_intr { volatile long *cntp; /* interrupt counter */ }; -static struct sapic *ia64_sapics[16]; /* XXX make this resizable */ -static int ia64_sapic_count; static struct mtx ia64_intrs_lock; static struct ia64_intr *ia64_intrs[256]; +extern struct sapic *ia64_sapics[]; +extern int ia64_sapic_count; + static void ithds_init(void *dummy) { @@ -220,13 +221,6 @@ ithds_init(void *dummy) } SYSINIT(ithds_init, SI_SUB_INTR, SI_ORDER_SECOND, ithds_init, NULL); -void -ia64_add_sapic(struct sapic *sa) -{ - - ia64_sapics[ia64_sapic_count++] = sa; -} - static void ia64_enable(int vector) { @@ -235,14 +229,11 @@ ia64_enable(int vector) irq = vector - IA64_HARDWARE_IRQ_BASE; for (i = 0; i < ia64_sapic_count; i++) { struct sapic *sa = ia64_sapics[i]; - if (irq >= sa->sa_base && irq <= sa->sa_limit) - sapic_enable(sa, irq - sa->sa_base, vector, - (irq < 16 - ? SAPIC_TRIGGER_EDGE - : SAPIC_TRIGGER_LEVEL), - (irq < 16 - ? SAPIC_POLARITY_HIGH - : SAPIC_POLARITY_LOW)); + if (irq < sa->sa_base || irq > sa->sa_limit) + continue; + sapic_enable(sa, irq - sa->sa_base, vector, + (irq < 16) ? SAPIC_TRIGGER_EDGE : SAPIC_TRIGGER_LEVEL, + (irq < 16) ? SAPIC_POLARITY_HIGH : SAPIC_POLARITY_LOW); } } diff --git a/sys/ia64/ia64/sapic.c b/sys/ia64/ia64/sapic.c index 0952da0d1427..6307f689bab6 100644 --- a/sys/ia64/ia64/sapic.c +++ b/sys/ia64/ia64/sapic.c @@ -37,9 +37,18 @@ #include #include #include +#include static MALLOC_DEFINE(M_SAPIC, "sapic", "I/O SAPIC devices"); +static int sysctl_machdep_apic(SYSCTL_HANDLER_ARGS); + +SYSCTL_OID(_machdep, OID_AUTO, apic, CTLTYPE_STRING|CTLFLAG_RD, + NULL, 0, sysctl_machdep_apic, "A", "(x)APIC redirection table entries"); + +struct sapic *ia64_sapics[16]; /* XXX make this resizable */ +int ia64_sapic_count; + u_int64_t ia64_lapic_address = PAL_PIB_DEFAULT_ADDR; struct sapic_rte { @@ -78,11 +87,8 @@ sapic_write(struct sapic *sa, int which, u_int32_t value) ia64_mf(); } -#ifdef DDB - static void -sapic_read_rte(struct sapic *sa, int which, - struct sapic_rte *rte) +sapic_read_rte(struct sapic *sa, int which, struct sapic_rte *rte) { u_int32_t *p = (u_int32_t *) rte; register_t c; @@ -93,8 +99,6 @@ sapic_read_rte(struct sapic *sa, int which, intr_restore(c); } -#endif - static void sapic_write_rte(struct sapic *sa, int which, struct sapic_rte *rte) @@ -125,7 +129,7 @@ sapic_create(int id, int base, u_int64_t address) max = (sapic_read(sa, SAPIC_VERSION) >> 16) & 0xff; sa->sa_limit = base + max; - ia64_add_sapic(sa); + ia64_sapics[ia64_sapic_count++] = sa; return sa; } @@ -156,6 +160,46 @@ sapic_eoi(struct sapic *sa, int vector) ia64_mf(); } +static int +sysctl_machdep_apic(SYSCTL_HANDLER_ARGS) +{ + char buf[80]; + struct sapic_rte rte; + struct sapic *sa; + int apic, count, error, index, len; + + len = sprintf(buf, "\n APIC Idx: Id,EId : RTE\n"); + error = SYSCTL_OUT(req, buf, len); + if (error) + return (error); + + for (apic = 0; apic < ia64_sapic_count; apic++) { + sa = ia64_sapics[apic]; + count = sa->sa_limit - sa->sa_base + 1; + for (index = 0; index < count; index++) { + sapic_read_rte(sa, index, &rte); + if (rte.rte_mask != 0) + continue; + len = sprintf(buf, + " 0x%02x %3d: (%02x,%02x): %3d %d %d %s %s %s %s %s\n", + sa->sa_id, index, + rte.rte_destination_id, rte.rte_destination_eid, + rte.rte_vector, rte.rte_delivery_mode, + rte.rte_destination_mode, + rte.rte_delivery_status ? "DS" : " ", + rte.rte_polarity ? "low-active " : "high-active", + rte.rte_rirr ? "RIRR" : " ", + rte.rte_trigger_mode ? "level" : "edge ", + rte.rte_flushen ? "F" : " "); + error = SYSCTL_OUT(req, buf, len); + if (error) + return (error); + } + } + + return (0); +} + #ifdef DDB #include