From f750a7edaad3fdb32cc11982d65cc650fe444ba5 Mon Sep 17 00:00:00 2001 From: Conrad Meyer Date: Sat, 19 Dec 2015 20:47:15 +0000 Subject: [PATCH] x86: Detect feature flags "CLWB" and "PCOMMIT" "The availability of CLWB instruction is indicated by the presence of the CPUID feature flag CLWB (bit 24 of the EBX register)." CLWB is similar to CLFLUSHOPT, except that it is not required to discard cacheline contents. "On processors that supports PCOMMIT, PCOMMIT is enumerated through CPUID (CPUID.7.0.EBX[22]) only when the feature is enabled by BIOS." PCOMMIT is used to cause store-to-memory operations to become persistent (protected from power failure). Sponsored by: EMC / Isilon Storage Division --- sys/x86/x86/identcpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index ae72121bacca..db17162b215f 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -916,7 +916,9 @@ printcpuinfo(void) "\024ADX" /* Supervisor Mode Access Prevention */ "\025SMAP" + "\027PCOMMIT" "\030CLFLUSHOPT" + "\031CLWB" "\032PROCTRACE" "\033AVX512PF" "\034AVX512ER"