From f7749f924c582c8901c0a1004f4d3911f4032e13 Mon Sep 17 00:00:00 2001 From: Peter Wemm Date: Sat, 7 Sep 2002 07:02:12 +0000 Subject: [PATCH] Automatically enable CPU_ENABLE_SSE (detect and enable SSE instructions) if compiling with I686_CPU as a target. CPU_DISABLE_SSE will prevent this from happening and will guarantee the code is not compiled in. I am still not happy with this, but gcc is now generating code that uses these instructions if you set CPUTYPE to p3/p4 or athlon-4/mp/xp or higher. --- sys/amd64/amd64/fpu.c | 7 +++++++ sys/amd64/amd64/initcpu.c | 7 +++++++ sys/amd64/amd64/machdep.c | 7 +++++++ sys/amd64/isa/npx.c | 7 +++++++ sys/conf/options.i386 | 1 + sys/conf/options.pc98 | 1 + sys/i386/conf/NOTES | 5 ++++- sys/i386/i386/initcpu.c | 7 +++++++ sys/i386/i386/machdep.c | 7 +++++++ sys/i386/isa/npx.c | 7 +++++++ sys/i386/linux/linux_ptrace.c | 11 ++++++++++- sys/pc98/i386/machdep.c | 7 +++++++ sys/pc98/pc98/machdep.c | 7 +++++++ 13 files changed, 79 insertions(+), 2 deletions(-) diff --git a/sys/amd64/amd64/fpu.c b/sys/amd64/amd64/fpu.c index 22a0282a114c..956d2f285eb3 100644 --- a/sys/amd64/amd64/fpu.c +++ b/sys/amd64/amd64/fpu.c @@ -88,6 +88,13 @@ #include #endif +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + /* * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. */ diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 29ff724c61d0..7bc83f87d6d8 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -40,6 +40,13 @@ #include #include +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + void initializecpu(void); #if defined(I586_CPU) && defined(CPU_WT_ALLOC) void enable_K5_wt_alloc(void); diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c index 0ad6576b85be..89ca074ae861 100644 --- a/sys/amd64/amd64/machdep.c +++ b/sys/amd64/amd64/machdep.c @@ -130,6 +130,13 @@ extern void initializecpu(void); #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + static void cpu_startup(void *); #ifdef CPU_ENABLE_SSE static void set_fpregs_xmm(struct save87 *, struct savexmm *); diff --git a/sys/amd64/isa/npx.c b/sys/amd64/isa/npx.c index 22a0282a114c..956d2f285eb3 100644 --- a/sys/amd64/isa/npx.c +++ b/sys/amd64/isa/npx.c @@ -88,6 +88,13 @@ #include #endif +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + /* * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. */ diff --git a/sys/conf/options.i386 b/sys/conf/options.i386 index 5c7413aa3285..a2350fecffe5 100644 --- a/sys/conf/options.i386 +++ b/sys/conf/options.i386 @@ -64,6 +64,7 @@ CYRIX_CACHE_REALLY_WORKS opt_cpu.h NO_MEMORY_HOLE opt_cpu.h CPU_ENABLE_SSE opt_cpu.h CPU_ATHLON_SSE_HACK opt_cpu.h +CPU_DISABLE_SSE opt_cpu.h # The CPU type affects the endian conversion functions all over the kernel. I386_CPU opt_global.h diff --git a/sys/conf/options.pc98 b/sys/conf/options.pc98 index 98ba0cca27ce..3d53778df9bc 100644 --- a/sys/conf/options.pc98 +++ b/sys/conf/options.pc98 @@ -62,6 +62,7 @@ CYRIX_CACHE_REALLY_WORKS opt_cpu.h NO_MEMORY_HOLE opt_cpu.h CPU_ENABLE_SSE opt_cpu.h CPU_ATHLON_SSE_HACK opt_cpu.h +CPU_DISABLE_SSE opt_cpu.h # The CPU type affects the endian conversion functions all over the kernel. I386_CPU opt_global.h diff --git a/sys/i386/conf/NOTES b/sys/i386/conf/NOTES index e18e9c991fba..6c2ed44cbf0c 100644 --- a/sys/i386/conf/NOTES +++ b/sys/i386/conf/NOTES @@ -87,7 +87,9 @@ cpu I686_CPU # aka Pentium Pro(tm) # # CPU_ELAN enables support for AMDs ElanSC520 CPU. # -# CPU_ENABLE_SSE enables SSE/MMX2 instructions support. +# CPU_ENABLE_SSE enables SSE/MMX2 instructions support. This is default +# on I686_CPU and above. +# CPU_DISABLE_SSE explicitly prevent I686_CPU from turning on SSE. # # CPU_FASTER_5X86_FPU enables faster FPU exception handler. # @@ -155,6 +157,7 @@ options CPU_DIRECT_MAPPED_CACHE options CPU_DISABLE_5X86_LSSER options CPU_ELAN options CPU_ENABLE_SSE +#options CPU_DISABLE_SSE options CPU_FASTER_5X86_FPU options CPU_I486_ON_386 options CPU_IORT diff --git a/sys/i386/i386/initcpu.c b/sys/i386/i386/initcpu.c index 29ff724c61d0..7bc83f87d6d8 100644 --- a/sys/i386/i386/initcpu.c +++ b/sys/i386/i386/initcpu.c @@ -40,6 +40,13 @@ #include #include +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + void initializecpu(void); #if defined(I586_CPU) && defined(CPU_WT_ALLOC) void enable_K5_wt_alloc(void); diff --git a/sys/i386/i386/machdep.c b/sys/i386/i386/machdep.c index 0ad6576b85be..89ca074ae861 100644 --- a/sys/i386/i386/machdep.c +++ b/sys/i386/i386/machdep.c @@ -130,6 +130,13 @@ extern void initializecpu(void); #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + static void cpu_startup(void *); #ifdef CPU_ENABLE_SSE static void set_fpregs_xmm(struct save87 *, struct savexmm *); diff --git a/sys/i386/isa/npx.c b/sys/i386/isa/npx.c index 22a0282a114c..956d2f285eb3 100644 --- a/sys/i386/isa/npx.c +++ b/sys/i386/isa/npx.c @@ -88,6 +88,13 @@ #include #endif +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + /* * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. */ diff --git a/sys/i386/linux/linux_ptrace.c b/sys/i386/linux/linux_ptrace.c index f5e47f997231..a4dc91aed86f 100644 --- a/sys/i386/linux/linux_ptrace.c +++ b/sys/i386/linux/linux_ptrace.c @@ -28,6 +28,8 @@ * $FreeBSD$ */ +#include "opt_cpu.h" + #include #include #include @@ -46,6 +48,13 @@ #include #include +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + /* * Linux ptrace requests numbers. Mostly identical to FreeBSD, * except for MD ones and PT_ATTACH/PT_DETACH. @@ -334,7 +343,7 @@ linux_ptrace(struct thread *td, struct linux_ptrace_args *uap) } break; case PTRACE_SETFPXREGS: -#ifdef CPU_ENABLE_SSA +#ifdef CPU_ENABLE_SSE error = copyin((caddr_t)uap->data, &r.fpxreg, sizeof(r.fpxreg)); if (error) diff --git a/sys/pc98/i386/machdep.c b/sys/pc98/i386/machdep.c index 8e8f5c796db3..a45c57fcfcc6 100644 --- a/sys/pc98/i386/machdep.c +++ b/sys/pc98/i386/machdep.c @@ -135,6 +135,13 @@ extern void initializecpu(void); #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + static void cpu_startup(void *); #ifdef CPU_ENABLE_SSE static void set_fpregs_xmm(struct save87 *, struct savexmm *); diff --git a/sys/pc98/pc98/machdep.c b/sys/pc98/pc98/machdep.c index 8e8f5c796db3..a45c57fcfcc6 100644 --- a/sys/pc98/pc98/machdep.c +++ b/sys/pc98/pc98/machdep.c @@ -135,6 +135,13 @@ extern void initializecpu(void); #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif +#if defined(CPU_DISABLE_SSE) +#undef CPU_ENABLE_SSE +#endif + static void cpu_startup(void *); #ifdef CPU_ENABLE_SSE static void set_fpregs_xmm(struct save87 *, struct savexmm *);