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When switching IBRS on, also enable STIBP (Single Thread Indirect

Browse Source 
Branch Predictors) mitigation.

DOcument 336996-001 promises that CPUs which implement IBRS but not
STIBP silently ignore setting of the bit instead of trapping.

Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
This commit is contained in:
Konstantin Belousov 2018-01-31 16:56:02 +00:00
parent b31b965e7c
commit f7f14d9dea
1 changed files with 2 additions and 2 deletions
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4
sys/amd64/amd64/support.S
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@ -875,8 +875,8 @@ ENTRY(handle_ibrs_entry)
cmpb $0,hw_ibrs_active(%rip)
je 1f
movl $MSR_IA32_SPEC_CTRL,%ecx
movl $IA32_SPEC_CTRL_IBRS,%eax
movl $IA32_SPEC_CTRL_IBRS>>32,%edx
movl $(IA32_SPEC_CTRL_IBRS|IA32_SPEC_CTRL_STIBP),%eax
movl $(IA32_SPEC_CTRL_IBRS|IA32_SPEC_CTRL_STIBP)>>32,%edx
wrmsr
movb $1,PCPU(IBPB_SET)
testl $CPUID_STDEXT_SMEP,cpu_stdext_feature(%rip)