Extend the section in which interrupts are disabled in the TLB demap
functions, otherwise if we get preempted after checking whether a certain pmap is active on the current CPU but before disabling interrupts we might operate on an outdated state as the pmap might have been deactivated in the meantime. As the same issue may arises when the TLB demap function is interrupted by a TLB demap IPI, just entering a critical section before the check isn't sufficient so we have to fully disable interrupts instead. MFC after: 3 days
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@ -80,15 +80,15 @@ tlb_context_demap(struct pmap *pm)
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*/
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PMAP_STATS_INC(tlb_ncontext_demap);
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cookie = ipi_tlb_context_demap(pm);
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s = intr_disable();
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if (pm->pm_active & PCPU_GET(cpumask)) {
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KASSERT(pm->pm_context[curcpu] != -1,
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("tlb_context_demap: inactive pmap?"));
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s = intr_disable();
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stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_DMMU_DEMAP, 0);
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stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_IMMU_DEMAP, 0);
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flush(KERNBASE);
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intr_restore(s);
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}
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intr_restore(s);
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ipi_wait(cookie);
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}
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@ -101,6 +101,7 @@ tlb_page_demap(struct pmap *pm, vm_offset_t va)
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PMAP_STATS_INC(tlb_npage_demap);
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cookie = ipi_tlb_page_demap(pm, va);
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s = intr_disable();
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if (pm->pm_active & PCPU_GET(cpumask)) {
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KASSERT(pm->pm_context[curcpu] != -1,
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("tlb_page_demap: inactive pmap?"));
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@ -109,12 +110,11 @@ tlb_page_demap(struct pmap *pm, vm_offset_t va)
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else
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flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE;
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s = intr_disable();
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stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0);
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stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0);
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flush(KERNBASE);
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intr_restore(s);
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}
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intr_restore(s);
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ipi_wait(cookie);
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}
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@ -128,6 +128,7 @@ tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end)
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PMAP_STATS_INC(tlb_nrange_demap);
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cookie = ipi_tlb_range_demap(pm, start, end);
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s = intr_disable();
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if (pm->pm_active & PCPU_GET(cpumask)) {
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KASSERT(pm->pm_context[curcpu] != -1,
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("tlb_range_demap: inactive pmap?"));
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@ -136,13 +137,12 @@ tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end)
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else
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flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE;
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s = intr_disable();
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for (va = start; va < end; va += PAGE_SIZE) {
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stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0);
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stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0);
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flush(KERNBASE);
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}
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intr_restore(s);
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}
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intr_restore(s);
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ipi_wait(cookie);
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}
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