If the receiver runs out of space for an received frame in the internal
FIFO or the in-RAM descriptors it will switch to RX_IDLE from where it is not restarted. We used to deal with RX_IDLE by doing a total reinit but this lost our link and caused a potential 30sec autonegotiation against switches. This was changed to a less heavyhanded approach, but this failed to restart the receiver it it were in the RX_IDLE state. This change adds the RX_IDLE and the RX_FIFO_OFLOW conditions as triggers for interrupts and receive side processing, and restarts the receiver when it is RX_IDLE. Remove the #ifdef notyet'ed nge_rxeoc() function. Sponsored by: Cybercity Internet, Denmark. MFC after: 7 days
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@ -160,9 +160,6 @@ static int nge_newbuf (struct nge_softc *,
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static int nge_encap (struct nge_softc *,
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struct mbuf *, u_int32_t *);
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static void nge_rxeof (struct nge_softc *);
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#ifdef notdef
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static void nge_rxeoc (struct nge_softc *);
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#endif
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static void nge_txeof (struct nge_softc *);
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static void nge_intr (void *);
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static void nge_tick (void *);
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@ -1348,20 +1345,6 @@ static void nge_rxeof(sc)
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return;
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}
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#ifdef notdef
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void nge_rxeoc(sc)
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struct nge_softc *sc;
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{
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struct ifnet *ifp;
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ifp = &sc->arpcom.ac_if;
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nge_rxeof(sc);
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ifp->if_flags &= ~IFF_RUNNING;
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nge_init(sc);
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return;
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}
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#endif
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/*
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* A frame was downloaded to the chip. It's safe for us to clean up
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* the list buffers.
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@ -1496,12 +1479,14 @@ static void nge_intr(arg)
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if ((status & NGE_ISR_RX_DESC_OK) ||
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(status & NGE_ISR_RX_ERR) ||
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(status & NGE_ISR_RX_OFLOW) ||
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(status & NGE_ISR_RX_FIFO_OFLOW) ||
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(status & NGE_ISR_RX_IDLE) ||
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(status & NGE_ISR_RX_OK))
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nge_rxeof(sc);
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#ifdef notdef
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if ((status & NGE_ISR_RX_OFLOW))
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nge_rxeoc(sc);
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#endif
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if ((status & NGE_ISR_RX_IDLE))
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NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
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if (status & NGE_ISR_SYSERR) {
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nge_reset(sc);
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ifp->if_flags &= ~IFF_RUNNING;
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@ -226,7 +226,8 @@
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#define NGE_INTRS \
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(NGE_IMR_RX_OFLOW|NGE_IMR_TX_UFLOW|NGE_IMR_TX_OK|\
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NGE_IMR_TX_IDLE|NGE_IMR_RX_OK|NGE_IMR_RX_ERR|\
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NGE_IMR_SYSERR|NGE_IMR_PHY_INTR)
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NGE_IMR_SYSERR|NGE_IMR_PHY_INTR|\
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NGE_IMR_RX_IDLE|NGE_IMR_RX_FIFO_OFLOW)
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/* Interrupt enable register */
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#define NGE_IER_INTRENB 0x00000001
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