If the receiver runs out of space for an received frame in the internal

FIFO or the in-RAM descriptors it will switch to RX_IDLE from where it
is not restarted.

We used to deal with RX_IDLE by doing a total reinit but this lost
our link and caused a potential 30sec autonegotiation against
switches.  This was changed to a less heavyhanded approach, but this
failed to restart the receiver it it were in the RX_IDLE state.

This change adds the RX_IDLE and the RX_FIFO_OFLOW conditions as
triggers for interrupts and receive side processing, and restarts
the receiver when it is RX_IDLE.

Remove the #ifdef notyet'ed nge_rxeoc() function.

Sponsored by:	Cybercity Internet, Denmark.
MFC after:	7 days
This commit is contained in:
phk 2002-04-13 21:33:33 +00:00
parent cad828b7af
commit f8dd9c1116
2 changed files with 8 additions and 22 deletions

View File

@ -160,9 +160,6 @@ static int nge_newbuf (struct nge_softc *,
static int nge_encap (struct nge_softc *,
struct mbuf *, u_int32_t *);
static void nge_rxeof (struct nge_softc *);
#ifdef notdef
static void nge_rxeoc (struct nge_softc *);
#endif
static void nge_txeof (struct nge_softc *);
static void nge_intr (void *);
static void nge_tick (void *);
@ -1348,20 +1345,6 @@ static void nge_rxeof(sc)
return;
}
#ifdef notdef
void nge_rxeoc(sc)
struct nge_softc *sc;
{
struct ifnet *ifp;
ifp = &sc->arpcom.ac_if;
nge_rxeof(sc);
ifp->if_flags &= ~IFF_RUNNING;
nge_init(sc);
return;
}
#endif
/*
* A frame was downloaded to the chip. It's safe for us to clean up
* the list buffers.
@ -1496,12 +1479,14 @@ static void nge_intr(arg)
if ((status & NGE_ISR_RX_DESC_OK) ||
(status & NGE_ISR_RX_ERR) ||
(status & NGE_ISR_RX_OFLOW) ||
(status & NGE_ISR_RX_FIFO_OFLOW) ||
(status & NGE_ISR_RX_IDLE) ||
(status & NGE_ISR_RX_OK))
nge_rxeof(sc);
#ifdef notdef
if ((status & NGE_ISR_RX_OFLOW))
nge_rxeoc(sc);
#endif
if ((status & NGE_ISR_RX_IDLE))
NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
if (status & NGE_ISR_SYSERR) {
nge_reset(sc);
ifp->if_flags &= ~IFF_RUNNING;

View File

@ -226,7 +226,8 @@
#define NGE_INTRS \
(NGE_IMR_RX_OFLOW|NGE_IMR_TX_UFLOW|NGE_IMR_TX_OK|\
NGE_IMR_TX_IDLE|NGE_IMR_RX_OK|NGE_IMR_RX_ERR|\
NGE_IMR_SYSERR|NGE_IMR_PHY_INTR)
NGE_IMR_SYSERR|NGE_IMR_PHY_INTR|\
NGE_IMR_RX_IDLE|NGE_IMR_RX_FIFO_OFLOW)
/* Interrupt enable register */
#define NGE_IER_INTRENB 0x00000001