Fix the nfarray offsets for the ar2133/ar5133 radio - (AR5416, AR9160, etc.)
The offsets didn't match the assumption that nfarray[] is ordered by the chainmask bits and programmed via the register order in ar5416_cca_regs[]. This repairs that damage and ensures that chain 1 is programmed correctly. (And extension channels will now be programmed correctly also.) This fixes some of the stuck beacons I've been seeing on my AR9160/AR5416 setups - because Chain 1 would be programmed -80 or -85 dBm, which is higher than the actual noise floor and thus convincing the radio that indeed it can't ever transmit.
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@ -386,12 +386,29 @@ ar2133GetChannelMaxMinPower(struct ath_hal *ah,
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#endif
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}
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/*
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* The ordering of nfarray is thus:
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*
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* nfarray[0]: Chain 0 ctl
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* nfarray[1]: Chain 1 ctl
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* nfarray[2]: Chain 2 ctl
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* nfarray[3]: Chain 0 ext
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* nfarray[4]: Chain 1 ext
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* nfarray[5]: Chain 2 ext
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*/
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static void
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ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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int16_t nf;
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/*
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* Blank nf array - some chips may only
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* have one or two RX chainmasks enabled.
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*/
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nfarray[0] = nfarray[1] = nfarray[2] = 0;
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nfarray[3] = nfarray[4] = nfarray[5] = 0;
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switch (ahp->ah_rx_chainmask) {
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case 0x7:
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nf = MS(OS_REG_READ(ah, AR_PHY_CH2_CCA), AR_PHY_CH2_MINCCA_PWR);
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@ -399,7 +416,7 @@ ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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nf = 0 - ((nf ^ 0x1ff) + 1);
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HALDEBUG(ah, HAL_DEBUG_NFCAL,
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"NF calibrated [ctl] [chain 2] is %d\n", nf);
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nfarray[4] = nf;
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nfarray[2] = nf;
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nf = MS(OS_REG_READ(ah, AR_PHY_CH2_EXT_CCA), AR_PHY_CH2_EXT_MINCCA_PWR);
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if (nf & 0x100)
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@ -415,7 +432,7 @@ ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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nf = 0 - ((nf ^ 0x1ff) + 1);
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HALDEBUG(ah, HAL_DEBUG_NFCAL,
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"NF calibrated [ctl] [chain 1] is %d\n", nf);
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nfarray[2] = nf;
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nfarray[1] = nf;
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nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR_PHY_CH1_EXT_MINCCA_PWR);
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@ -423,7 +440,7 @@ ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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nf = 0 - ((nf ^ 0x1ff) + 1);
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HALDEBUG(ah, HAL_DEBUG_NFCAL,
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"NF calibrated [ext] [chain 1] is %d\n", nf);
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nfarray[3] = nf;
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nfarray[4] = nf;
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/* fall thru... */
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case 0x1:
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nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);
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@ -438,7 +455,7 @@ ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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nf = 0 - ((nf ^ 0x1ff) + 1);
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HALDEBUG(ah, HAL_DEBUG_NFCAL,
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"NF calibrated [ext] [chain 0] is %d\n", nf);
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nfarray[1] = nf;
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nfarray[3] = nf;
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break;
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}
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@ -265,6 +265,16 @@ ar9280GetChannelMaxMinPower(struct ath_hal *ah,
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#endif
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}
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/*
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* The ordering of nfarray is thus:
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*
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* nfarray[0]: Chain 0 ctl
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* nfarray[1]: Chain 1 ctl
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* nfarray[2]: Chain 2 ctl
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* nfarray[3]: Chain 0 ext
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* nfarray[4]: Chain 1 ext
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* nfarray[5]: Chain 2 ext
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*/
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static void
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ar9280GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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{
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@ -297,6 +307,11 @@ ar9280GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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HALDEBUG(ah, HAL_DEBUG_NFCAL,
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"NF calibrated [ext] [chain 1] is %d\n", nf);
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nfarray[4] = nf;
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/* Chain 2 - invalid */
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nfarray[2] = 0;
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nfarray[5] = 0;
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}
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/*
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@ -28,6 +28,16 @@
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#include "ar5416/ar5416reg.h"
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#include "ar5416/ar5416phy.h"
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/*
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* The ordering of nfarray is thus:
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*
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* nfarray[0]: Chain 0 ctl
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* nfarray[1]: Chain 1 ctl
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* nfarray[2]: Chain 2 ctl
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* nfarray[3]: Chain 0 ext
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* nfarray[4]: Chain 1 ext
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* nfarray[5]: Chain 2 ext
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*/
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static void
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ar9285GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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{
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@ -40,7 +50,6 @@ ar9285GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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"NF calibrated [ctl] [chain 0] is %d\n", nf);
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nfarray[0] = nf;
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nfarray[1] = 0;
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nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR);
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if (nf & 0x100)
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@ -49,7 +58,13 @@ ar9285GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
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"NF calibrated [ext] [chain 0] is %d\n", nf);
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nfarray[3] = nf;
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/* Chain 1 - invalid */
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nfarray[1] = 0;
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nfarray[4] = 0;
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/* Chain 2 - invalid */
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nfarray[2] = 0;
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nfarray[5] = 0;
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}
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HAL_BOOL
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