diff --git a/sys/dev/jme/if_jme.c b/sys/dev/jme/if_jme.c index 647447032b83..d77b63fccea8 100644 --- a/sys/dev/jme/if_jme.c +++ b/sys/dev/jme/if_jme.c @@ -557,7 +557,7 @@ jme_map_intr_vector(struct jme_softc *sc) bzero(map, sizeof(map)); /* Map Tx interrupts source to MSI/MSIX vector 2. */ - map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] |= MSINUM_INTR_SOURCE(2, N_INTR_TXQ0_COMP); map[MSINUM_REG_INDEX(N_INTR_TXQ1_COMP)] |= MSINUM_INTR_SOURCE(2, N_INTR_TXQ1_COMP); @@ -579,37 +579,37 @@ jme_map_intr_vector(struct jme_softc *sc) MSINUM_INTR_SOURCE(2, N_INTR_TXQ_COAL_TO); /* Map Rx interrupts source to MSI/MSIX vector 1. */ - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COMP); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_DESC_EMPTY); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL); - map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL_TO); - map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] = + map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] |= MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL_TO); /* Map all other interrupts source to MSI/MSIX vector 0. */