From f9fc9faa3ae8207a35241395a440cd53e8c66d14 Mon Sep 17 00:00:00 2001 From: Andrew Turner Date: Thu, 7 Sep 2017 19:52:04 +0000 Subject: [PATCH] Fix the SVE ID field shift. Sponsored by: DARPA, AFRL --- sys/arm64/include/armreg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index c396a7e229dc..c8d381e019bd 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -416,7 +416,7 @@ #define ID_AA64PFR0_RAS(x) ((x) & ID_AA64PFR0_RAS_MASK) #define ID_AA64PFR0_RAS_NONE (0x0 << ID_AA64PFR0_RAS_SHIFT) #define ID_AA64PFR0_RAS_V1 (0x1 << ID_AA64PFR0_RAS_SHIFT) -#define ID_AA64PFR0_SVE_SHIFT 28 +#define ID_AA64PFR0_SVE_SHIFT 32 #define ID_AA64PFR0_SVE_MASK (0xful << ID_AA64PFR0_SVE_SHIFT) #define ID_AA64PFR0_SVE(x) ((x) & ID_AA64PFR0_SVE_MASK) #define ID_AA64PFR0_SVE_NONE (0x0ul << ID_AA64PFR0_SVE_SHIFT)