add support for AES and PCLMULQDQ instructions to binutils...
Thanks to Mike Belopuhov for the pointer to the OpenBSD patch, though OpenBSD's gcc is very different that it only helped w/ where to modify, not how... Thanks to jhb for some early reviews... Reviewed by: imp, kib MFC after: 1 month
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jmg
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@ -3981,7 +3981,7 @@ output_insn (void)
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SSE4 instructions have 3 bytes. We may use one more higher
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byte to specify a prefix the instruction requires. Exclude
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instructions which are in both SSE4 and ABM. */
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if ((i.tm.cpu_flags & (CpuSSSE3 | CpuSSE4)) != 0
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if ((i.tm.cpu_flags & (CpuSSSE3 | CpuSSE4 | CpuAES | CpuPCLMUL)) != 0
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&& (i.tm.cpu_flags & CpuABM) == 0)
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{
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if (i.tm.base_opcode & 0xff000000)
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@ -4033,7 +4033,7 @@ output_insn (void)
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}
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else
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{
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if ((i.tm.cpu_flags & (CpuSSSE3 | CpuSSE4)) != 0
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if ((i.tm.cpu_flags & (CpuSSSE3 | CpuSSE4 | CpuAES | CpuPCLMUL)) != 0
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&& (i.tm.cpu_flags & CpuABM) == 0)
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{
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p = frag_more (3);
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@ -543,6 +543,13 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
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#define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
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#define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
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#define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
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#define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } }
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#define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } }
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#define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } }
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#define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
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#define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
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#define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
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#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
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@ -1319,7 +1326,7 @@ static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
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/* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
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/* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
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/* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
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/* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
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/* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */
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/* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
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/* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
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/* ------------------------------- */
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@ -1382,7 +1389,7 @@ static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
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/* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
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/* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
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/* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
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/* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
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/* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
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/* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
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/* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
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/* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
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@ -1391,7 +1398,7 @@ static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
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/* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
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/* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
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/* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
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/* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
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/* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */
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/* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
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/* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
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/* ------------------------------- */
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@ -2605,6 +2612,62 @@ static const struct dis386 prefix_user_table[][4] = {
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{ "invvpid",{ Gm, Mo } },
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{ "(bad)", { XX } },
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},
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/* PREGRP100 */
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{
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "aesimc", { XM, EXx } },
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{ "(bad)", { XX } },
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},
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/* PREGRP101 */
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{
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "aesenc",{ XM, EXx } },
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{ "(bad)", { XX } },
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},
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/* PREGRP102 */
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{
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "aesenclast", { XM, EXx } },
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{ "(bad)", { XX } },
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},
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/* PREGRP103 */
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{
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "aesdec", { XM, EXx } },
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{ "(bad)", { XX } },
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},
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/* PREGRP104 */
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{
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "aesdeclast", { XM, EXx } },
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{ "(bad)", { XX } },
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},
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/* PREGRP105 */
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{
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "aeskeygenassist", { XM, EXx, Ib } },
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{ "(bad)", { XX } },
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},
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/* PREGRP106 */
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{
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "pclmulqdq", { XM, EXx, Ib } },
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{ "(bad)", { XX } },
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},
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};
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static const struct dis386 x86_64_table[][2] = {
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@ -2876,11 +2939,11 @@ static const struct dis386 three_byte_table[][256] = {
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ PREGRP100 },
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{ PREGRP101 },
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{ PREGRP102 },
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{ PREGRP103 },
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{ PREGRP104 },
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/* e0 */
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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@ -2997,7 +3060,7 @@ static const struct dis386 three_byte_table[][256] = {
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{ PREGRP84 },
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{ PREGRP85 },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ PREGRP106 },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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@ -3171,7 +3234,7 @@ static const struct dis386 three_byte_table[][256] = {
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ PREGRP105 },
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/* e0 */
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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@ -72,6 +72,8 @@ typedef struct template
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#define CpuSSE4_1 0x400000 /* SSE4.1 Instructions required */
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#define CpuSSE4_2 0x800000 /* SSE4.2 Instructions required */
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#define CpuXSAVE 0x1000000 /* XSAVE Instructions required */
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#define CpuAES 0x2000000 /* AES Instructions required */
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#define CpuPCLMUL 0x4000000 /* Carry-less Multiplication extensions */
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/* SSE4.1/4.2 Instructions required */
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#define CpuSSE4 (CpuSSE4_1|CpuSSE4_2)
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@ -84,7 +86,7 @@ typedef struct template
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#define CpuUnknownFlags (Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \
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|CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuVMX \
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|Cpu3dnow|Cpu3dnowA|CpuK6|CpuPadLock|CpuSVME|CpuSSSE3|CpuSSE4_1 \
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|CpuSSE4_2|CpuABM|CpuSSE4a|CpuXSAVE)
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|CpuSSE4_2|CpuABM|CpuSSE4a|CpuXSAVE|CpuAES|CpuPCLMUL)
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/* the bits in opcode_modifier are used to generate the final opcode from
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the base_opcode. These bits also are used to detect alternate forms of
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@ -126,6 +128,8 @@ typedef struct template
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#define Rex64 0x10000000 /* instruction require Rex64 prefix. */
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#define Ugh 0x20000000 /* deprecated fp insn, gets a warning */
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#define NoSuf (No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf)
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/* operand_types[i] describes the type of operand i. This is made
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by OR'ing together all of the possible type masks. (e.g.
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'operand_types[i] = Reg|Imm' specifies that operand i can be
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@ -4319,6 +4319,54 @@ const template i386_optab[] =
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{ "xrstor", 1, 0xfae, 0x5, CpuXSAVE,
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Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf,
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{ BaseIndex|Disp8|Disp16|Disp32|Disp32S } },
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/* Intel AES extensions */
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{"aesdec", 2, 0x660f38de, None, CpuAES,
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Modrm|IgnoreSize|NoSuf,
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{ RegXMM|LLongMem,
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RegXMM } },
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{"aesdeclast", 2, 0x660f38df, None, CpuAES,
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Modrm|IgnoreSize|NoSuf,
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{ RegXMM|LLongMem,
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RegXMM } },
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{"aesenc", 2, 0x660f38dc, None, CpuAES,
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Modrm|IgnoreSize|NoSuf,
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{ RegXMM|LLongMem,
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RegXMM } },
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{"aesenclast", 2, 0x660f38dd, None, CpuAES,
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Modrm|IgnoreSize|NoSuf,
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{ RegXMM|LLongMem,
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RegXMM } },
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{"aesimc", 2, 0x660f38db, None, CpuAES,
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Modrm|IgnoreSize|NoSuf,
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{ RegXMM|LLongMem,
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RegXMM } },
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{"aeskeygenassist", 3, 0x660f3adf, None, CpuAES,
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Modrm|IgnoreSize|NoSuf,
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{ Imm8, RegXMM|LLongMem,
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RegXMM } },
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/* Intel Carry-less Multiplication extensions */
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{"pclmulqdq", 3, 0x660f3a44, None, CpuPCLMUL,
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Modrm|IgnoreSize|NoSuf,
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{ Imm8, RegXMM|LLongMem,
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RegXMM } },
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{"pclmullqlqdq", 2, 0x660f3a44, 0x0, CpuPCLMUL,
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Modrm|IgnoreSize|NoSuf|ImmExt,
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{ RegXMM|LLongMem,
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RegXMM } },
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{"pclmulhqlqdq", 2, 0x660f3a44, 0x1, CpuPCLMUL,
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Modrm|IgnoreSize|NoSuf|ImmExt,
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{ RegXMM|LLongMem,
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RegXMM } },
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{"pclmullqhqdq", 2, 0x660f3a44, 0x10, CpuPCLMUL,
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Modrm|IgnoreSize|NoSuf|ImmExt,
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{ RegXMM|LLongMem,
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RegXMM } },
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{"pclmulhqhqdq", 2, 0x660f3a44, 0x11, CpuPCLMUL,
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Modrm|IgnoreSize|NoSuf|ImmExt,
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{ RegXMM|LLongMem,
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RegXMM } },
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{ NULL, 0, 0, 0, 0, 0, { 0 } }
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};
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