From faaedb30ca03905f2e63eb69ab309cb19b5d0ca1 Mon Sep 17 00:00:00 2001 From: Sam Leffler Date: Sat, 31 May 2008 22:44:06 +0000 Subject: [PATCH] 5416 and similar chips grew another region in the pci clock domain where register accesses do not pass through the byte-lane hardware; extend the register op macros to deal with this MFC after: 1 week --- sys/dev/ath/ah_osdep.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sys/dev/ath/ah_osdep.h b/sys/dev/ath/ah_osdep.h index 2e2a561de3b8..85e8752d0990 100644 --- a/sys/dev/ath/ah_osdep.h +++ b/sys/dev/ath/ah_osdep.h @@ -87,8 +87,11 @@ extern u_int32_t ath_hal_reg_read(struct ath_hal *ah, u_int reg); #define AH_BIG_ENDIAN 4321 #if _BYTE_ORDER == _BIG_ENDIAN +#define OS_REG_UNSWAPPED(_reg) \ + (((_reg) >= 0x4000 && (_reg) < 0x5000) || \ + ((_reg) >= 0x7000 && (_reg) < 0x8000)) #define OS_REG_WRITE(_ah, _reg, _val) do { \ - if ( (_reg) >= 0x4000 && (_reg) < 0x5000) \ + if (OS_REG_UNSWAPPED(_reg)) \ bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \ (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)); \ else \ @@ -96,12 +99,13 @@ extern u_int32_t ath_hal_reg_read(struct ath_hal *ah, u_int reg); (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val)); \ } while (0) #define OS_REG_READ(_ah, _reg) \ - (((_reg) >= 0x4000 && (_reg) < 0x5000) ? \ + (OS_REG_UNSWAPPED(_reg) ? \ bus_space_read_4((bus_space_tag_t)(_ah)->ah_st, \ (bus_space_handle_t)(_ah)->ah_sh, (_reg)) : \ bus_space_read_stream_4((bus_space_tag_t)(_ah)->ah_st, \ (bus_space_handle_t)(_ah)->ah_sh, (_reg))) #else /* _BYTE_ORDER == _LITTLE_ENDIAN */ +#define OS_REG_UNSWAPPED(_reg) (0) #define OS_REG_WRITE(_ah, _reg, _val) \ bus_space_write_4((bus_space_tag_t)(_ah)->ah_st, \ (bus_space_handle_t)(_ah)->ah_sh, (_reg), (_val))