Change PCIM_CIS_ASI_TUPLE to _CONFIG.
Add PCI_MAX_BAR_0 minor style nit. Add PCIM_CIS_CONFIG_MASK
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@ -451,7 +451,7 @@ cardbus_read_tuple_init(device_t cbdev, device_t child, uint32_t *start,
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space = *start & PCIM_CIS_ASI_MASK;
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switch (space) {
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case PCIM_CIS_ASI_TUPLE:
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case PCIM_CIS_ASI_CONFIG:
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if (cardbus_cis_debug)
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device_printf(cbdev, "CIS in PCI config space\n");
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/* CIS in PCI config space need no initialization */
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@ -116,8 +116,9 @@
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/* config registers for header type 0 devices */
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#define PCIR_BARS 0x10
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#define PCIR_BAR(x) (PCIR_BARS + (x) * 4)
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#define PCI_RID2BAR(rid) (((rid)-PCIR_BARS)/4)
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#define PCIR_BAR(x) (PCIR_BARS + (x) * 4)
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#define PCI_MAX_BAR_0 5 /* Number of standard bars */
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#define PCI_RID2BAR(rid) (((rid) - PCIR_BARS) / 4)
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#define PCI_BAR_IO(x) (((x) & PCIM_BAR_SPACE) == PCIM_BAR_IO_SPACE)
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#define PCI_BAR_MEM(x) (((x) & PCIM_BAR_SPACE) == PCIM_BAR_MEM_SPACE)
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#define PCIM_BAR_SPACE 0x00000001
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@ -133,7 +134,7 @@
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#define PCIM_BAR_IO_BASE 0xfffffffc
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#define PCIR_CIS 0x28
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#define PCIM_CIS_ASI_MASK 0x7
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#define PCIM_CIS_ASI_TUPLE 0
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#define PCIM_CIS_ASI_CONFIG 0
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#define PCIM_CIS_ASI_BAR0 1
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#define PCIM_CIS_ASI_BAR1 2
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#define PCIM_CIS_ASI_BAR2 3
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@ -143,6 +144,7 @@
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#define PCIM_CIS_ASI_ROM 7
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#define PCIM_CIS_ADDR_MASK 0x0ffffff8
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#define PCIM_CIS_ROM_MASK 0xf0000000
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#define PCIM_CIS_CONFIG_MASK 0xff
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#define PCIR_SUBVEND_0 0x2c
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#define PCIR_SUBDEV_0 0x2e
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#define PCIR_BIOS 0x30
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