diff --git a/sys/mips/nlm/hal/pic.h b/sys/mips/nlm/hal/pic.h
index f4163c2d8815..1229cf5db3ab 100644
--- a/sys/mips/nlm/hal/pic.h
+++ b/sys/mips/nlm/hal/pic.h
@@ -168,14 +168,9 @@
 #define	PIC_IRT_TIMER_INDEX(num)	((num) + PIC_IRT_TIMER_0_INDEX)
 
 #define	PIC_CLOCK_TIMER			7
-#define	PIC_IRQ_BASE			8
 
 #if !defined(LOCORE) && !defined(__ASSEMBLY__)
 
-#define	PIC_IRT_FIRST_IRQ		(PIC_IRQ_BASE)
-#define	PIC_IRT_LAST_IRQ		63
-#define	XLP_IRQ_IS_PICINTR(irq)		((irq) >= PIC_IRT_FIRST_IRQ)
-
 /*
  *   Misc
  */
diff --git a/sys/mips/nlm/interrupt.h b/sys/mips/nlm/interrupt.h
index 342f1d3f0e05..293e584c0414 100644
--- a/sys/mips/nlm/interrupt.h
+++ b/sys/mips/nlm/interrupt.h
@@ -34,9 +34,22 @@
 
 /* Defines for the IRQ numbers */
 
-#define IRQ_IPI			41  /* 8-39 are mapped by PIC intr 0-31 */
-#define IRQ_MSGRING             6
-#define IRQ_TIMER               7
+#define	IRQ_IPI			41  /* 8-39 are used by PIC interrupts */
+#define	IRQ_MSGRING		6
+#define	IRQ_TIMER		7
+
+#define	PIC_IRQ_BASE		8
+#define	PIC_IRT_LAST_IRQ	39
+#define	XLP_IRQ_IS_PICINTR(irq)	((irq) >= PIC_IRQ_BASE && \
+				    (irq) <= PIC_IRT_LAST_IRQ)
+
+#define	PIC_UART_0_IRQ		9
+#define	PIC_PCIE_0_IRQ		11
+#define	PIC_PCIE_1_IRQ		12
+#define	PIC_PCIE_2_IRQ		13
+#define	PIC_PCIE_3_IRQ		14
+#define	PIC_EHCI_0_IRQ		16
+#define	PIC_MMC_IRQ		21
 
 /*
  * XLR needs custom pre and post handlers for PCI/PCI-e interrupts
diff --git a/sys/mips/nlm/xlp.h b/sys/mips/nlm/xlp.h
index 832c9519a332..2cb8165e4f84 100644
--- a/sys/mips/nlm/xlp.h
+++ b/sys/mips/nlm/xlp.h
@@ -34,18 +34,6 @@
 #include <mips/nlm/hal/mips-extns.h>
 #include <mips/nlm/hal/iomap.h>
 
-#define	PIC_UART_0_IRQ	9
-
-#define	PIC_PCIE_0_IRQ	11
-#define	PIC_PCIE_1_IRQ	12
-#define	PIC_PCIE_2_IRQ	13
-#define	PIC_PCIE_3_IRQ	14
-
-#define	PIC_EHCI_0_IRQ	16 
-#define	PIC_MMC_IRQ	21
-/* 41 used by IRQ_SMP */
-
-
 /* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */
 #define	CHIP_PROCESSOR_ID_XLP_8XX		0x10
 #define	CHIP_PROCESSOR_ID_XLP_3XX		0x11