Merge ^/head r358832 through r358848.
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fc23be915c
@ -77,4 +77,11 @@
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} while (0)
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#endif
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#ifndef TAILQ_FOREACH_SAFE
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#define TAILQ_FOREACH_SAFE(var, head, field, tvar) \
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for ((var) = TAILQ_FIRST((head)); \
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(var) && ((tvar) = TAILQ_NEXT((var), field), 1); \
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(var) = (tvar))
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#endif
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#endif /* _LIBUSB_GLOBAL_LINUX_H_ */
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@ -175,6 +175,10 @@ static int cap_invpcid;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, invpcid, CTLFLAG_RD, &cap_invpcid,
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0, "Guests are allowed to use INVPCID");
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static int tpr_shadowing;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, tpr_shadowing, CTLFLAG_RD,
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&tpr_shadowing, 0, "TPR shadowing support");
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static int virtual_interrupt_delivery;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, virtual_interrupt_delivery, CTLFLAG_RD,
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&virtual_interrupt_delivery, 0, "APICv virtual interrupt delivery support");
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@ -630,7 +634,7 @@ vmx_restore(void)
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static int
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vmx_init(int ipinum)
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{
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int error, use_tpr_shadow;
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int error;
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uint64_t basic, fixed0, fixed1, feature_control;
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uint32_t tmp, procbased2_vid_bits;
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@ -753,6 +757,24 @@ vmx_init(int ipinum)
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MSR_VMX_PROCBASED_CTLS2, PROCBASED2_ENABLE_INVPCID, 0,
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&tmp) == 0);
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/*
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* Check support for TPR shadow.
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*/
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error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,
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MSR_VMX_TRUE_PROCBASED_CTLS, PROCBASED_USE_TPR_SHADOW, 0,
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&tmp);
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if (error == 0) {
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tpr_shadowing = 1;
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TUNABLE_INT_FETCH("hw.vmm.vmx.use_tpr_shadowing",
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&tpr_shadowing);
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}
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if (tpr_shadowing) {
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procbased_ctls |= PROCBASED_USE_TPR_SHADOW;
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procbased_ctls &= ~PROCBASED_CR8_LOAD_EXITING;
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procbased_ctls &= ~PROCBASED_CR8_STORE_EXITING;
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}
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/*
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* Check support for virtual interrupt delivery.
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*/
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@ -761,13 +783,9 @@ vmx_init(int ipinum)
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PROCBASED2_APIC_REGISTER_VIRTUALIZATION |
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PROCBASED2_VIRTUAL_INTERRUPT_DELIVERY);
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use_tpr_shadow = (vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,
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MSR_VMX_TRUE_PROCBASED_CTLS, PROCBASED_USE_TPR_SHADOW, 0,
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&tmp) == 0);
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error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2, MSR_VMX_PROCBASED_CTLS2,
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procbased2_vid_bits, 0, &tmp);
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if (error == 0 && use_tpr_shadow) {
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if (error == 0 && tpr_shadowing) {
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virtual_interrupt_delivery = 1;
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TUNABLE_INT_FETCH("hw.vmm.vmx.use_apic_vid",
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&virtual_interrupt_delivery);
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@ -778,13 +796,6 @@ vmx_init(int ipinum)
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procbased_ctls2 |= procbased2_vid_bits;
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procbased_ctls2 &= ~PROCBASED2_VIRTUALIZE_X2APIC_MODE;
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/*
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* No need to emulate accesses to %CR8 if virtual
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* interrupt delivery is enabled.
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*/
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procbased_ctls &= ~PROCBASED_CR8_LOAD_EXITING;
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procbased_ctls &= ~PROCBASED_CR8_STORE_EXITING;
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/*
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* Check for Posted Interrupts only if Virtual Interrupt
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* Delivery is enabled.
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@ -1054,10 +1065,13 @@ vmx_vminit(struct vm *vm, pmap_t pmap)
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vmx->ctx[i].guest_dr6 = DBREG_DR6_RESERVED1;
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error += vmwrite(VMCS_GUEST_DR7, DBREG_DR7_RESERVED1);
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if (virtual_interrupt_delivery) {
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error += vmwrite(VMCS_APIC_ACCESS, APIC_ACCESS_ADDRESS);
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if (tpr_shadowing) {
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error += vmwrite(VMCS_VIRTUAL_APIC,
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vtophys(&vmx->apic_page[i]));
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}
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if (virtual_interrupt_delivery) {
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error += vmwrite(VMCS_APIC_ACCESS, APIC_ACCESS_ADDRESS);
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error += vmwrite(VMCS_EOI_EXIT0, 0);
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error += vmwrite(VMCS_EOI_EXIT1, 0);
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error += vmwrite(VMCS_EOI_EXIT2, 0);
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@ -2661,6 +2675,12 @@ vmx_exit_process(struct vmx *vmx, int vcpu, struct vm_exit *vmexit)
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SDT_PROBE3(vmm, vmx, exit, mwait, vmx, vcpu, vmexit);
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vmexit->exitcode = VM_EXITCODE_MWAIT;
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break;
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case EXIT_REASON_TPR:
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vlapic = vm_lapic(vmx->vm, vcpu);
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vlapic_sync_tpr(vlapic);
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vmexit->inst_length = 0;
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handled = HANDLED;
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break;
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case EXIT_REASON_VMCALL:
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case EXIT_REASON_VMCLEAR:
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case EXIT_REASON_VMLAUNCH:
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@ -2946,6 +2966,16 @@ vmx_run(void *arg, int vcpu, register_t rip, pmap_t pmap,
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break;
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}
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/*
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* If TPR Shadowing is enabled, the TPR Threshold
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* must be updated right before entering the guest.
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*/
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if (tpr_shadowing && !virtual_interrupt_delivery) {
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if ((vmx->cap[vcpu].proc_ctls & PROCBASED_USE_TPR_SHADOW) != 0) {
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vmcs_write(VMCS_TPR_THRESHOLD, vlapic_get_cr8(vlapic));
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}
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}
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/*
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* VM exits restore the base address but not the
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* limits of GDTR and IDTR. The VMCS only stores the
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@ -3634,7 +3664,30 @@ vmx_set_tmr(struct vlapic *vlapic, int vector, bool level)
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}
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static void
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vmx_enable_x2apic_mode(struct vlapic *vlapic)
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vmx_enable_x2apic_mode_ts(struct vlapic *vlapic)
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{
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struct vmx *vmx;
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struct vmcs *vmcs;
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uint32_t proc_ctls;
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int vcpuid;
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vcpuid = vlapic->vcpuid;
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vmx = ((struct vlapic_vtx *)vlapic)->vmx;
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vmcs = &vmx->vmcs[vcpuid];
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proc_ctls = vmx->cap[vcpuid].proc_ctls;
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proc_ctls &= ~PROCBASED_USE_TPR_SHADOW;
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proc_ctls |= PROCBASED_CR8_LOAD_EXITING;
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proc_ctls |= PROCBASED_CR8_STORE_EXITING;
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vmx->cap[vcpuid].proc_ctls = proc_ctls;
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VMPTRLD(vmcs);
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vmcs_write(VMCS_PRI_PROC_BASED_CTLS, proc_ctls);
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VMCLEAR(vmcs);
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}
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static void
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vmx_enable_x2apic_mode_vid(struct vlapic *vlapic)
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{
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struct vmx *vmx;
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struct vmcs *vmcs;
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@ -3795,12 +3848,16 @@ vmx_vlapic_init(void *arg, int vcpuid)
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vlapic_vtx->pir_desc = &vmx->pir_desc[vcpuid];
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vlapic_vtx->vmx = vmx;
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if (tpr_shadowing) {
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vlapic->ops.enable_x2apic_mode = vmx_enable_x2apic_mode_ts;
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}
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if (virtual_interrupt_delivery) {
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vlapic->ops.set_intr_ready = vmx_set_intr_ready;
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vlapic->ops.pending_intr = vmx_pending_intr;
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vlapic->ops.intr_accepted = vmx_intr_accepted;
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vlapic->ops.set_tmr = vmx_set_tmr;
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vlapic->ops.enable_x2apic_mode = vmx_enable_x2apic_mode;
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vlapic->ops.enable_x2apic_mode = vmx_enable_x2apic_mode_vid;
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}
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if (posted_interrupts)
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@ -555,6 +555,12 @@ vlapic_update_ppr(struct vlapic *vlapic)
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VLAPIC_CTR1(vlapic, "vlapic_update_ppr 0x%02x", ppr);
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}
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void
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vlapic_sync_tpr(struct vlapic *vlapic)
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{
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vlapic_update_ppr(vlapic);
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}
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static VMM_STAT(VLAPIC_GRATUITOUS_EOI, "EOI without any in-service interrupt");
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static void
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@ -1079,6 +1085,8 @@ vlapic_pending_intr(struct vlapic *vlapic, int *vecptr)
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int idx, i, bitpos, vector;
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uint32_t *irrptr, val;
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vlapic_update_ppr(vlapic);
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if (vlapic->ops.pending_intr)
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return ((*vlapic->ops.pending_intr)(vlapic, vecptr));
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@ -1136,7 +1144,6 @@ vlapic_intr_accepted(struct vlapic *vlapic, int vector)
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panic("isrvec_stk_top overflow %d", stk_top);
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vlapic->isrvec_stk[stk_top] = vector;
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vlapic_update_ppr(vlapic);
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}
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void
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@ -74,6 +74,8 @@ void vlapic_post_intr(struct vlapic *vlapic, int hostcpu, int ipinum);
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void vlapic_fire_cmci(struct vlapic *vlapic);
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int vlapic_trigger_lvt(struct vlapic *vlapic, int vector);
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void vlapic_sync_tpr(struct vlapic *vlapic);
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uint64_t vlapic_get_apicbase(struct vlapic *vlapic);
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int vlapic_set_apicbase(struct vlapic *vlapic, uint64_t val);
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void vlapic_set_x2apic_state(struct vm *vm, int vcpuid, enum x2apic_state s);
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case FBSD_LUSB_GET_POWER_USAGE:
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args->cmd = USB_GET_POWER_USAGE;
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break;
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case FBSD_LUSB_DEVICESTATS:
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args->cmd = USB_DEVICESTATS;
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break;
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default:
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error = ENOIOCTL;
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}
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#define FBSD_LUSB_FS_OPEN_STREAM 0xffdf
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#define FBSD_LUSB_GET_DEV_PORT_PATH 0xffde
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#define FBSD_LUSB_GET_POWER_USAGE 0xffdd
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#define FBSD_LUSB_DEVICESTATS 0xffdc
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#define FBSD_LUSB_MAX 0xffff
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#define FBSD_LUSB_MIN 0xffdd
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#define FBSD_LUSB_MIN 0xffdc
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/*
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* Linux btrfs clone operation
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@ -60,7 +60,7 @@
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* in the range 5 to 9.
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*/
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#undef __FreeBSD_version
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#define __FreeBSD_version 1300082 /* Master, propagated to newvers */
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#define __FreeBSD_version 1300083 /* Master, propagated to newvers */
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/*
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* __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD,
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