Remove ARM9_CACHE_WRITE_THROUGH, none of our configs define it.

sys/arm/arm/cpufunc.c

@@ -924,11 +924,7 @@ set_cpufuncs()
 		    arm_dcache_l2_nsets)) - arm9_dcache_sets_inc;
 		arm9_dcache_index_inc = 1U << (32 - arm_dcache_l2_assoc);
 		arm9_dcache_index_max = 0U - arm9_dcache_index_inc;
-#ifdef ARM9_CACHE_WRITE_THROUGH
-		pmap_pte_init_arm9();
-#else
 		pmap_pte_init_generic();
-#endif
 		goto out;
 	}
 #endif /* CPU_ARM9 */

sys/arm/arm/pmap.c

@@ -500,26 +500,6 @@ pmap_pte_init_generic(void)
 	pmap_zero_page_func = pmap_zero_page_generic;
 }
 
-#if defined(CPU_ARM9) && defined(ARM9_CACHE_WRITE_THROUGH)
-void
-pmap_pte_init_arm9(void)
-{
-
-	/*
-	 * ARM9 is compatible with generic, but we want to use
-	 * write-through caching for now.
-	 */
-	pmap_pte_init_generic();
-
-	pte_l1_s_cache_mode = L1_S_C;
-	pte_l2_l_cache_mode = L2_C;
-	pte_l2_s_cache_mode = L2_C;
-
-	pte_l1_s_cache_mode_pt = L1_S_C;
-	pte_l2_l_cache_mode_pt = L2_C;
-	pte_l2_s_cache_mode_pt = L2_C;
-}
-#endif /* CPU_ARM9 */
 #endif /* ARM_MMU_GENERIC != 0 */
 
 #if ARM_MMU_XSCALE == 1

sys/arm/include/pmap.h

@@ -622,9 +622,6 @@ void	pmap_copy_page_generic(vm_paddr_t, vm_paddr_t);
 void	pmap_zero_page_generic(vm_paddr_t, int, int);
 
 void	pmap_pte_init_generic(void);
-#if defined(CPU_ARM9)
-void	pmap_pte_init_arm9(void);
-#endif /* CPU_ARM9 */
 #if (ARM_MMU_V6 + ARM_MMU_V7) != 0
 void	pmap_pte_init_mmu_v6(void);
 #endif /* (ARM_MMU_V6 + ARM_MMU_V7) != 0 */
@@ -706,4 +703,4 @@ extern vm_paddr_t dump_avail[];
 #endif	/* !LOCORE */
 
 #endif	/* !_MACHINE_PMAP_H_ */
-#endif	/* !ARM_NEW_PMAP */
+#endif	/* !ARM_NEW_PMAP */

sys/conf/options.arm

@@ -1,5 +1,4 @@
 #$FreeBSD$
-ARM9_CACHE_WRITE_THROUGH	opt_global.h
 ARMV6			opt_global.h
 ARM_CACHE_LOCK_ENABLE	opt_global.h
 ARM_KERN_DIRECTMAP	opt_vm.h