Convert the asr driver to use the bus_space API. This does not represent
a significant functional change, but it further cleans up the code and brings it closer to being portable. Thanks to Don Bowman for helping to test this.
This commit is contained in:
scottl
parent
1238dc9ef8
commit
ff0a88340a
@ -263,22 +263,13 @@ static dpt_sig_S ASR_sig = {
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/* Also serves as the minimum map for */
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/* the 2005S zero channel RAID product */
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/**************************************************************************
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** ASR Host Adapter structure - One Structure For Each Host Adapter That **
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** Is Configured Into The System. The Structure Supplies Configuration **
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** Information, Status Info, Queue Info And An Active CCB List Pointer. **
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***************************************************************************/
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/* I2O register set */
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typedef struct {
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U8 Address[0x30];
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volatile U32 Status;
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volatile U32 Mask;
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#define Mask_InterruptsDisabled 0x08
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U32 x[2];
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volatile U32 ToFIFO; /* In Bound FIFO */
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volatile U32 FromFIFO; /* Out Bound FIFO */
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} i2oRegs_t;
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#define I2O_REG_STATUS 0x30
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#define I2O_REG_MASK 0x34
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#define I2O_REG_TOFIFO 0x40
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#define I2O_REG_FROMFIFO 0x44
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#define Mask_InterruptsDisabled 0x08
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/*
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* A MIX of performance and space considerations for TID lookups
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@ -308,12 +299,20 @@ union asr_ccb {
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struct ccb_setasync csa;
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};
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/**************************************************************************
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** ASR Host Adapter structure - One Structure For Each Host Adapter That **
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** Is Configured Into The System. The Structure Supplies Configuration **
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** Information, Status Info, Queue Info And An Active CCB List Pointer. **
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***************************************************************************/
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typedef struct Asr_softc {
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u_int16_t ha_irq;
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void * ha_Base; /* base port for each board */
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u_int8_t * volatile ha_blinkLED;
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i2oRegs_t * ha_Virt; /* Base address of IOP */
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U8 * ha_Fvirt; /* Base address of Frames */
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u_long ha_Base; /* base port for each board */
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bus_size_t ha_blinkLED;
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bus_space_handle_t ha_i2o_bhandle;
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bus_space_tag_t ha_i2o_btag;
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bus_space_handle_t ha_frame_bhandle;
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bus_space_tag_t ha_frame_btag;
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I2O_IOP_ENTRY ha_SystemTable;
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LIST_HEAD(,ccb_hdr) ha_ccb; /* ccbs in use */
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struct cam_path * ha_path[MAX_CHANNEL+1];
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@ -417,6 +416,62 @@ static struct cdevsw asr_cdevsw = {
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/* I2O support routines */
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static __inline u_int32_t
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asr_get_FromFIFO(Asr_softc_t *sc)
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{
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return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
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I2O_REG_FROMFIFO));
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}
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static __inline u_int32_t
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asr_get_ToFIFO(Asr_softc_t *sc)
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{
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return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
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I2O_REG_TOFIFO));
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}
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static __inline u_int32_t
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asr_get_intr(Asr_softc_t *sc)
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{
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return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
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I2O_REG_MASK));
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}
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static __inline u_int32_t
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asr_get_status(Asr_softc_t *sc)
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{
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return (bus_space_read_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle,
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I2O_REG_STATUS));
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}
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static __inline void
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asr_set_FromFIFO(Asr_softc_t *sc, u_int32_t val)
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{
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bus_space_write_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle, I2O_REG_FROMFIFO,
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val);
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}
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static __inline void
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asr_set_ToFIFO(Asr_softc_t *sc, u_int32_t val)
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{
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bus_space_write_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle, I2O_REG_TOFIFO,
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val);
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}
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static __inline void
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asr_set_intr(Asr_softc_t *sc, u_int32_t val)
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{
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bus_space_write_4(sc->ha_i2o_btag, sc->ha_i2o_bhandle, I2O_REG_MASK,
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val);
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}
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static __inline void
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asr_set_frame(Asr_softc_t *sc, void *frame, u_int32_t offset, int len)
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{
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bus_space_write_region_4(sc->ha_frame_btag, sc->ha_frame_bhandle,
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offset, (u_int32_t *)frame, len);
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}
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/*
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* Fill message with default.
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*/
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@ -438,19 +493,20 @@ ASR_fillMessage(void *Message, u_int16_t size)
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#define EMPTY_QUEUE (-1L)
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static __inline U32
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ASR_getMessage(i2oRegs_t *virt)
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ASR_getMessage(Asr_softc_t *sc)
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{
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U32 MessageOffset;
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if ((MessageOffset = virt->ToFIFO) == EMPTY_QUEUE) {
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MessageOffset = virt->ToFIFO;
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}
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MessageOffset = asr_get_ToFIFO(sc);
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if (MessageOffset == EMPTY_QUEUE)
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MessageOffset = asr_get_ToFIFO(sc);
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return (MessageOffset);
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} /* ASR_getMessage */
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/* Issue a polled command */
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static U32
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ASR_initiateCp(i2oRegs_t *virt, U8 *fvirt, PI2O_MESSAGE_FRAME Message)
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ASR_initiateCp(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Message)
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{
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U32 Mask = -1L;
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U32 MessageOffset;
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@ -461,18 +517,19 @@ ASR_initiateCp(i2oRegs_t *virt, U8 *fvirt, PI2O_MESSAGE_FRAME Message)
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* be made more resiliant to adapter delays since commands like
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* resetIOP can cause the adapter to be deaf for a little time.
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*/
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while (((MessageOffset = ASR_getMessage(virt)) == EMPTY_QUEUE)
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while (((MessageOffset = ASR_getMessage(sc)) == EMPTY_QUEUE)
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&& (--Delay != 0)) {
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DELAY (10000);
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}
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if (MessageOffset != EMPTY_QUEUE) {
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bcopy(Message, fvirt + MessageOffset,
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I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
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asr_set_frame(sc, Message, MessageOffset,
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I2O_MESSAGE_FRAME_getMessageSize(Message));
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/*
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* Disable the Interrupts
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*/
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virt->Mask = (Mask = virt->Mask) | Mask_InterruptsDisabled;
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virt->ToFIFO = MessageOffset;
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Mask = asr_get_intr(sc);
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asr_set_intr(sc, Mask | Mask_InterruptsDisabled);
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asr_set_ToFIFO(sc, MessageOffset);
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}
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return (Mask);
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} /* ASR_initiateCp */
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@ -481,7 +538,7 @@ ASR_initiateCp(i2oRegs_t *virt, U8 *fvirt, PI2O_MESSAGE_FRAME Message)
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* Reset the adapter.
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*/
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static U32
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ASR_resetIOP(i2oRegs_t *virt, U8 *fvirt)
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ASR_resetIOP(Asr_softc_t *sc)
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{
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struct resetMessage {
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I2O_EXEC_IOP_RESET_MESSAGE M;
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@ -507,7 +564,7 @@ ASR_resetIOP(i2oRegs_t *virt, U8 *fvirt)
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/*
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* Send the Message out
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*/
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if ((Old = ASR_initiateCp(virt, fvirt,
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if ((Old = ASR_initiateCp(sc,
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(PI2O_MESSAGE_FRAME)Message_Ptr)) != -1L) {
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/*
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* Wait for a response (Poll), timeouts are dangerous if
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@ -521,7 +578,7 @@ ASR_resetIOP(i2oRegs_t *virt, U8 *fvirt)
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/*
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* Re-enable the interrupts.
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*/
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virt->Mask = Old;
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asr_set_intr(sc, Old);
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KASSERT(*Reply_Ptr != 0, ("*Reply_Ptr == 0"));
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return(*Reply_Ptr);
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}
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@ -533,7 +590,7 @@ ASR_resetIOP(i2oRegs_t *virt, U8 *fvirt)
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* Get the curent state of the adapter
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*/
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static PI2O_EXEC_STATUS_GET_REPLY
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ASR_getStatus(i2oRegs_t *virt, U8 *fvirt, PI2O_EXEC_STATUS_GET_REPLY buffer)
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ASR_getStatus(Asr_softc_t *sc, PI2O_EXEC_STATUS_GET_REPLY buffer)
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{
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I2O_EXEC_STATUS_GET_MESSAGE Message;
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PI2O_EXEC_STATUS_GET_MESSAGE Message_Ptr;
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@ -558,7 +615,7 @@ ASR_getStatus(i2oRegs_t *virt, U8 *fvirt, PI2O_EXEC_STATUS_GET_REPLY buffer)
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/*
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* Send the Message out
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*/
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if ((Old = ASR_initiateCp(virt, fvirt,
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if ((Old = ASR_initiateCp(sc,
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(PI2O_MESSAGE_FRAME)Message_Ptr)) != -1L) {
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/*
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* Wait for a response (Poll), timeouts are dangerous if
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@ -576,7 +633,7 @@ ASR_getStatus(i2oRegs_t *virt, U8 *fvirt, PI2O_EXEC_STATUS_GET_REPLY buffer)
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/*
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* Re-enable the interrupts.
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*/
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virt->Mask = Old;
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asr_set_intr(sc, Old);
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return (buffer);
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}
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return (NULL);
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@ -652,10 +709,10 @@ ASR_queue_s(union asr_ccb *ccb, PI2O_MESSAGE_FRAME Message)
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/* Prevent interrupt service */
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s = splcam ();
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sc->ha_Virt->Mask = (Mask = sc->ha_Virt->Mask)
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Mask = asr_get_intr(sc);
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asr_set_intr(sc, Mask | Mask_InterruptsDisabled);
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if (ASR_queue (sc, Message) == EMPTY_QUEUE) {
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if (ASR_queue(sc, Message) == EMPTY_QUEUE) {
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ccb->ccb_h.status &= ~CAM_STATUS_MASK;
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ccb->ccb_h.status |= CAM_REQUEUE_REQ;
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}
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@ -668,7 +725,7 @@ ASR_queue_s(union asr_ccb *ccb, PI2O_MESSAGE_FRAME Message)
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}
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/* Re-enable Interrupts */
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sc->ha_Virt->Mask = Mask;
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asr_set_intr(sc, Mask);
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splx(s);
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return (ccb->ccb_h.status);
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@ -804,12 +861,19 @@ ASR_resetBus(Asr_softc_t *sc, int bus)
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static __inline int
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ASR_getBlinkLedCode(Asr_softc_t *sc)
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{
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if ((sc != NULL)
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&& (sc->ha_blinkLED != NULL)
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&& (sc->ha_blinkLED[1] == 0xBC)) {
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return (sc->ha_blinkLED[0]);
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}
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return (0);
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U8 blink;
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if (sc == NULL)
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return (0);
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blink = bus_space_read_1(sc->ha_frame_btag,
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sc->ha_frame_bhandle, sc->ha_blinkLED + 1);
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if (blink != 0xBC)
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return (0);
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blink = bus_space_read_1(sc->ha_frame_btag,
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sc->ha_frame_bhandle, sc->ha_blinkLED);
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return (blink);
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} /* ASR_getBlinkCode */
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/*
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@ -1174,7 +1238,7 @@ ASR_reset(Asr_softc_t *sc)
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* or HA_OFF_LINE to HA_OFF_LINE_RECOVERY.
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*/
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++(sc->ha_in_reset);
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if (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0) {
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if (ASR_resetIOP(sc) == 0) {
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debug_asr_printf ("ASR_resetIOP failed\n");
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/*
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* We really need to take this card off-line, easier said
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@ -1186,7 +1250,7 @@ ASR_reset(Asr_softc_t *sc)
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* to instead take the card off-line ...
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*/
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/* Wait Forever */
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while (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0);
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while (ASR_resetIOP(sc) == 0);
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}
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retVal = ASR_init (sc);
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splx (s);
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@ -1280,14 +1344,14 @@ ASR_queue(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Message)
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ccb = (union asr_ccb *)(long)
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I2O_MESSAGE_FRAME_getInitiatorContext64(Message);
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if ((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE) {
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bcopy(Message, sc->ha_Fvirt + MessageOffset,
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I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
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if ((MessageOffset = ASR_getMessage(sc)) != EMPTY_QUEUE) {
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asr_set_frame(sc, Message, MessageOffset,
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I2O_MESSAGE_FRAME_getMessageSize(Message));
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if (ccb) {
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ASR_ccbAdd (sc, ccb);
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}
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/* Post the command */
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sc->ha_Virt->ToFIFO = MessageOffset;
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asr_set_ToFIFO(sc, MessageOffset);
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} else {
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if (ASR_getBlinkLedCode(sc)) {
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/*
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@ -1816,8 +1880,8 @@ ASR_initOutBound(Asr_softc_t *sc)
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/*
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* Send the Message out
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*/
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if ((Old = ASR_initiateCp(sc->ha_Virt, sc->ha_Fvirt,
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(PI2O_MESSAGE_FRAME)Message_Ptr)) != -1L) {
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if ((Old = ASR_initiateCp(sc,
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(PI2O_MESSAGE_FRAME)Message_Ptr)) != -1L) {
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u_long size, addr;
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/*
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@ -1827,7 +1891,7 @@ ASR_initOutBound(Asr_softc_t *sc)
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/*
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* Re-enable the interrupts.
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*/
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sc->ha_Virt->Mask = Old;
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asr_set_intr(sc, Old);
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/*
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* Populate the outbound table.
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*/
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@ -1851,9 +1915,9 @@ ASR_initOutBound(Asr_softc_t *sc)
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/* Initialize the outbound FIFO */
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if (sc->ha_Msgs != NULL)
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for (size = sc->ha_Msgs_Count, addr = sc->ha_Msgs_Phys;
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size; --size) {
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sc->ha_Virt->FromFIFO = addr;
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for(size = sc->ha_Msgs_Count, addr = sc->ha_Msgs_Phys;
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size; --size) {
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asr_set_FromFIFO(sc, addr);
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addr += sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME);
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}
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return (*Reply_Ptr);
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@ -2159,11 +2223,10 @@ asr_pci_map_mem(device_t tag, Asr_softc_t *sc)
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if (sc->ha_mem_res == NULL) {
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return (0);
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}
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sc->ha_Base = (void *)rman_get_start(sc->ha_mem_res);
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if (sc->ha_Base == NULL) {
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return (0);
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}
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sc->ha_Virt = (i2oRegs_t *) rman_get_virtual(sc->ha_mem_res);
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sc->ha_Base = rman_get_start(sc->ha_mem_res);
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sc->ha_i2o_bhandle = rman_get_bushandle(sc->ha_mem_res);
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sc->ha_i2o_btag = rman_get_bustag(sc->ha_mem_res);
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if (s == 0xA5111044) { /* Split BAR Raptor Daptor */
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if ((rid += sizeof(u_int32_t)) >= PCIR_BAR(4)) {
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return (0);
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@ -2181,12 +2244,11 @@ asr_pci_map_mem(device_t tag, Asr_softc_t *sc)
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if (sc->ha_mes_res == NULL) {
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return (0);
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}
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if ((void *)rman_get_start(sc->ha_mes_res) == NULL) {
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return (0);
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}
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sc->ha_Fvirt = (U8 *) rman_get_virtual(sc->ha_mes_res);
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sc->ha_frame_bhandle = rman_get_bushandle(sc->ha_mes_res);
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sc->ha_frame_btag = rman_get_bustag(sc->ha_mes_res);
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} else {
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sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
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sc->ha_frame_bhandle = sc->ha_i2o_bhandle;
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sc->ha_frame_btag = sc->ha_i2o_btag;
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}
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return (1);
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} /* asr_pci_map_mem */
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@ -2266,10 +2328,10 @@ asr_attach(device_t tag)
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sc->ha_pciDeviceNum = (dinfo->cfg.slot << 3) | dinfo->cfg.func;
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}
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/* Check if the device is there? */
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if ((ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt) == 0) ||
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if ((ASR_resetIOP(sc) == 0) ||
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((status = (PI2O_EXEC_STATUS_GET_REPLY)malloc(
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sizeof(I2O_EXEC_STATUS_GET_REPLY), M_TEMP, M_WAITOK)) == NULL) ||
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(ASR_getStatus(sc->ha_Virt, sc->ha_Fvirt, status) == NULL)) {
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(ASR_getStatus(sc, status) == NULL)) {
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printf ("asr%d: could not initialize hardware\n", unit);
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return(ENODEV); /* Get next, maybe better luck */
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}
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@ -2280,7 +2342,7 @@ asr_attach(device_t tag)
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sc->ha_SystemTable.MessengerType = status->MessengerType;
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sc->ha_SystemTable.InboundMessageFrameSize = status->InboundMFrameSize;
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sc->ha_SystemTable.MessengerInfo.InboundMessagePortAddressLow =
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(U32)(sc->ha_Base) + (U32)offsetof(i2oRegs_t, ToFIFO);
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(U32)(sc->ha_Base + I2O_REG_TOFIFO); /* XXX 64-bit */
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if (!asr_pci_map_int(tag, (void *)sc)) {
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printf ("asr%d: could not map interrupt\n", unit);
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@ -2327,12 +2389,10 @@ asr_attach(device_t tag)
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#define FW_DEBUG_BLED_OFFSET 8
|
||||
|
||||
if ((Info = (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)
|
||||
ASR_getParams(sc, 0,
|
||||
I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO,
|
||||
ASR_getParams(sc, 0, I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO,
|
||||
&Buffer, sizeof(struct BufferInfo))) != NULL) {
|
||||
sc->ha_blinkLED = sc->ha_Fvirt
|
||||
+ I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info)
|
||||
+ FW_DEBUG_BLED_OFFSET;
|
||||
sc->ha_blinkLED = FW_DEBUG_BLED_OFFSET +
|
||||
I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info);
|
||||
}
|
||||
if (ASR_acquireLct(sc) == 0) {
|
||||
(void)ASR_acquireHrt(sc);
|
||||
@ -2724,14 +2784,14 @@ asr_intr(Asr_softc_t *sc)
|
||||
{
|
||||
int processed;
|
||||
|
||||
for(processed = 0; sc->ha_Virt->Status & Mask_InterruptsDisabled;
|
||||
for(processed = 0; asr_get_status(sc) & Mask_InterruptsDisabled;
|
||||
processed = 1) {
|
||||
union asr_ccb *ccb;
|
||||
U32 ReplyOffset;
|
||||
PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply;
|
||||
|
||||
if (((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)
|
||||
&& ((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)) {
|
||||
if (((ReplyOffset = asr_get_FromFIFO(sc)) == EMPTY_QUEUE)
|
||||
&& ((ReplyOffset = asr_get_FromFIFO(sc)) == EMPTY_QUEUE)) {
|
||||
break;
|
||||
}
|
||||
Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)(ReplyOffset
|
||||
@ -2761,9 +2821,11 @@ asr_intr(Asr_softc_t *sc)
|
||||
* need not concern ourselves with the (optional
|
||||
* byteswapping) method access.
|
||||
*/
|
||||
Reply->StdReplyFrame.TransactionContext
|
||||
= ((PI2O_SINGLE_REPLY_MESSAGE_FRAME)
|
||||
(sc->ha_Fvirt + MessageOffset))->TransactionContext;
|
||||
Reply->StdReplyFrame.TransactionContext =
|
||||
bus_space_read_4(sc->ha_frame_btag,
|
||||
sc->ha_frame_bhandle, MessageOffset +
|
||||
offsetof(I2O_SINGLE_REPLY_MESSAGE_FRAME,
|
||||
TransactionContext));
|
||||
/*
|
||||
* For 64 bit machines, we need to reconstruct the
|
||||
* 64 bit context.
|
||||
@ -2790,12 +2852,12 @@ asr_intr(Asr_softc_t *sc)
|
||||
/*
|
||||
* Copy the packet out to the Original Message
|
||||
*/
|
||||
bcopy(Message_Ptr, sc->ha_Fvirt + MessageOffset,
|
||||
sizeof(I2O_UTIL_NOP_MESSAGE));
|
||||
asr_set_frame(sc, Message_Ptr, MessageOffset,
|
||||
sizeof(I2O_UTIL_NOP_MESSAGE));
|
||||
/*
|
||||
* Issue the NOP
|
||||
*/
|
||||
sc->ha_Virt->ToFIFO = MessageOffset;
|
||||
asr_set_ToFIFO(sc, MessageOffset);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2808,7 +2870,7 @@ asr_intr(Asr_softc_t *sc)
|
||||
* Return Reply so that it can be used for the
|
||||
* next command
|
||||
*/
|
||||
sc->ha_Virt->FromFIFO = ReplyOffset;
|
||||
asr_set_FromFIFO(sc, ReplyOffset);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -2898,7 +2960,7 @@ asr_intr(Asr_softc_t *sc)
|
||||
* Return Reply so that it can be used for the next command
|
||||
* since we have no more need for it now
|
||||
*/
|
||||
sc->ha_Virt->FromFIFO = ReplyOffset;
|
||||
asr_set_FromFIFO(sc, ReplyOffset);
|
||||
|
||||
if (ccb->ccb_h.path) {
|
||||
xpt_done ((union ccb *)ccb);
|
||||
@ -3026,7 +3088,7 @@ ASR_queue_i(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Packet)
|
||||
case I2O_EXEC_IOP_RESET:
|
||||
{ U32 status;
|
||||
|
||||
status = ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt);
|
||||
status = ASR_resetIOP(sc);
|
||||
ReplySizeInBytes = sizeof(status);
|
||||
debug_usr_cmd_printf ("resetIOP done\n");
|
||||
return (copyout ((caddr_t)&status, (caddr_t)Reply,
|
||||
@ -3036,7 +3098,7 @@ ASR_queue_i(Asr_softc_t *sc, PI2O_MESSAGE_FRAME Packet)
|
||||
case I2O_EXEC_STATUS_GET:
|
||||
{ I2O_EXEC_STATUS_GET_REPLY status;
|
||||
|
||||
if (ASR_getStatus(sc->ha_Virt, sc->ha_Fvirt, &status) == NULL) {
|
||||
if (ASR_getStatus(sc, &status) == NULL) {
|
||||
debug_usr_cmd_printf ("getStatus failed\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
@ -3471,7 +3533,7 @@ asr_ioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td)
|
||||
bzero(&CtlrInfo, sizeof(CtlrInfo));
|
||||
CtlrInfo.length = sizeof(CtlrInfo) - sizeof(u_int16_t);
|
||||
CtlrInfo.drvrHBAnum = asr_unit(dev);
|
||||
CtlrInfo.baseAddr = (u_long)sc->ha_Base;
|
||||
CtlrInfo.baseAddr = sc->ha_Base;
|
||||
i = ASR_getBlinkLedCode (sc);
|
||||
if (i == -1) {
|
||||
i = 0;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user